JP3045730B2 - Recording device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a recording apparatus, and more particularly, to an apparatus for recording a moving image signal.

[Conventional technology]

2. Description of the Related Art In recent years, with the spread of video cameras, the enjoyment of creating images has been widely recognized by general users. For example,
The user takes his or her child as a main character, walks around, shoots various scenes (scenes), and goes home to edit at home. At that time, I would like to change the display and order of the scenes and combine them to create a story-like style by combining the shot scenes. Playing the videotape that I took, I was bothered by the sequence of the scenes, but it was also a fun time. At that time, in order to find out where the head between the scenes is and what the contents are, the tape is fast-forwarded or rewound, so that it is difficult.

[Problems to be solved by the invention]

However, among them, she complains that no matter how much time she has, she becomes irritated. Persevered people do the job to the end, but many do not, and abandon them on the way. It was often the case that such a good project came out with a truly disappointing result.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a recording apparatus capable of easily searching a recorded moving image, performing editing in a short time, and prohibiting writing of an unnecessary still image.

[Means for solving the problem]

In order to achieve the above object, the invention according to claim 1 is an apparatus for recording a moving image signal on a recording medium, wherein: an imaging unit for obtaining the moving image signal; a memory; a trigger key; A writing unit for generating a still image signal by selecting one screen in a moving image signal from an imaging unit and writing the still image signal to the memory; and a memory for writing to the memory when the trigger key is operated at an interval shorter than a predetermined time interval. Control means for controlling the writing means so as to prohibit writing of the still image signal.

Here, preferably, the writing means has a compression means for compressing and encoding the information amount of the still image signal,
The still image signal compressed by the compression means may be written to the memory.

Preferably, the apparatus further comprises display means for displaying a moving image corresponding to the moving image signal obtained by the imaging means and a still image corresponding to the still image signal read from the memory. .

Preferably, the writing means has a reduction means for reducing an image corresponding to the still image signal, and the still image signal reduced by the reduction means can be written to the memory.

[Action]

According to the present invention, one screen in the moving image signal is written to the memory as a still image in response to the operation of the trigger key. Further, according to the present invention, when the trigger key is operated in a relatively short time, writing of a still image is prohibited.

〔Example〕

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 1 shows a circuit configuration of a camcorder (video camera integrated VTR) according to an embodiment of the present invention. In FIG. 1, reference numeral 1 denotes an image reduction processing unit, which is a low-pass filter (LPF) 2, an analog / digital converter (A / D) 3, a thinning-out processing circuit 4, a clock signal generator 5, and a variable frequency divider. 6 is comprised. The video signal from the video camera 30 is subjected to signal processing by the video signal processing circuit 27, and then subjected to the thinning processing by the thinning processing circuit 4 of the image reduction processing unit 1 to reduce the image.

That is, the video signal processed by the video signal processing circuit 27 is band-limited by the LPF 2 of the image reduction processing unit 1,
Next, in synchronization with the clock signal of the clock signal generator 5, A /
It is converted to an image digital signal by D3. This image digital signal is input to the thinning-out processing circuit 4 and is synchronized with the timing signal from the variable frequency divider 6 so that the thinning-out processing circuit 4
As a result, the pixels in the horizontal direction of the image digital signal are thinned out by a reduction ratio C (1, 2, 3, 4,...) Specified by a system control circuit (hereinafter abbreviated as a syscon circuit) 11, and The line of the image digital signal is thinned out every C lines. As described above, the image digital signal is thinned out in synchronization with the timing signal from the variable frequency divider 6 corresponding to the specified reduction ratio C, and a reduced image for one field is formed in one field period. Here, if the reduction ratio C is 1, the screen is reduced to the size of the input image, if the reduction ratio C is 2, the screen is reduced to an area 1/4, and if the reduction ratio C is 3, the screen is reduced to an area 1/9. If ratio C is 4, area 1/1
In the same way, if the reduction ratio C is c, the area is 1 / c ²
Becomes An image of the reduced screen is formed and sent from the thinning processing circuit 4.

Further, the clock signal generator 5 includes a horizontal synchronization signal (HD signal) and a vertical synchronization signal (VD signal) obtained by separating a synchronization signal from the video signal output from the video signal processing circuit 27 by the synchronization separation circuit 7. Of the color burst signal (BURST signal), the HD signal and the BURST signal are converted to a frequency of, for example, 4 fs (fs: color subcarrier frequency), thereby forming a clock signal that takes the A / D3 sampling timing. ing.

A compression circuit 8 uses, for example, a well-known DPCM (differential PCM) method. This DPCM takes the difference between the previous sampled value and the next sampled value,
For example, the number of bits is reduced to half by non-linear conversion from 8 bits to 4 bits to compress the information amount of the video signal. Reference numeral 9 denotes a field memory, which stores the reduced and compressed image data obtained by the image reduction processing unit 1 and the compression circuit 8 described above. Reference numeral 28 denotes a decompression circuit (for example, a DPCM decompression circuit) which decompresses image data stored in the field memory 9 in a compressed state.

Reference numeral 12 denotes a write address designating circuit, which designates a write area in an image area on the field memory 8 in a predetermined order.

A write address control circuit 13 switches a write / read (W / R) switching circuit 14 to a write mode, and writes reduced image data in the field memory 9 in synchronization with a timing signal from the variable frequency divider 6. Are doing. 15 is a gate circuit, which is a timer
During the operation of 10, the output of the write address control circuit 13 is prohibited. A selection switch 16 switches between the contents of the field memory 9 and the video camera video signal from the video signal processing circuit 27. When the terminal A side is selected, the photographed information can be confirmed on the reduced screen, and when the terminal B side is selected, the current moving image by the through from the camera can be selectively confirmed.

Reference numeral 17 denotes a tape counter that counts a capstan synchronization signal and indicates tape position information. Reference numeral 18 denotes a memory that stores the value of the tape counter 17 at the time when a trigger switch provided on the operation unit 26 is effectively pressed. , 19 are comparators for comparing the value of the tape counter 17 representing the current tape position information with the value of the memory 18 representing the head (top position) of the image scene. Reference numeral 20 denotes a read address designating circuit that designates a read address of the field memory 9 in accordance with the comparison result of the comparator 19, and 21 denotes a W / R switching circuit 1
4 is a read address control circuit that switches the mode to the read mode and reads reduced image data from the field memory 9 in accordance with the address specified by the read address specifying circuit 20. This reading is performed in synchronization with the clock from the reference clock signal generation circuit 22.

Reference numeral 23 denotes a digital / analog converter (D / A), which converts a reduced image digital signal read from the field memory 9 into a DPCM-decompressed signal into an analog signal, and supplies the analog signal to the input terminal A of the changeover switch 30 doing. Reference numeral 24 denotes a monitor using a CRT, a liquid crystal, or the like.
It is called F (electronic viewfinder). Monitor 24 is D
An image is displayed based on an analog signal output from / A23 through the above-mentioned changeover switch 16 and band-limited by a low-pass filter (LPF) 25. The operation unit 26 has an editing operation panel for designating various modes, and in addition to the trigger switch, STOP (stop), PLAY (playback), REC (record), STILL (still), REC PAUSE (pause). , FF (fast forward),
It consists of a REW (rewind) switch and the like.

FIG. 2 shows a specific arrangement example of image data in a memory (hereinafter, referred to as an image memory) 9 in FIG. As shown in FIG. 2A, when the reduction ratio C is 1, the camera video signal is stored in the image memory 9 without being reduced. When the number of image data is 2 to 4, the reduction ratio C becomes 2 as shown in FIG. 4B, and the image data is reduced to half in both the vertical and horizontal directions and stored in the image memory. When the number of image data is 5 to 9, the reduction ratio C changes to 3 as shown in FIG. 9C, the image data is reduced to 1/3 in both the vertical and horizontal directions, and stored in the image memory 9. Similarly, if the number of image data is 10 to 16
When the number of image data is 17 to 25, the reduction rate c = 4. This means that if the reduction ratio C is set to a fixed value from the beginning, the image quality will be degraded. However, in the embodiment of the present invention, when the image data is small, the reduction ratio is changed according to the number of screens so as to obtain good image quality. Is appropriately changed.

FIG. 3A shows a schematic configuration of a general basic video camera unit. This camcorder is a video camera
30, a recorder 31, an EVF (electronic video finder) 32, and a trigger button 33. The image input to the EVF 32 is switched to the REC side from the video camera 30 by switching of the selection switch 32, and the PLAY is performed from the recorder 31. To the EV side
The image is monitored with F32.

FIG. 3B shows a schematic configuration example of a video camera unit according to the embodiment of the present invention. This video camera comprises a video camera 30, a recorder 31, an EVF 24, a trigger button 33, and an image memory 9. When the trigger button 33 is pressed effectively, a video signal is transmitted from the video camera 30 to the image memory 9. Is different from the conventional example shown in FIG. 3 (A). Further, by selecting the input to the EVF 24 by the selection switch 16, the contents of the video camera 30, the recorder 31, and the memory 9 can be monitored by the EVF 24.

The flowchart of FIG. 4 shows the operation procedure of the embodiment of the present invention to be executed by the system control circuit 11 of FIG. Hereinafter, the fourth
The operation of the embodiment of the present invention will be described with reference to the flowcharts of FIGS.

First, in step 1 of the image writing process after the power is turned on, a variable N for counting the number of times the recording trigger button of the operation unit 26 is pressed is cleared. In step 2, the reduction ratio C for reducing the data in the image memory 9 is initialized to 1.

Step 3 determines whether or not the trigger button has been pressed. When the trigger button is pressed, the process moves to the next step 4.

In step 4, it is determined whether or not the timer count value T of the timer 10 is 0. If the timer count value T is not 0, the process proceeds to step 5 and the timer 10 is operated. This timer 10 continues to count time.
In the next step 6, if the timer count value T overflows a predetermined value (OVF), the process proceeds to step 7, and if not, the process proceeds to step 3.
Return to In step 7, the timer 10 is stopped, the timer count value T is cleared to 0, and the process returns to step 3. That is, even if the trigger button is pressed, if the timer count value T is other than 0, nothing is performed for image writing.

If the timer count value T is 0 when the trigger button is pressed, the process jumps from step 4 to step 8, and the timer 10 is operated in step 8. In the next step 9, the number N of times the trigger button is pressed is compared with the square value c ² of the reduction ratio C, and if both values match, the process proceeds to step 10. That is, when the reduction ratio C is 1, 2, 3, 4,.
Are 1,4,9,16,..., N and c ² coincide. Proceeds to step 12 when the N and c ² are not identical.
In step 10, the reduction ratio C is incremented (increased) by one. In the next step 11, all the contents of the image memory 9 are reduced again to a reduced image of 1 / c ² corresponding to the reduction ratio C.

In the following step 12, the number N of times the trigger button is pressed is incremented by one. In the next step 13, the camera video signal is reduced to a reduction ratio C using the image reduction processing unit 1. In the next step 14, processing of a write address for writing the reduced camera video signal in the area of the image memory 9 is performed using the write address designating circuit 12. In the next step 15, a camera video signal is written into the address area of the image memory 9 designated by the write address designation circuit 12 via the write address control circuit 13 and the W / R switching circuit 14. Next, the process returns to step 3 again.

Next, referring to FIG. 4 (B), an operation procedure of an image reading process for reading the image data written in the image memory 9 will be described. First, steps after power-on
At 20, a read serial number R for reading image data from the image memory 9 is initialized to 0. In the next step 21, it is determined whether or not the read key on the operation unit 26 has been pressed. When the read key is pressed, the process proceeds to step 22 to read the contents of the image memory 9 as follows. .

That is, in step 22, the value of the read serial number R is incremented by one. In the next step 23, the read address designation circuit 20, the read address control circuit 21 and the image reduction ratio C and the read serial number R are used.
Using the W / R switching circuit 14, read address processing in the area of the image memory 9 is performed. Next step 24
Then, the image data is transferred from the area of the image memory 9 to the DPCM expansion circuit.
And performing reading while stretched c ² times corresponding to the image reduction ratio C by 28.

In the next step 25, the number N of images written in the image memory 9 is compared with the read serial number R, and R>
If N, go to step 26; if R ≦ N, return to step 21. In step 26, the read serial number R is initialized to 0. Then, the process returns to step 21. For that reason,
.., N, 1, 2,... Are sequentially repeated to perform image reading processing.

Note that the monitor 24 is shared for both monitoring and retrieval during shooting. Further, since the image memory 9 stores the compressed image, the image memory 9 can be externally exchanged.

As described above, according to the present embodiment, the following effects can be obtained.

(1) In this embodiment, every time a trigger button of the operation unit of the video camera is pressed, the input image data is reduced and written to the image memory one by one. Since the image can be read out by expanding it to the size of the image, the image of the head of each scene shot so far can be displayed on the monitor, which makes it easier to search for recorded images and is powerful when editing images. Help. At the time of editing, by making the image data correspond to the tape counter value, the tape position at the beginning of the scene becomes clear, and a further effect can be obtained.

In addition, since the photographing state so far can be confirmed not only at the time of editing but also during the photographing, it is possible to prevent the photographing of a redundant useless scene or forgetting to photograph.

Furthermore, it is effective for insert recording. As described above, as shown in FIG. 5, since various data are stored so that the search screen and the tape counter information correspond to each other, the part inserted by EVF is selected on the screen, and then the operation button is used. By issuing a search instruction to the system controller, the system controller can control the tape running to the insertion position based on the tape counter value and perform the search.

(2) Although the price of a semiconductor memory used as an image memory is lower than before, a large amount of information occupies the memory per image. Therefore, as a means for effectively using the image memory, if the number of divisions in the image memory area is fixed from the beginning, the larger the number of divisions, the smaller the amount of information that can be recorded and the lower the overall image quality I do. On the other hand, in the present embodiment, the number of divisions is increased each time as the number of screens recorded in the image memory increases, so that the image quality can be improved when the number of images is small.

(3) However, since the capacity of the image memory is fixed, if the trigger button is frequently pressed, the number of images increases and the image quality deteriorates more and more. Therefore, in the present invention, if the time interval for pressing the trigger button is shorter than the specified value, writing to the image memory is prohibited, so that this problem is prevented.

[Effects of the Invention] As described above, according to the present invention, one screen in a moving image signal from the imaging unit is written in the memory as a still image in response to the operation of the trigger key. Of the recorded moving image can be known without reproducing. Further, at this time, when the operation interval of the trigger key is short, the writing of the still image signal is prohibited, so that the writing of the unnecessary still image can be prohibited.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a circuit configuration of an embodiment of the present invention, and FIGS. 2 (A), 2 (B) and 2 (C) show examples of arrangement of image data in an image memory area of FIG. FIG. 3 (A) is a block diagram showing a configuration of a conventional video camera unit, FIG. 3 (B) is a block diagram showing a configuration of a video camera unit according to an embodiment of the present invention, and FIG. 4 (A). , (B) is a flowchart showing an operation procedure of one embodiment of the present invention, and FIG. 5 is a conceptual diagram showing a data storage state of the embodiment of the present invention. DESCRIPTION OF SYMBOLS 1 ... Image reduction processing part, 4 ... Thinning-out processing circuit, 6 ... Variable frequency divider, 7 ... Synchronization separation circuit, 8 ... Compression circuit, 9 ... Image memory, 10 ... Timer, 11 ... System control circuit (syscon circuit) , 12 write address designating circuit, 13 write address control circuit, 14 write / read (W / R) switching circuit, 15 gate circuit, 16 selection switch, 17 tape counter, 18 memory, 19 comparison , 20 ... Read address designating circuit, 21 ... Read address control circuit, 24 ... Monitor, 26 ... Operation unit, 27 ...
Video signal processing circuit, 28 ... expansion circuit.

Continuation of front page (72) Inventor Riki Sato 770 Shimonoge, Takatsu-ku, Kawasaki-shi, Kanagawa Inside the Tamagawa Office of Canon Inc. (56) References JP-A-62-23026 (JP, A) JP-A-63-61568 (JP) , A) JP-A-2-55480 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H04N 5/76-5/956 H04N 5/225 H04N 5/262

Claims (4)

(57) [Claims] 1. An apparatus for recording a moving image signal on a recording medium, comprising: an imaging unit for obtaining the moving image signal; a memory; a trigger key; and a moving image signal from the imaging unit in response to an operation of the trigger key. Writing means for generating a still image signal by selecting one screen and writing the still image signal to the memory; and prohibiting writing of the still image signal to the memory when the trigger key is operated at an interval shorter than a predetermined time interval. And a control means for controlling the writing means. 2. The apparatus according to claim 1, wherein said writing means has compression means for compressing and encoding the information amount of said still image signal, and writes the still image signal compressed by said compression means to said memory. 2. The recording device according to 1. 3. A display device for displaying a moving image corresponding to a moving image signal obtained by said imaging means and a still image corresponding to a still image signal read from said memory. The recording device according to claim 1, wherein 4. The apparatus according to claim 1, wherein said writing means has a reducing means for reducing an image corresponding to the still image signal, and writes the still image signal reduced by said reducing means to said memory. Recording device.