JP3034895B2 - Power converter system - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a power converter system composed of two sets of converters with a DC intermediate circuit interposed therebetween. The present invention relates to a power converter system in which pulse width control is performed collectively.

[Prior Art] As a prior art relating to a PWM control method of a converter / inverter system, which is a kind of a conventional self-excited power converter, for example, Japanese Patent Application No. 61-2875 (Japanese Patent Application Laid-Open No. 62-163579) ), The high-speed pulse pattern output port built into the one-chip microcomputer
A technique for independently and efficiently controlling the pulse width of a converter and an inverter, a technique for controlling a sine wave PWM of an inverter described in Japanese Patent Application No. 61-2876 (Japanese Patent Application Laid-Open No. 62-163577). Technology, Japanese Patent Application No. 6
Japanese Patent Application Laid-Open No. 1-10176 (refer to Japanese Patent Application Laid-Open No. Sho 62-171470) has proposed a technique relating to a technique for sine-wave PWM control of a converter and a synchronization process with a power supply voltage.

In each of these prior arts, a converter and an inverter, which are two self-excited converters, are each operated by an independent control device to calculate an output signal, and pulse output control is individually performed for the converter and the inverter. Is what you do.

However, these prior arts do not consider the reliability of the system.

That is, this type of power converter system usually needs to squeeze the output of each self-excited converter when the system is abnormal, for example, when the inverter is overcurrent, but for that purpose, It is necessary to independently provide a port for inputting an abnormal signal in addition to a normal command input line in the pulse output control device. Further, depending on the failure mode, protection processing must be performed on both converters according to a predetermined procedure.

For this reason, in the above-mentioned conventional technology, it is necessary to perform protection processing by transmitting and receiving information via a communication line connecting the respective ports of the two converters. Due to the large number of input lines to the control device, there is room for improvement in the reliability of the entire system in terms of failure of the control device itself or disconnection.

Further, since the above-described conventional technology controls the converter and the inverter independently, the DC intermediate circuit provided between the converter and the inverter requires a DC reactor having a certain capacity or more, It has been difficult to reduce the size of the circuit and, consequently, the overall size of the power converter system.

On the other hand, as another type of conventional technology relating to a power converter system, a technology described in Japanese Patent Application Laid-Open No. 60-157472 is also known.

This prior art relates to a system in which a thyristor converter which is a separately-excited converter and an inverter which is a self-excited converter are controlled by a control device including one microprocessor and an interface circuit. That is,
Specifically, this conventional technique controls the firing angle of the converter when it is idle, and reduces the output voltage of the converter.
The converted wave for inverter control is changed correspondingly,
Create a PWM signal by comparing with the carrier,
This is to control the inverter.

In this prior art, since one converter controls two converters, a separately-excited converter and a self-excited converter, only one control device is required, and the number of wires for signal input / output is small. In terms of hardware, it can be said that the system has high system reliability.

However, in this prior art, considering a case where an inverter causes a short circuit failure, since there is only one control device and there is no control delay time accompanying the transfer of a command or the like, the converter is shut off. Although the processing up to the generation of the command can be performed smoothly, since the power-supply-side converter is a separately-excited converter, instantaneous power-off cannot be performed, and it takes time until the squeezing is completed.

In other words, this prior art, when the inverter short-circuit,
If the inverter has sufficient current interrupting capability, an OFF command should be output immediately to the inverter components.However, if the inverter has insufficient interrupting capability, the large current cannot be turned off as it is. It is necessary to turn off all the elements once and shunt the current to reduce the energy of the intermediate coupling circuit, and then turn off the inverter components. In this case, if the supply of energy from the current-side power converter to the intermediate coupling circuit is not interrupted promptly, the energy of the intermediate coupling circuit is not immediately attenuated, and the current shunt period is extended, which adversely affects the constituent elements. give.

As described above, a plurality of power converters including the separately excited converter are connected to one power converter.
The conventional technology controlled by one controller has an improvement in system protection.

[Problems to be Solved by the Invention] The above-described prior art is a PW using a sine wave of a self-excited converter alone.
M control method, related to the cooperative operation of the PAM control method of the separately-excited converter and the PWM control method of the self-excited converter, which can obtain the effect of reducing noise,
No consideration has been given to the type of power converter, the reliability of the entire power converter system including the configuration of the control device, and the miniaturization of the DC intermediate circuit. There is a problem that miniaturization is difficult.

SUMMARY OF THE INVENTION An object of the present invention is to provide a power converter system which solves the problems of the prior art described above, improves the reliability of the system, reduces the size of the DC intermediate circuit, and makes the entire system compact. Is to do.

[Means for Solving the Problems] According to the present invention, the object is to provide a first converter which receives an AC power supply or a DC power supply and converts it into a DC, and a DC converter connected to an output of the converter. In a power converter system including an intermediate circuit and a second converter connected to an output of the intermediate circuit and converting a direct current to an alternating current, the power converter system includes a microprocessor, and the first and second converters are independently provided. A pulse width control unit that determines the pulse width of each PWM pulse signal for PWM control, and an output port unit that outputs the PWM pulse signal generated by the pulse width control unit to the outside, is provided from this output port unit. This is achieved by outputting the PWM pulse signal in synchronization with the first and second converters and by making the pulse signals output to the first and second converters have the same frequency. It is.

In addition, the object is that the first output port unit and the first converter are connected so that an energization mode period from the second converter to the load overlaps with an energization mode period from the first converter to the DC intermediate circuit. And outputting a PWM pulse signal to the second converter.

Further, the object is to provide an emergency shut-off unit for turning off all the switching elements constituting the first and second converters in the event of an abnormality, and a pulse width control unit and a pulse signal generated based on the emergency shut-off unit. An output port for outputting to the first and second converters a priority from the output port to the pulse signal of the emergency cutoff unit over the pulse signal of the pulse width control unit. Is achieved by

[Operation] The power-supply-side self-excited power converter operates in response to a command from the control device to immediately cut off the power supply when the system is abnormal. As a result, the power supply-side converter can promptly shut off the power supply, and a highly reliable power converter system can be realized with a simple control device configuration using one control device.

Also, by controlling the two self-excited power converters synchronously, the required power can be immediately sent from the power converter on the power supply side to the power converter on the load side, so that the DC reactor of the DC intermediate circuit can be reduced. The capacity can be reduced, and the entire system can be reduced in size.

Hereinafter, an embodiment of a power converter system according to the present invention will be described in detail with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of one embodiment of the present invention. In FIG. 1, 1 is a three-phase AC power supply, 2 and 6 are capacitors for suppressing overvoltage, 3 is a current source converter,
36 are transistors constituting the main switching element, 4 is a DC reactor, 5 is a current source inverter, 51
Reference numerals 56 denote transistors constituting the main switching element, 7 denotes an induction motor shown as an example of a load, 8 denotes a DC current detector, 9 denotes a comparator for comparing a primary current command i ₁ * with a feedback current value i ₁ . , 10 is a one-chip microcomputer for supplying a pulse pattern (control signal) to transistors 31 to 36, 51 to 56, 12 is a terminal to which a primary current command i ₁ * is supplied, and 13 and 14 are inverter control systems. A terminal 15 to which the given frequency command ω ₁ * and phase command θ * are supplied, and 15 is a signal line for inputting a power synchronization signal.

One-chip microcomputer 10 has input port 101, internal bus 1
02, store programs, pulse width data tables, etc.
ROM103, primary storage, RAM104 used as a register,
ALU 105 for executing calculations, etc., an event setting register 107 for setting an event required to output a control signal composed of a predetermined pulse pattern (event) to an output port 106, a time setting for when this event is enabled A time setting register 108, a holding register 109 for linking and holding the contents of these two setting registers 107, 108, an associative memory 110 in which several sets of setting data set in the holding register 109 are sequentially stored cyclically, A timer 111 that outputs an actual time, a comparing unit 112 that compares the time set by the timer 111 with the set time content in the associative memory 110, and generates an output when they match, triggers from the comparing unit 112 An execution controller 113 for controlling the output of the received event to the output port 106 is provided.

 Next, the operation of this embodiment will be described.

FIG. 2 shows the output port of the one-chip microcomputer 10.
Event to be generated in 106, that is, an event calculation processing program for obtaining an event for the converter from the pulse pattern
6 is a schematic flowchart for controlling the operation of F1000.

(1) First, the output current deviation Δi of the converter is taken in from the analog-digital conversion port of the input ports 101. Of course, in this case, the current command i ₁ * may be taken from the digital port, the feedback current itself may be taken from the analog-digital conversion port, and the deviation signal may be calculated inside the microcomputer (step F1010).

(2) The conduction ratio γ * and the phase PH * of the converter, which is the first power converter, corresponding to the current deviation Δi are obtained.
The flow rate γ * and the phase PH * can be obtained from predetermined characteristics as shown in FIG. 3 (step F1020).

(3) Next, the converter-side total phase θtc is calculated from the relationship θtc = Σωc * · Δtc + PH *.
Here, ωc * is the frequency of the power supply connected to the converter, and Δtc is the reciprocal of the switching frequency of the switching elements 31 to 36 of the converter (step F1030).

(4) For the total phase θtc obtained in step F1030,
The mode of which switch element by the transistors 31 to 36 must be turned ON / OFF during Δtc is determined. In this mode, the electrical angle of 360 ° is divided into six modes for every 60 °, which mode is determined this time according to the total phase θtc, selection of the switch element to be turned ON / OFF, and its selection. It is for obtaining the order. Although the detailed description is omitted here,
No. -10176 (see Japanese Patent Application Laid-Open No. 62-171470) describes the details (step F1040).

(5) The reference values t _1c , t _2c , t _3c ｛t _1c = Δtc · sin of two pulses to be supplied to the DC intermediate circuit according to the total phase θtc.
(Θtc−240 °), t _2c = Δtc · sin θtc, t _3c = Δtc−t _1c
−t _2c ｝ is calculated. These t _1c , t _2c , t _3c are the duty ratio commands γ
* Is a reference value next to the maximum value, and a value actually used in converter control is obtained by performing data processing by the processing of step F1060 described below (step F1050).

(6) The pulse reference value t _1c , t _2c , t _3c calculated in F1050 is processed into a pulse width by the conduction ratio γ *. That is, t _1c ′ = γ * · t _1c , t _2c ′ = γ * · t _2c , t _3c ′ = Δtc
By calculating −t _1c ′ −t _2c ′, a pulse width processed by the conduction ratio γ * is obtained. Here, the period between t _1c ′ and t _2c ′ is a power supply mode from the AC power supply to the DC reactor, and during the period t _3c ′, no energy is supplied from the power supply,
This is the recirculation mode in which the energy stored in the reactor is recirculated (step F1060).

By the above processing, data used for ON / OFF control of the converter as an example of the first converter (data indicating which switch element is turned ON / OFF) can be calculated.

FIG. 4 is a flowchart illustrating the operation of an event calculation process F1100 used for controlling the inverter 3 as an example of the second power converter.

(1) First, a frequency command ω used for inverter control
₁ *, take in the phase command θ *. This command value may be obtained by directly taking in a digital quantity or by taking an analog-to-digital conversion of an analog quantity (step F1110).

_{(2) θti = Σω 1 *} · Δti + θ * be of calculating the total phase θti from equation (step F1120).

(3) Depending on the value of the total phase θti, the transistors 51 to 56
Which switch element is ON / OFF during Δti
Determine if you must let them. Here, the detailed description is omitted, but the details are described in the aforementioned Japanese Patent Application No. 61-61.
No. 2876 (see JP-A-62-163577) (step F1130).

(4) Pulse widths t _1i , t _2i ｛t _1i = Δti · sin (θti−240 °) for supplying electric energy from the DC intermediate circuit 4 to the induction motor 7 which is an example of a load according to the total phase θti. t _2i = Δ
ti · sin θti｝ is calculated, and the pulse width t _3i (= Δti−t _1i −
t _2i ) is also calculated here (step F1140).

By executing the inverter event calculation process F1100 described above, the pulse width for the inverter (that is, the time of event change)
And an event (which switch element should be turned ON / OFF).

FIG. 5 shows the two items obtained as described above,
Processing F2000 to set in associative memory 110 for output port control
5 is a flowchart for explaining the operation of FIG.

First, in the process of step F2100, it is determined whether the necessary event setting and time setting are completed for the 12 transistors constituting the converter and inverter, and if NO, the process of step F2200 The corresponding event is set, the time of the event change is set in the process of step F2300, and this setting process ends.

Fig. 6 shows the three tasks described above (F1000, F1100, F200
It is a figure showing an example of start timing of (0).

In one embodiment of the present invention, as can be seen from FIG. 6, first, events for the converter and the inverter are calculated, and then the process of sequentially setting the events in the register is performed to obtain a pulse pattern. ing. here,
If the period Δt of the event setting process is equal to the periods Δtc and Δti of the event calculation process, the switching frequencies of the converter and the inverter are equal, and the frequency is 1 / Δt (Hz)
It turns out that.

The power converter system according to the embodiment of the present invention configured as described above can provide the following special effects. That is, since two self-excited converters are controlled collectively by using one one-chip microcomputer, it is possible to promptly perform processing such as emergency shutdown.

 Hereinafter, this will be described with reference to the drawings.

FIG. 7 is a schematic flowchart for explaining the operation of the emergency shutdown processing program F3000.

The emergency shutdown processing program F3000, when receiving an interruption due to abnormality detection of an abnormality detector or the like (this hardware is omitted in FIG. 1), regardless of whether other processing is being executed or not, Tasks that are started as high.

(1) When this task is activated, a switch that forms a short-circuit phase of the converter (for example, when this activation is performed in a section where the total phase is 0 ° to 60 °, that is, in a section of mode 1, An instruction to turn on the switches 32 and 35) is set in the registers 107 and 108, and by turning on these switches, the supply of energy from the power supply to the power converter system is cut off (step F3010).

In this example, the power converter system is a current source inverter / converter system, and from the viewpoint of suppressing overvoltage generation due to current loop loss, energy supply cutoff is performed by turning on the switch to form a short-circuit mode.
When the overvoltage suppression means is complete, all the switches may be turned off to shut off the energy supply.

Also, when the power converter system is a voltage type inverter system or the like, the energy supply can be stopped by turning off the switch of the converter, and when the current side converter is a chopstick, the energy supply can be stopped by turning off the chopstick. The supply cutoff mode will be entered. This is because the switch can be turned on / off with little delay regardless of conditions such as the phase of the power supply because the converter is a self-excited type.

(2) Next, a command to immediately turn on a switch element (an element for short-circuiting the upper and lower arms) for setting the inverter to the short-circuit mode is set, so that the switch element is immediately turned on and the energy of the reactor 4 is consumed. Therefore, a command to connect a resistor (not shown) to both ends of the reactor 4 via a thyristor or the like is generated. The short-circuit mode in this case also considers the occurrence of overvoltage due to the loss of the current loop, as in the case of the short-circuit mode of the converter described above.If the overvoltage countermeasures are sufficient, the short-circuit mode is not formed and the immediate OFF command is issued. What is necessary is just to generate | occur | produce in all the switch elements (step F302)
0).

(3) Then, in order to prevent the event setting process or the like from being performed again and the schedule from turning on the switch, the restart of the schedule process is prohibited, and the emergency cutoff process ends (step F3030). ).

As described above, in the embodiment of the present invention, two self-excited converters using a switch having a self-interrupting ability are collectively controlled by a one-chip microcomputer which is a single control device. It is possible to squeeze quickly, and the system can be protected quickly.

In the above-described embodiment of the present invention, an example in which a transistor is used as a switch element having a self-cutoff function has been described.However, the present invention can be applied to a case where a GTO thyristor, a thyristor with a commutation circuit, or the like is used. Thus, the capacity of the power converter system can be increased. It is also possible to use IGBT, FET, etc.
In this case, another effect of enabling high-frequency switching of the device can be obtained.

Further, in the above-described emergency cutoff process in one embodiment of the present invention, in the process of step F3010, a command for turning on the switch element for forming the short-circuit mode is registered.
The switch elements were set to 107 and 108, and the switch elements were controlled to be ON according to the schedule of the execution controller 113.
When using a microcomputer with the function of directly writing data to the controller as a control device,
The command can be directly written to the output port, and a high-speed cutoff can be performed.

In the embodiment of the present invention shown in FIG. 1 described above, the first power converter is a three-phase converter, and thus has six switch elements constituting the converter, and the second power converter Is a three-phase inverter, so that it also has six switch elements constituting the inverter. Therefore, a total of twelve output ports of the microcomputer 10 are required. However, if the converter is a chopper that receives DC power, the switch element that constitutes the chopper is one, and if the inverter is a single phase, the inverter is If the microcomputer having four output ports is used as a control device, a highly reliable system equivalent to the embodiment of the present invention shown in FIG. 1 can be constructed. it can.

Further, in the example of the task activation shown in FIG. 6, the event setting process F2000 is shared by the event calculation processes F1000 and F1100 at regular time intervals to facilitate management of the switching frequency of the two power converters. For example, the switching frequency on the inverter side (event calculation processing for the inverter)
If you increase the frequency of F1100 and the event setting process F2000),
Since the ripple component of the power applied to the load can be increased in frequency to a small value, another effect of reducing motor noise can be obtained.

In the embodiment of the present invention shown in FIG. 1, the control device is a one-chip microcomputer 10 having one CPU core and a plurality of output ports. Alternatively, the configuration may be such that the components are connected by an external bus. Even in this case, the effects of the present invention are not impaired because the CPU is under the control of the core of the common CPU.

Also, as described above, when separating the CPU core from the output port, an independent I / O chip with a large number of terminals and a general-purpose microcomputer without a very powerful input / output port are used as the output port. Combination, etc. become possible, and the control device
In configuring 10, there is no restriction on the number of pins of the output port, and an effect that an inexpensive general-purpose product can be used can be obtained.

FIG. 8 is a flowchart for explaining the operation of the event calculation processing in another embodiment of the present invention, and FIG. 9 is a switch element.
It is a figure which shows the ON / OFF state of 31-36 and 51-56.

Another embodiment of the present invention has the same hardware configuration as that of the above-described embodiment shown in FIG. 1, and the control method is different.

That is, another embodiment of the present invention is different from the above-described embodiment of the present invention in that the event calculation process F100 for the converter is performed.
0 and an event calculation process F1100 for the inverter are connected and performed simultaneously. Therefore, the flow shown in FIG. 8 is a continuation of the flow shown in FIG. 4 and the flow shown in FIG. 4, and the description thereof is omitted here.

In the other embodiment of the present invention, as described above, the two event calculation processes are linked and performed.
It can be set to perform two event calculation processes immediately before F2000, which has the advantage of being able to set the latest pulse width data as an event, and has the following special effects: .

This special effect will be described with reference to FIG.
In FIG. 9, S31 to S36 and S51 to S56 denote switching elements 31 to 36, 51 to 5 which constitute a converter and an inverter, respectively.
6 shows the ON / OFF command signal supplied from the microcomputer.

First, converter command signals S31 to S36 will be described.

FIG. 9 shows an example in which the total phase θtc obtained in step F4030 of FIG. 8 is in the range of 0 ° to 60 °, that is, in the mode 1 and at a position close to 0 °. Is shown. Therefore, looking at the positive side arm, Δtc
First, S33 is turned on, then S31 is turned on, and finally S32 is turned on. On the other hand, regarding the negative arm, only S35 is always in the ON state during the period of Δtc, and S34 and S36 are always in the OFF state.

The relation of the pulse width is the largest at t _1c ′, followed by t _3c ′ and t _2c ′ (when the conduction ratio γ * is relatively large). Further, a section of (t _1c ′ + t _2c ′) is a section for supplying power from the power supply 1 to the reactor 4, and a section of t _2c ′ is a section where power supply is cut off and the energy of the reactor 4 is recirculated.

On the other hand, the pulse pattern applied to the inverter also shows an example in which the total phase θti exists in mode 1 and is close to 0 °. Order to be turned ON, S53, S51, is _{S52, (t 1i + t 2i} ) section is the power supply section to the electric motor 7, at reflux interval interval t _3i is to bypass without supplying energy to the electric motor is there.

In another embodiment of the present invention, the rises of S53 and S55 are collectively controlled so as to be synchronized with the rises of S33 and S35. The reason is that the energy supply interval from the converter to the inverter _{(t 1c '+ t 2c'} ), if caused to lap as possible energy supply interval to the electric motor (t _1i + t _2i) from the inverter, in the converter reflux section This is because there is an effect that the capacity of the reactor 4, which is a DC intermediate circuit that functions to supply energy to the inverter, can be reduced.

That is, the DC intermediate circuit becomes a source of energy when the inverter needs to supply energy to the motor, and a converter is a source of energy to the DC intermediate circuit. Therefore, if the capacity of the DC intermediate circuit is sufficient, the timing of energy supply from the converter to the DC intermediate circuit becomes irrelevant to the control of the inverter.

In the embodiment of the present invention, since the converter and the inverter are synchronized until the power supply timing of the PWM signal for controlling the switch element is reached, the output energy of the converter can be used as it is as the energy of the inverter. In addition, the capacity of the reactor of the DC intermediate circuit as an energy storage function can be reduced.

In the above description of another embodiment of the present invention, the case where the total phase is close to 0 ° has been described as an example.
o. becomes 1 and the switch element is turned on on the converter side
The order of the signals to be performed is S33, S31, and S32. Of course, the order is different if the overall phase changes, and the mode number also changes.
The order of N / OFF also changes. However, even if the element to be turned ON / OFF changes due to the change of the mode No., the relationship between the supply section and the reflux section does not change, so when the total phase becomes not only around 0 ° but also other values A similar effect can be obtained.

Further, in FIG. 9, even when the order of the signals for turning on the switch elements is S32 → S33 → S31, such that the return section precedes the power supply section, the same sequence is performed on the inverter side. With this arrangement, the same effect can be obtained because the relationship between the supply section and the return section by the converter and the inverter does not deteriorate.

In addition, the power supply sections should be overlapped in consideration of the operation delay when the switch element is turned ON / OFF, such as by setting the fall time constant on the converter side later than the fall time constant on the inverter side. possible to reduce the gap interval t _d between the two if, also when the inverter side of the feeder section is applied to t _d, the current spread than originally calculated value interval in advance t _2i in consideration of the attenuation of the current What is necessary is just to compensate for the attenuation.

Further, in another embodiment of the present invention, it is only necessary to control the two converters in a synchronized manner, so that it is not necessary to limit the number of CPU cores to one as in the hardware configuration shown in FIG. It suffices if the ON / OFF control of the converter and the inverter can be controlled synchronously using two CPU cores. As a means to do this, use a common microcomputer clock,
Alternatively, there is a means for achieving synchronization by interrupting the microcomputers.

In this way, when a multi-microcomputer is used, the processing can be shared between two CPUs, so that it is not necessary to use a high-level microcomputer, and an inexpensive one can be used. Can be obtained.

Next, another embodiment of the present invention will be described in which the DC intermediate circuit can be further miniaturized by preventing the reflux section on the converter side from overlapping with the power supply section on the inverter side.

In this embodiment, the duty ratio γ * on the converter side is set to a value slightly larger than the initially calculated value, and t _1c ′ to t _3c ′ are set (in other words, the power supply section is expanded). The duty ratio control such as the process F1060 shown in FIG. 2 is introduced into the control of the inverter, and the point that the power supply section on the inverter side is narrowed and the duty ratio on the converter side is increased is corrected. The amount of power supply is the same as in the initial state, and the reflux section of the converter does not overlap the power supply section of the inverter. This makes it possible to further reduce the size of the reactor, which is a DC intermediate circuit.

Although the effect of the above-described embodiment has been described with respect to the reduction of the capacity of the reactor of the DC intermediate circuit, the following effect is further produced by the reduction of the capacity of the reactor. That is, in the current-source converter / inverter system shown in FIG. 1, if the DC reactor 4 is miniaturized, the level of overvoltage generated at the time of a power failure or the like also becomes low, and a simple protection circuit for suppressing this is sufficient. Become
The reliability of the entire system can also be improved.

[Effects of the Invention] As described above, according to the present invention, two self-excited converters sandwiching a DC intermediate coupling circuit can be collectively managed by the control device, so that the self-excited converters can be quickly operated. In combination with the simple response and the simple configuration of the control device, it is possible to obtain an effect that the power converter system can be constructed with high reliability.

Further, since the two self-excited converters can be controlled in synchronization, the capacity of the reactor of the DC intermediate circuit can be reduced, and the entire device can be reduced in size.

[Brief description of the drawings]

FIG. 1 is a block diagram showing the configuration of one embodiment of the present invention, FIGS. 2 to 7 are diagrams for explaining the operation of one embodiment of the present invention, and FIGS. FIG. 6 is a diagram for explaining the operation of the embodiment. 1 ... three-phase AC power supply, 2, 6 ... capacitor for suppressing overvoltage, 3 ... current source converter, 31 to 36 ... transistors constituting its main switching element, 4 ... DC reactor, 5 ... Current source inverters, 51 to 56, transistors constituting their main switching elements, 7, induction motors, 8, DC current detectors, 9, comparators, 10
... One-chip microcomputer, 101 ... Input port, 102 ... Internal bus, 103 ... ROM, 104 ... RAM, 105 ... ALU, 107 ...
... Event setting register, 108 ... Time setting register, 109 ...
... holding register, 110 ... associative memory, 111 ... timer
112... Comparison unit, 113.

──────────────────────────────────────────────────続 き Continuing from the front page (72) Inventor Sadao Hokari 4026 Kuji-cho, Hitachi City, Ibaraki Prefecture Inside Hitachi, Ltd.Hitachi Research Laboratory (72) Inventor Kiyoshi Nakata 4026 Kuji-cho, Hitachi City, Ibaraki Prefecture Hitachi Research, Ltd. In-house (72) Inventor Takeki Ando 1-6-6 Kandanishikicho, Chiyoda-ku, Tokyo Within Hitachi Elevator Service Co., Ltd. (72) Inventor Naoyuki Ouchi 3-2-1 Sachimachi, Hitachi-shi, Ibaraki Pref. Hitachi Engineering Co., Ltd. 56) References JP-A-2-17865 (JP, A) JP-A-1-238466 (JP, A) JP-A-62-163579 (JP, A) JP-A-60-9373 (JP, A) (58) ) Surveyed field (Int.Cl. ⁷ , DB name) H02M ⁷ /42-7/98

Claims (4)

(57) [Claims] An AC power supply or a DC power supply is input, and a first converter for converting the DC power into DC power, a DC intermediate circuit connected to an output of the converter, and a DC intermediate circuit connected to an output of the intermediate circuit. And a second converter for converting the pulse width into an alternating current. The power converter system includes a microprocessor, and controls a pulse width of each PWM pulse signal so as to independently perform PWM control on the first and second converters. Determine the pulse width control unit and the PWM created by this pulse width control unit
An output port section for outputting a pulse signal to the outside, wherein the output port section outputs the PWM pulse signal in synchronization with the first and second converters. 2. A power converter system according to claim 1, wherein pulse signals output to said first and second converters have the same frequency. 3. A first converter for receiving an AC power supply or a DC power supply and converting it into a DC power, a DC intermediate circuit connected to an output of the converter, and a DC intermediate circuit connected to an output of the intermediate circuit. And a second converter for converting the pulse width into an alternating current. The power converter system includes a microprocessor, and controls a pulse width of each PWM pulse signal so as to independently perform PWM control on the first and second converters. Determine the pulse width control unit and the PWM created by this pulse width control unit
An output port section for outputting a pulse signal to the outside, wherein an energization mode period from the second converter to the load overlaps an energization mode period from the first converter to the DC intermediate circuit. A power converter system, wherein a PWM pulse signal is output from the output port unit to the first and second converters. 4. A first converter for receiving an AC power supply or a DC power supply and converting the same to DC, a middle intermediate circuit connected to an output of the converter, and a DC converter connected to an output of the intermediate circuit. Power converter system comprising: a second converter for converting a signal to an alternating current; and determining a pulse width of each pulse signal including the microprocessor and driving the first and second converters. A pulse width control unit, an emergency shutoff unit that turns off all the switching elements constituting the first and second converters in the event of an abnormality, and a pulse signal generated based on the pulse width control unit and the emergency cutoff unit. An output port for outputting to the outside, and from this output port, the pulse signal of the emergency cutoff unit is output to the first and second converters with priority over the pulse signal of the pulse width control unit. Power converter system according to claim Rukoto.