JP3029738B2 - Error detection method for multiple block transmission frames - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for detecting an error in a transmission frame composed of a plurality of data blocks by using an error detection code. In the drawings, the same reference numerals indicate the same or corresponding parts.

[0002]

2. Description of the Related Art FIG. 3 is an explanatory diagram of a conventional error detection method in this type of data transmission. In the figure, 1 is a transmission frame, and 2 (2-1 to 2-3) are data blocks (block #
1 to # 3 or the first to third blocks),
3 (3-1 to 3-3) correspond to the data block 2-1.
To 2-3 (data # 1 to # 3 for convenience)
3), and CRC1 to CRC3 are CRCs (cyclic redundancy check: also referred to as cyclic codes) as error detection codes constituting the data blocks 2-1 to 2-3, respectively.

Conventionally, error detection is performed independently for each block 2 as a unit. An error detection mechanism based on CRC which is generally used includes an encoder for performing an operation using a shift register and a decoder. That is, the thick solid lines corresponding to in FIG. 3 indicate the range of valid data corresponding to CRC1 to CRC3, respectively, and the upward arrows indicate the initialization time points of the encoder and the decoder, respectively.

FIGS. 4 (A) and 4 (B) show the operation procedures of the transmission source encoder and the transmission destination decoder, respectively.
The reference numerals in S15 denote the steps in FIG.
Symbols in S25 indicate the steps in FIG. Referring to the figure, a transmission source first inputs block data 3-1 to an encoder in which an initial value is set (S11, S12), calculates a CRC from the data 3-1 (S13), and calculates the calculated CRC. This operation is added to the data 3-1 of the block 2-1 (S14), and the above operation is repeated for all the remaining data blocks 2-2 and 2-3 (S15 → S11).
繰 S15), and the transmission frame 1 is created.

At the transmission destination, an initial value is set in the decoder (S21).
Enter 1. And this input data (that is, data 3
CRC is calculated from the data obtained by adding CRC1 to -1 (S23). If the result of the CRC calculation becomes a certain value (S24, branch Y), the received data is determined to be correct. (S24, branch N), it is determined that the received data is incorrect. While the data received here is correct, the above operation is performed on all remaining data blocks 2-
Repeat steps 2 and 2-3 (S25 → S21-S2
5), and the error check of the received transmission frame 1 is completed.

[0006]

Therefore, when the transmission frame 1 is divided into a plurality of blocks, it is necessary to initialize an encoder or a decoder every time in each block within one transmission frame, Must be coded or decoded without delay, and in data transmission, which tends to be faster, there is a problem of delay due to initialization of an error detection mechanism and enlargement of a device.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method of detecting an error in a multi-block transmission frame which can simplify the error detection mechanism of the apparatus without deteriorating the performance of the conventional error detection.

[0008]

In order to solve the above-mentioned problems, an error detection method according to the present invention provides a method for detecting each block data (3) of a transmission frame (1 or the like) composed of a plurality of data blocks (2 or the like). This is a method of performing an error detection for each data block by adding a cyclic code (CRC) to each of the data blocks. The cyclic code having the effective range of the contents of the frame from the head of the transmission frame to each corresponding data block is used. It is added to each block data.

[0009]

The CRC calculation start position (initialization position) provided for each data block is shared and placed at the head of the transmission frame. The valid range of the CRC is from the position where the CRC is initialized to the position where the CRC is set. Since only the start position of the transmission frame is initialized, the CRC set for each block at the transmission source has an effective range from the start of the transmission frame to each block at the transmission destination. Become.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIGS. FIG. 1 is an explanatory diagram of an error checking method as an embodiment of the present invention, and corresponds to FIG.
4B is a flowchart showing the operation procedure of the encoder and the decoder, respectively, and corresponds to FIGS. 4A and 4B.

FIGS. 1 and 2 are different from FIGS. 3 and 4 in that the initialization of the encoder and the decoder is performed only at the beginning of the transmission frame 1. Next, FIG. 2 will be described with reference to FIG. In FIG. 2A, at the transmission source, an initial value is set in the encoder in advance (S11), and the first block 2-
A CRC (CRC1) is generated from the data 3-1 of S1 (S1).
12, S13), and is added to the first block data 3-1 (S14) (FIG. 1). In the next second block 2-2, the state of the first block is continued without initializing the encoder (that is, the CRC1 data is left in the encoder).
Encode. Therefore, a CRC (CRC2) is generated by inputting the data 3-1 of the first block 2-1 and the data 3-2 of the second block 2-2 from outside (S1).
2 to S14) (FIG. 1).

By repeating the steps S12 to S14 in the same manner for the remaining third block 2-3, a valid CRC (CRC) from the first block is obtained for each block.
1 to CRC3) are added. Also, in FIG. 2B, at the transmission destination, the initial value is set in the decoder (S21), and the first block 2-1 is inspected (S22 to S24) (FIG. 1), and the second block 2-2 continuously inspects the state of the first block without initializing the decoder (S25 → S22 to S24) (FIG. 1).
). By sequentially continuing in this manner, error detection is performed for each block.

[0013]

According to the present invention, a method is employed in which the error detection start position of a transmission frame is not divided for each block, but is placed at the head of the transmission frame in common for each block and the effective range up to each corresponding block is adopted. Therefore, a mechanism related to initialization in the second block and thereafter is not required, the apparatus can be simplified, and the speed of data transmission can be increased.

[Brief description of the drawings]

FIG. 1 is an explanatory diagram of an error detection method according to an embodiment of the present invention.

FIG. 2 is a flowchart showing an operation procedure of the encoder and the decoder.

FIG. 3 is a conventional explanatory diagram corresponding to FIG. 1;

FIG. 4 is a conventional flowchart corresponding to FIG. 2;

[Explanation of symbols]

 1 Transmission frame 2 (2-1 to 2-3) Data block 3 (3-1 to 3-3) Data CRC (CRC1 to CRC3) Cyclic code

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H04L 1/00 G06F 11/10 330

Claims (1)

(57) [Claims] 1. A method for performing an error detection for each data block by adding a cyclic code to each block data of a transmission frame composed of a plurality of data blocks, comprising: An error detection method for a multi-block transmission frame, wherein a cyclic code having an effective range of a frame up to a block is added to each block data.