JP3025408B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device including a step of forming a semiconductor layer by a thin film process. In particular, the present invention obtains a semiconductor layer made of a polycrystalline or single crystal having a large grain size by irradiating ultraviolet rays on a polycrystalline or amorphous semiconductor layer formed over a large-area substrate and annealing the layer. The present invention relates to a method for irradiating ultraviolet rays when obtaining a semiconductor layer made of single crystal, polycrystal or amorphous in which impurities are activated by the above-mentioned annealing.

[0002]

2. Description of the Related Art In recent years, large and high-resolution liquid crystal panels,
As the demand for a high-speed, high-resolution contact image sensor increases, it is desired to uniformly manufacture a high-performance thin film transistor (TFT) on a large-area insulating substrate.

Here, for example, a TFT has a polycrystalline semiconductor layer formed on a glass substrate which has a low strain point temperature but is inexpensive and which can be easily formed in a large area, and a channel is formed on the surface of the polycrystalline semiconductor layer. It is manufactured by forming a semiconductor active region, low-resistance source and drain electrodes, and a gate electrode. By the way, when a glass substrate having a low strain point temperature is used,
Since it is necessary to reduce thermal damage to the glass substrate, a polycrystalline semiconductor layer has been obtained by the following method.

One is to deposit an amorphous silicon layer (hereinafter also referred to as a-Si layer) on a glass substrate,
This is annealed with ultraviolet light emitted from an excimer laser to form a polycrystalline silicon layer (hereinafter referred to as poly-S).
Also called i-layer. ). The other is to deposit an a-Si layer on a glass substrate, form a poly-Si layer by solid-phase growth using a thermal diffusion furnace or the like, and anneal with an ultraviolet ray irradiated from an excimer laser to obtain large grains. This is a method for obtaining a poly-Si layer having a diameter.

[0005] The ultraviolet light emitted from the above-mentioned excimer laser is emitted by a beam homogenizer or the like for about 10 minutes.
Although it can be a beam spot of mm square, it is smaller than a glass substrate. For this reason, as shown in FIG.
Laser beam irradiation is continuously performed while scanning the beam spot 3 of the excimer laser on the glass substrate 1 to perform annealing of the large-area polycrystalline or amorphous semiconductor layer 2 deposited on the glass substrate. I was going.

At this time, in order to prevent a portion not irradiated with ultraviolet rays from being generated and to prevent annealing from being incomplete due to a rapid decrease in irradiation energy at the end of the irradiation area of the beam spot, the beam is not completely irradiated. Measures are taken such as irradiating the spot so that the edges of the adjacent irradiation areas overlap. Regarding such a method of laser irradiation, for example, JP-A-58-56316,
Various types are disclosed in JP-A-3-72617, JP-B-5-80159, and JP-A-5-190451.

[0007] In addition, the ultraviolet light emitted from the excimer laser can be formed into a long beam by passing through a beam homogenizer, an optical unit, or the like. However, in this elongated beam, a glass having a size of, for example, 10 cm square is used. The entire surface of the substrate cannot be covered. For this reason, as shown in FIG. 7, pulsed laser irradiation is continuously performed while moving a long beam of the excimer laser on the glass substrate 1 in a predetermined direction, for example, in a direction perpendicular to the long direction. To anneal a large-area polycrystalline or amorphous semiconductor layer 2 deposited on a glass substrate (see JP-A-3-286518). In FIG. 7, reference numeral 18a denotes an area where a gate bus wiring is to be arranged;
Reference numeral 8b denotes a region where a source bus line orthogonal to the gate bus line is to be arranged. Reference numerals 19a and 19b denote areas on one end side of the bus wiring arrangement areas 18a and 18b where the drivers for the respective bus wirings are to be arranged. The above-described annealing is performed not only in the case of crystallization of the semiconductor layer but also in the case of activating the semiconductor layer containing impurities in the same manner as described above.

[0008]

However, in the above-described irradiation method using a beam spot, the total amount of energy irradiated at the overlapping portion of the beam spot is made the same as that of the other portion other than the overlapping portion, thereby irradiating the beam. It is difficult to make the irradiation energy uniform over the entire area. As a result, there is a problem that a film stress increases or surface flatness deteriorates at the overlapping portion, and a high-quality polycrystalline semiconductor layer cannot be obtained.

Further, as shown in FIG. 5, even if the beam spot is shifted in the scanning direction at a pitch sufficiently smaller than the size of the beam spot and the beam spot is radiated for each pitch, The same problem as described above occurs.
This is because the variation in the amount of irradiation energy between the irradiation shots of the beam is several percent, so that the total amount of energy irradiated in each portion on the semiconductor layer is not uniform.

Further, as shown in FIG. 7, the use of a long beam improves the uniformity of irradiation energy in the long direction, but does not improve the uniformity of irradiation energy in the scanning direction. This is because, even in the case of a long beam, there is a variation in energy between irradiation shots of the beam, as in the case of the beam spot. Therefore,
TFT in the direction perpendicular to the longitudinal direction of the long beam (scanning direction)
Variations in characteristics occur. For example, in the long beam irradiation process shown in FIG. 7, since the scanning direction of the long beam coincides with the direction in which the source bus wiring extends,
This causes a defect along a gate bus line orthogonal to the source bus line.

As a result, in a high-resolution liquid crystal panel, an image sensor, or the like, a defect in screen display or reading caused by such a variation in TFT characteristics is likely to be noticeable to human eyes. Will be.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problem. Even if the irradiation energy of the semiconductor layer subjected to the annealing process varies in the scanning direction of the long beam, the semiconductor layer is not removed. It is possible to avoid the variation in the characteristics of the formed TFT along the gate bus wiring and the source bus wiring, and thereby the TFT in a high resolution liquid crystal panel, an image sensor, or the like.
It is an object of the present invention to provide a method for manufacturing a semiconductor device that can reduce the influence of variations in characteristics.

[0013]

According to a method of manufacturing a semiconductor device of the present invention, a polycrystalline or amorphous semiconductor layer formed on an insulating substrate is annealed by irradiating an energy beam to obtain a larger grain size. Forming a polycrystalline or single-crystal semiconductor layer; and forming a plurality of desired elements in the semiconductor layer subjected to the annealing treatment. The annealing treatment includes forming an energy beam having a long beam shape. The scanning is performed in a direction other than the direction parallel to and perpendicular to the arrangement direction of the elements formed on the semiconductor layer, thereby achieving the above object.

According to the method of manufacturing a semiconductor device of the present invention, a single-crystal, polycrystalline or amorphous semiconductor layer containing impurities formed on an insulating substrate is annealed by irradiation with an energy beam. Activating the impurities;
Forming a plurality of devices using the semiconductor layer subjected to the annealing process as a contact region, wherein the annealing process is performed by arranging an energy beam having a long beam shape in an array of devices formed in the semiconductor layer. The scanning is performed in a direction other than the direction parallel to the direction and the direction perpendicular to the direction, thereby achieving the above object.

[0015]

In the present invention, when the semiconductor layer on the substrate is annealed by irradiation with a long beam, the semiconductor layer is oriented in a direction other than a direction parallel to and perpendicular to the arrangement direction of the elements formed on the semiconductor layer. Since the long beam is scanned, even if the irradiation energy varies in the scanning direction of the long beam, variations in the characteristics of elements such as TFTs formed in the semiconductor layer occur in the element arrangement direction. Can be avoided.

Thus, in a high-resolution liquid crystal panel or an image sensor having a TFT for each pixel, even if the TFT characteristics vary in the scanning direction of the beam, the failure of the pixel is not caused by the gate bus line or the source. It is possible to avoid the situation along the bus wiring. As a result, in a high-resolution liquid crystal panel, an image sensor, or the like, it is possible to make it difficult for human eyes to have an adverse effect on screen display and reading caused by variation in TFT characteristics.

[0017]

Embodiments of the present invention will be described below.

(Embodiment 1) FIG. 1 is a diagram for explaining an annealing process in a method of manufacturing a semiconductor device according to an embodiment of the present invention, and FIG. 2 is a diagram for explaining a method of manufacturing the semiconductor device in the order of steps. It is. In the figure, reference numeral 2 denotes an amorphous silicon layer formed on a glass substrate 1. On the amorphous silicon layer 2, a region 18a where a gate bus wiring 8a is to be arranged, and a source bus wiring orthogonal to the gate bus wiring 8a. An area 18b in which 8b is to be arranged is set. Areas 19a and 19b where drivers for the respective bus lines are to be disposed are set at one end sides of the arrangement areas 18a and 18b of the respective bus lines. here,
The long beam irradiation area A is set so that its longitudinal direction is not parallel or perpendicular to the direction in which the wirings extend. The scanning direction of the irradiation area A on the glass substrate 1 is a direction perpendicular to the longitudinal direction.

Next, the manufacturing method will be described.

In a large-area liquid crystal panel or a close contact type image sensor, a plurality of thin film transistors are formed on an insulating substrate as active elements. A glass substrate 1 is used as the insulating substrate, and LP (liquid phase) CV
An amorphous silicon film (a-Si film) 2 is deposited on a 50 nm thick film at a deposition temperature of 550 ° C. by a method D (FIG. 2).
(A)).

Next, an excimer laser (XeCl 308)
nm), the a-Si layer 2 is annealed to anneal the polycrystalline silicon layer (poly-Si layer).
A layer) 2a is formed (FIG. 2B).

The deposition of the a-Si film 2 is performed by a sputtering method,
The annealing may be performed by a PE (plasma) CVD method or the like, and the annealing may be performed by an excimer laser (KrF: 248 nm).

A long beam of an excimer laser can be obtained by passing an output beam of the excimer laser through a beam homogenizer, an optical unit (not shown), or the like. For example, for a substrate having a screen of 5 inch square, the irradiation area A of the long beam has a size of about 200 mm × 0.5 mm square. In this case, the uniformity of energy in the long beam can be made ± 5% or less.

In the crystallization annealing, the angle θ between the scanning direction of the long beam and the matrix wiring at the time of completion of the substrate, that is, the gate bus wiring or the source bus wiring is 0 ° or 90 °. The relative movement is performed so as to have an angle other than ゜, preferably 30 ゜ 60 ゜ or 120 ゜ -150 ゜.

FIG. 1 shows a state in which a long beam moves on the amorphous silicon film 2 deposited on the glass substrate 1 by 0.5 mm or less, for example, by 0.1 mm, and scans the entire surface of the amorphous silicon film 2. Is shown.

First, the substrate is placed on the stage such that the angle θ between the scanning direction of the long beam and the matrix wiring to be arranged on the substrate is a predetermined angle other than 0 ° and 90 °. Place. The irradiation area A of the long beam is positioned at the right side corner of the glass substrate 1 at a pitch of 0.1 mm in the left side direction (X direction) of the paper. One-shot pulse irradiation is performed.

Thus, scanning by the irradiation area A of the long beam is performed over the entire surface of the amorphous silicon film 2 deposited on the glass substrate 1. At this time, the energy density in the irradiation area is 250 mJ / cm ^{2 to} 450 m
J / cm ² .

The above-described annealing may be performed by scanning the entire surface of the amorphous silicon layer 2 twice or more with long beams having different energy densities.
The heating may be performed by heating to 500 ° C.

Next, the polycrystalline silicon layer 2a is patterned into an island shape to form an island portion 3 for each thin film transistor. Next, a silicon oxide (SiO ₂ ) film is deposited to a thickness of 100 nm by TEOS (tetraethylorthosilane) CVD to form a gate insulating film 4. An aluminum (Al) film is deposited thereon by sputtering, and the aluminum film is patterned by photolithography to form a gate bus wiring 8a including the gate electrode 5 (FIG. 2C).

Next, predetermined ions, for example, phosphorus for an n-ch TFT, are added to the island-shaped portion 3 by ion implantation.
For -ch TFT, boron is implanted. Then, activation annealing is performed by irradiation with excimer laser to activate the impurities, thereby forming the source region 3a and the drain region 3b in the island-shaped portion 3.

The activation annealing is performed in the same manner as the crystallization annealing as shown in FIG. At this time, the angle θ between the scanning direction of the long beam of the excimer laser and the matrix wiring when the substrate is completed is an angle other than 0 ° and 90 °, preferably in the range of 30 ° to 60 ° or 120 ° to 150 °. The long beam is moved relatively to the glass substrate so as to have an angle within the range. Thereby, the glass substrate 1
A long beam scans the entire surface of the island 3 including the source region 3a and the drain region 3b formed thereon. At this time, the energy density in the irradiation area of the long beam is 250
and ^{mJ / cm 2 ~450mJ / cm 2} .

Then, silicon nitride (SiN _x ) is deposited to a thickness of 400 nm by PE (plasma) CVD to form an interlayer insulating film 6. The interlayer insulating film 6 is made of TEO
Silicon oxide (SiO ₂ ) by the SCVD method may be used.

A contact hole 7 is formed in a portion of the gate insulating film 4 and the interlayer insulating film 6 corresponding to each of the source 3a region and the drain region 3b, and an aluminum film is deposited and patterned to form wirings 8b and 8c (FIG. 2 (d)).

Next, the function and effect will be described.

As described above, by scanning the long beam of the excimer laser so that the irradiation area A is shifted at a pitch of 0.1 mm, even if the energy density varies in the scanning direction in the long beam. In addition, the crystallization process and the activation process can be made uniform. This is Figure 4
This is because the irradiation area A proceeds at a small pitch as shown in FIG. 4 and the total amount of irradiation energy becomes uniform in each portion of the amorphous silicon layer.

However, the variation between the irradiation shots of the long beam is absorbed and uniformed to some extent because the irradiation area A advances at a small pitch as shown in FIG. 5, but is completely uniform. It is not reflected and is slightly reflected in the crystallization process and the activation process.

When variations in the TFT characteristics due to the subtle variations occur along the gate bus wirings 8a and the source bus wirings 8b, a high-resolution liquid crystal panel, an image sensor, or the like has a problem in performing screen display and reading.
The above-mentioned problem due to the variation in the TFT characteristics is likely to be noticeable to human eyes.

The driver of each bus line usually has a configuration in which a plurality of the same circuits are arranged along the arrangement direction of the corresponding bus lines so that connection with each bus line can be easily performed. For this reason, when variation in TFT characteristics occurs along the gate bus wiring due to variation in each irradiation shot, for example, not only crystallinity or activation failure occurs in some of the source bus wirings, but also, The circuit corresponding to the wiring in which the defects are concentrated also has a characteristic defect. As a result, defects due to variations in TFT characteristics become more conspicuous (FIG. 3B).

On the other hand, by making the scanning direction of the energy beam oblique to the matrix wiring of the substrate as in the present embodiment, slight variations in TET characteristics are caused in the gate bus wiring 8a and the source bus wiring 8b. Can be avoided. This makes it difficult for human eyes to perceive adverse effects on screen display and reading caused by variations in TFT characteristics in high-resolution liquid crystal panels and image sensors (FIG. 3A). .

As described above, in this embodiment, when the semiconductor layer on the substrate is annealed by irradiating a long beam, scanning is performed in a direction other than 0 ° and 90 ° with the matrix wiring when the substrate is completed. , TFT in the longitudinal direction of the beam
Even if the characteristics vary, it is possible to avoid the occurrence of a defect along the gate bus wiring or the source bus wiring. As a result, in a high-resolution liquid crystal panel, an image sensor, or the like using the semiconductor layer processed by the long beam, it is possible to make it difficult for a human to see a problem in displaying or reading an image.

In the above embodiment, the case where the polycrystalline silicon layer is used as the semiconductor active layer of the thin film transistor has been described. However, the polycrystalline silicon layer may be used as a gate electrode, a wiring and the like. In addition, the present invention not only modifies the polycrystalline silicon layer, but also monocrystal silicon, Ge, Si-
It can be applied to the formation of other semiconductor films such as Ge.

[0042]

As described above, according to the present invention, when a semiconductor layer on a substrate is annealed by irradiating a long beam, a direction parallel to and perpendicular to an arrangement direction of elements formed on the semiconductor layer is obtained. The long beam is scanned in a direction other than the long direction, so that even if the irradiation energy varies in the scanning direction of the long beam, the variation in the characteristics of elements such as TFTs formed in the semiconductor layer varies. Can be avoided in the arrangement direction of the elements.

Thus, in a high-resolution liquid crystal panel or an image sensor having a TFT for each pixel, even if the TFT characteristics vary in the beam scanning direction, the failure of the pixel is not caused by the gate bus line or the source. It is possible to avoid the situation along the bus wiring. As a result, there is an effect that adverse effects on screen display and reading caused by variations in TFT characteristics in a high-resolution liquid crystal panel, an image sensor, and the like can be made less noticeable to human eyes.

[Brief description of the drawings]

FIG. 1 is a diagram for explaining an annealing process by irradiation with a long beam in a method for manufacturing a semiconductor device according to one embodiment of the present invention.

FIG. 2 is a sectional view showing a manufacturing process of a thin film transistor in the method of manufacturing a semiconductor device according to the embodiment.

FIG. 3 is a schematic diagram illustrating a state of screen display on a liquid crystal panel or the like using a thin film transistor according to the present invention and a conventional annealing process.

FIG. 4 is a graph showing a uniform distribution of energy density in a scanning direction in a long beam.

FIG. 5 is a graph showing a non-uniform distribution of energy density in a scanning direction in a long beam.

FIG. 6 is a diagram illustrating an annealing process by beam spot irradiation in a conventional method for manufacturing a semiconductor device.

FIG. 7 is a diagram illustrating an annealing process by irradiation with a long beam in a conventional method for manufacturing a semiconductor device.

[Explanation of symbols]

 Reference Signs List 1 glass substrate 2 amorphous silicon layer 2a polycrystalline silicon layer 3a source region 3b drain region 4 gate insulating film 5 gate electrode 6 interlayer insulating film 7 contact hole 8a gate bus wiring 8b source bus wiring 8c drain electrode (pixel) 18a gate bus wiring 18b Source bus wiring placement area 19a, 19b Driver placement area A Long beam irradiation area

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ identification code FI H01L 29/786 (58) Investigated field (Int.Cl. ⁷ , DB name) H01L 21/20 H01L 21/265 H01L 21/268 H01L 29/786

Claims (2)

(57) [Claims] A step of annealing a polycrystalline or amorphous semiconductor layer formed on an insulating substrate by irradiation with an energy beam to form a polycrystalline or single crystal semiconductor layer having a larger grain size; Forming a plurality of desired elements on the semiconductor layer that has been subjected to the annealing treatment. The annealing treatment includes the step of applying an energy beam having a long beam shape to the arrangement direction of the elements formed on the semiconductor layer. Manufacturing method of a semiconductor device by performing scanning in directions other than parallel and vertical directions. A step of annealing the single-crystal, polycrystalline or amorphous semiconductor layer containing impurities formed on the insulating substrate by irradiation with an energy beam to activate the impurities of the semiconductor layer; Forming a plurality of devices each having the semiconductor layer subjected to the annealing process as a contact region, wherein the annealing process is performed by applying an energy beam having a long beam shape to the array direction of the devices formed in the semiconductor layer. A method of manufacturing a semiconductor element by scanning in a direction other than a direction parallel to and perpendicular to the semiconductor device.