JP3013602B2 - Video signal encoding device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video signal encoding apparatus suitable for, for example, compressing information of a moving image signal and recording it on a predetermined recording medium with a constant code amount.

[0002]

2. Description of the Related Art FIG. 21 is a block diagram of a conventional video signal encoding apparatus for performing code amount control. 1 is a digital video input terminal, 2 is a blocking circuit for blocking the digital video input signal, 8 is a reference field and motion compensation prediction for the video signal block output from the blocking circuit 2, A motion compensation circuit that outputs a prediction error with respect to a block in units of a block. 8 is a switch circuit for selecting the output of No. 8. Reference numeral 5 denotes an orthogonal transformation circuit for performing orthogonal transformation on the image data block output from the switch circuit 3, reference numeral 10 denotes a quantization circuit for quantizing image data output from the orthogonal transformation circuit 5, and reference numeral 7 denotes a quantization circuit 10. An encoding circuit for variable-length encoding the output, 11 is a buffer memory for storing the output of the encoding circuit in a fixed capacity and outputting it, and 9 is an output terminal.

Next, the operation will be described. For example, a 4: 2: 2 component digital signal is input to the input digital video input signal, and the blocker circuit 2 generates 8 [pixels] regardless of the intra-field in which motion compensation prediction is not performed and the prediction field in which motion compensation prediction is performed. ]
The input block is divided into input blocks each having × 8 [lines] as one unit. The output of the blocking circuit 2 is input to a motion compensation circuit 8, which is reconstructed from past output blocks, performs image data of a reference field stored in the motion compensation circuit 8, and performs motion compensation prediction. The prediction error of each pixel with respect to the block is output to the switch circuit 3.
On the other hand, the output of the blocking circuit 2 is also input to the switch circuit 3. The switch circuit 3 selects the output of the blocking circuit 2 in the case of the intra field, and selects the output of the motion compensation circuit 8 in the case of the prediction field. The orthogonal transform circuit 5 performs, for example, discrete cosine transform (hereinafter abbreviated as DCT) on the image data output from the switch circuit 3,
Output to the quantization circuit 10.

The output of the quantization circuit 10 is also input to the motion compensation circuit 8. In the motion compensation circuit 8, after the image data output from the quantization circuit 10 is decoded by inverse quantization and inverse orthogonal transform processing, in the case of a prediction field, a reference field used for obtaining a prediction error at the time of encoding is used. The reproduced image is restored by adding the data, and is stored as reference data. In the case of an intra field, data decoded by inverse quantization and inverse orthogonal transform processing is stored as reference data as it is.

On the other hand, the quantization circuit 10 includes a buffer memory 11
The quantization step is determined according to the residual data amount of the memory stored in the memory, and the image data is quantized. That is, when there is room in the residual data in the buffer memory 11, the amount of generated data is increased by controlling so that a small quantization step size is selected. On the other hand, if the buffer memory 11 is about to exceed its allowable amount, the data generation amount is reduced by controlling so that a large quantization step size is selected.

[0006] The image data output from the quantization circuit 10 is subjected to variable length encoding in the encoding circuit 7, and the encoded data is output to the buffer memory 11. The coded image data is stored in the buffer memory 11 and read out at a predetermined fixed rate, and transmission or magnetic recording is performed. At the same time, the buffer memory 11 detects the amount of remaining data, and outputs a control signal corresponding to the amount of remaining data to the quantization circuit 10, thereby controlling the quantization step of the quantization circuit 10 to generate the data amount. Can be kept constant.

[0007]

The conventional video signal encoding apparatus is constructed as described above. However, a moving image to be encoded includes an image having a sharp movement or a scene change or the like. In such a case, the amount of encoded data changes abruptly, and the buffer memory overflows.

The present invention has been made in view of such circumstances, and the information amount of image data is estimated by simple hardware, and the actual quantization parameter is controlled according to the estimation result to keep the information amount constant. It is characterized by the following.

[0009]

A video signal code according to the present invention.
The encoding device divides the input video signal into blocks,
Video signal encoding to quantize and encode after orthogonal transformation
Device for dividing a video signal into blocks of predetermined pixels
And the neighboring pixels in each block
A difference calculating means for calculating a sum of absolute values of differences between
Block when quantized and coded by the childization step
Predict the amount of data generated per unit from the output of the difference calculation means
Output from the code amount prediction means and the code amount prediction means
Estimate the amount of data for each block by one field or
Addition means for adding a plurality of blocks for one frame
And addition means for multiple fields or multiple frames
Code amount ratio calculating means for obtaining the output ratio of
Each field or based on the output of the code amount ratio calculation means
Quantization step to determine quantization step for each frame
Determining means and a quantization step from the quantization step determining means.
Quantizer that quantizes the orthogonally transformed data
And a step. Also, the video signal according to the present invention
The encoding device divides the input video signal into blocks
Video signal code to be quantized and coded after orthogonal transformation.
An encoding device for converting video signals into two or more adjacent video signals.
Divide into macro blocks consisting of blocks
Some blocks that make up a macroblock from blocks
And a block generator that outputs
Calculating means for calculating the sum of absolute values of differences between adjacent pixels
And a field quantized and coded by a predetermined quantization step.
If the amount of data generated in block units
Code amount prediction from the output of the difference calculation means corresponding to
Means and some blocks output from the code amount predicting means
Adding means for adding a plurality of blocks of the predicted data amount of
For a plurality of macroblocks based on the output of the adding means
Quantization step determining means for determining a quantization step;
Directly by the quantization step from the quantization step determination means
And a quantizing means for quantizing the transformed data.
Be composed. Also, a video signal encoding device according to the present invention
Splits the input video signal into blocks and performs orthogonal transform
Video signal encoding device that quantizes and encodes
Thus, the video signal is divided into blocks of predetermined pixels.
And the dynamic range within each block.
Dynamic range calculating means, and a predetermined quantization step.
Generated in blocks when quantized and coded by
Is the output of the dynamic range calculation means
Code amount prediction means for predicting from code amount and output from code amount prediction means
The amount of predicted data in block units to be
Or add multiple blocks for one frame.
Calculation means and additions for multiple fields or multiple frames.
Code amount ratio calculating means for calculating the output ratio of the calculating means;
Each field based on the output of the stage and the code amount ratio calculating means
Or the quantization step that determines the quantization step for each frame.
Step determining means and quantum from the quantization step determining means.
To quantize the data orthogonally transformed by the quantization step
And a child means. Also, according to the present invention,
The image signal encoding device converts the input video signal into blocks.
After dividing and orthogonally transforming, quantizing and encoding video signals
Signal encoding apparatus, wherein two or more video signals are adjacent to each other.
Divide it into macro blocks consisting of the upper block
Some blocks that make up macroblocks from black blocks
Block output means and outputs
Range calculation to find the dynamic range of
Means for quantizing and encoding by a predetermined quantization step
The amount of data generated in units of blocks when
From the output of the dynamic range calculation means corresponding to the
The code amount predicting means to be predicted and the output
Of the predicted data of some blocks
Adder means for calculating a plurality of matrices based on an output of the adder means.
Quantization to determine the quantization step for black blocks
Step determining means and quantity from quantization step determining means
Quantizes the data that has been orthogonally transformed by the childization step
And a quantization means.

[0010]

According to the video signal encoding apparatus of the present invention, the difference calculation
The means calculates the absolute difference between adjacent pixels in each block.
The sum of values is obtained, and the code amount predicting means performs a predetermined quantization step.
Occurs in block units when quantized and coded by
The data amount based on the sum of absolute differences,
Further, the adding means calculates the predicted data amount for one field.
Or add multiple blocks for one frame and
Adder output for several fields or multiple frames
Find the ratio of Then, the quantization step deciding means adds
Means based on the output of the
Determine quantization step for field or each frame
Then, the quantizing means quantizes the orthogonally transformed data
Quantize by step. In addition, the video signal according to the present invention
In the signal encoding device, the blocking means converts the video signals to each other.
Divided into macroblocks consisting of two or more adjacent blocks
To construct a macroblock from multiple macroblocks.
Output some blocks, and the difference calculation means
Find the sum of absolute differences between adjacent pixels in a block
The code amount predicting means uses a predetermined quantization step to
Data generated in block units when coded and encoded
Is calculated based on the sum of absolute differences corresponding to some of the blocks.
And the addition means calculates the
The predicted data amount is added for a plurality of blocks. And quantization
The step determining means determines a plurality of macros based on the addition result.
Determine the quantization step for the block
The stage converts the orthogonally transformed data by this quantization step.
Quantization. Also, a video signal encoding device according to the present invention
Means that the dynamic range calculation means
The dynamic range is obtained, and the code amount predicting means calculates a predetermined amount.
When quantization and encoding are performed by the
In addition, the adding means adds the predicted data amount for one field or
Adds a plurality of blocks for one frame. Soshi
The quantization step determining means outputs the output of the adding means and
Each field or based on the output of the code amount ratio calculation means
Determine the quantization step for each frame, and the quantization means
The orthogonally transformed data is quantized by this quantization step.
Become The video signal encoding device according to the present invention is
Locking means is, two or more blanking adjacent video signal to each other physician
Divide into macro blocks consisting of locks and
Some blocks that make up a macroblock from locks
Output, and the dynamic range calculation means
Calculates the dynamic range within the block and predicts the code amount.
Is the value quantized and coded by a predetermined quantization step.
The amount of data generated in block units in this case
Predict based on the dynamic range corresponding to the lock
Further, the adding means calculates the predicted data amount of some blocks.
Is added for a plurality of blocks. And the quantization step decision
The determining means determines a plurality of macro blocks based on the addition result.
Is determined, and the quantization means
The transformed data is quantized by this quantization step.
You.

[0011]

[Embodiment 1] FIG. 1 is a configuration diagram illustrating a video signal encoding device according to a first embodiment of the present invention. In the figure,
1 is a digital video input terminal, 2 is a blocking circuit for blocking an input digital video signal, 8 is a motion compensation prediction with respect to a reference field for a video signal block output from the blocking circuit 2, The motion compensation circuit 3 outputs the prediction error between the block and the reference block in block units. The motion compensation circuit 3 selects the output of the blocking circuit 2 in the case of an intra-field in which motion compensation is not performed. A switch circuit for selecting an output of the motion compensation circuit 8. 4 delays the image data block output from the switch circuit 3 until the information amount prediction is completed and outputs the image data block at the same time, for example, performs information amount prediction in field units, and according to the prediction result, the actual information amount falls within the target value. This is a code amount control circuit that determines a quantization parameter that will fit. Reference numeral 5 denotes an orthogonal transform circuit that performs orthogonal transform on the image data delayed by the code amount control circuit 4. 6 is a quantization circuit for quantizing the output of the orthogonal transform circuit 5 with the quantization parameter obtained by the code amount control circuit 4, 7 is an encoding circuit for encoding the output of the quantization circuit 6 by variable length encoding, Reference numeral 12 denotes a buffer memory, and 9 denotes an output terminal for outputting encoded image data.

Next, the operation will be described. As the input digital video signal, for example, a 4: 2: 2 component digital signal is input, and for example, 8 [pixels] by the blocking circuit 2 irrespective of an intra field in which motion compensation prediction is not performed and a prediction field in which motion compensation prediction is performed. ] × 8 [lines] as one unit and output. The output of the blocking circuit 2 is input to a motion compensation circuit 8, which is reconstructed from past output blocks, performs image data of a reference field stored in the motion compensation circuit 8, and performs motion compensation prediction. The prediction error of each pixel with respect to the block is output to the switch circuit 3. On the other hand, the output of the blocking circuit 2 is also input to the switch circuit 3. The switch circuit 3 selects the output of the blocking circuit 2 in the case of the intra field, and selects the output of the motion compensation circuit 8 in the case of the prediction field.

The image data output from the switch circuit 3 is input to the code amount control circuit 4 and a trial calculation of the information amount is performed for each image block. Here, the code amount control circuit 4 has, for example, a configuration as shown in FIG. In FIG. 2, 20 is a field memory, 21 is a Y signal difference absolute value sum operation circuit, 22
Is a BY signal difference absolute value sum operation circuit, 23 is an RY signal difference absolute value sum operation circuit, 24 is a Y signal code amount prediction circuit, 25 is a BY signal code amount prediction circuit, and 26 is RY A signal code amount prediction circuit, 27 is a Y signal addition circuit, 28 is a BY signal addition circuit,
29 is an RY signal addition circuit, 30 is a quantization level judgment circuit,
31 is a control reference value table.

Next, the operation of the code amount control circuit 4 will be described. Among the input image data, the Y signal is input to a Y signal difference absolute value calculation circuit 21, and the BY and RY signals are respectively calculated by a BY signal difference absolute value calculation circuit 22 and a RY signal difference absolute circuit. It is input to the value sum operation circuit 23. The Y signal difference absolute value sum operation circuit 21 calculates the difference between the horizontal and vertical directions in the block Di (i, j) (i, j = 1 to 8) of the input 8 pixels × 8 lines. Sum of absolute values

[0015]

(Equation 1)

Is output.

Output SY of Y signal difference absolute value sum calculating circuit 21
Is input to the Y signal code amount prediction circuit 24, and the data amount generated in block units is predicted. FIG. 3 shows the relationship between the sum of absolute differences SY in a block and the amount of data generated when each block is orthogonally transformed and standard-quantized and coded for the Y signal. Here, FIG. 3 shows the data amount generated for each block with respect to the sample image and S in that case.
The graph is obtained by calculating the standard deviation and the average value of the value of Y. Accordingly, the data generation amount of the image data when a predetermined sum of absolute differences is given is σ1 and σ1 in FIG.
It can be considered that it is within the range enclosed by 2. Here, the Y signal code amount prediction circuit 24 is constituted by, for example, a ROM, and is generated when the sum of absolute differences per block of the Y signal as shown by the solid line in FIG. 3 is quantized by standard quantization. The average of the data volume is recorded. That is, Y
The signal code amount prediction circuit 24 outputs a prediction data amount when standard quantization is performed on the output of the Y signal difference absolute value sum calculation circuit 21. The output of the Y signal code amount prediction circuit 24 is
The addition is performed for one field in the Y signal addition circuit 27 to obtain the predicted data amount for one field.

The data amount predicting means for the BY signal and the RY signal is the same as that for the Y signal, and will not be described. However, in the case of the 4: 2: 2 component digital signal, the sampling frequency of the color difference signal is half of the Y signal. For this reason, as shown in FIG. 4, in the case of the BY and RY signals, the relationship between the sum of the absolute difference sums per block and the amount of generated data is different from the case of the Y signal shown in FIG. Therefore, the BY signal code amount predicting circuit 25 and the RY signal code amount predicting circuit 26 perform the standard quantization on the sum of absolute differences per block of the color difference signal as shown in FIG. The average of the amount of data generated in
It outputs the predicted data amount for the sum of the absolute differences of the blocks output by the -Y signal difference absolute value operation circuit 22 and the RY signal difference absolute value operation circuit 23.

Y signal adding circuit 27, BY signal adding circuit 28
And the predicted data amount per field output by the RY signal addition circuit 29 are input to the quantization level determination circuit 30, respectively. The quantization level determination circuit 30 adds the predicted data amount per field for the Y, BY, and RY signals, and calculates the predicted data amount for one entire field. Further, the prediction data amount of the entire one field is compared with the target data amount per one field outputted from the control reference value table 31, and the quantization step width corresponding to the error is determined and outputted. That is, if the predicted data amount is smaller than the target data amount, the quantization step width is reduced to increase the generated data amount. Conversely, when the predicted data amount is larger than the target data amount, the quantization step width is increased to reduce the generated data amount.

Here, assuming that the predicted data amount is Ap and the target data amount is Ar, the quantization level determination circuit 30 obtains E = Ap / Ar, and, for example, in five quantization steps as shown in Table 1, An appropriate quantization level L is selected and output.

[0021]

[Table 1]

On the other hand, the input data is also input to the field memory 20, the image data is output to the orthogonal transformation circuit 5 after performing a data delay until the determination result is output from the quantization level determination circuit 30. . The orthogonal transformation circuit 5 performs, for example, DCT on the input data block. The output of the orthogonal transformation circuit 5 is input to the quantization circuit 6 and performs quantization according to the quantization level output from the code amount control circuit 4. That is, in the quantization circuit 6, the code amount control circuit 4
By quantizing the entire field in the quantization steps corresponding to the five quantization levels output from the, the generated data amount is controlled to a predetermined information amount or less. However, the quantization levels in Table 1 are set such that the standard quantization level used in the case of code amount prediction is defined as quantization level 2, and the smaller the quantization level, the smaller the quantization step width.

The output of the quantization circuit 6 is also input to the motion compensation circuit 8. In the motion compensation circuit 8, the quantization circuit 6
After decoding the image data output from the decoder by inverse quantization and inverse orthogonal transform processing, in the case of a predicted field, the reproduced image is restored by adding the data of the reference field used when calculating the prediction error at the time of encoding Then, this is stored as reference data. In the case of an intra field, data decoded by inverse quantization and inverse orthogonal transform processing is stored as reference data as it is.

On the other hand, image data output from the quantization circuit 6 is subjected to variable-length encoding in the encoding circuit 7, and the encoded data is output to the buffer memory 12. The buffer memory 12 stores the encoded image data,
The signal is output from the output terminal 9 at a predetermined fixed rate, and transmission or magnetic recording is performed.

In the above embodiment, when the data amount is predicted, the information amount of the image data is controlled in units of fields. However, the image data need not be controlled in units of fields. May be performed. Although the quantization level is performed in five stages, it is not necessarily required to be performed in five stages, and n stages (n ≧ n)
What is necessary is to do in 2). Although the input data is divided into 8 pixels × 8 lines, it is not necessarily 8 pixels × 8 lines, but may be performed by n pixels × m lines (n ≧ 2, m ≧ 2).

Embodiment 2 FIG. In the first embodiment, the prediction of the code amount is determined using the sum of absolute differences in each block. However, the code amount may be predicted using the dynamic range in each block. An example configured in this way is a second embodiment of the present invention.

FIG. 5 is a block diagram of an information amount prediction circuit 4 according to a second embodiment of the present invention. In FIG. 5, 40 is a field memory, 41 is a Y signal dynamic range operation circuit, 42 is a BY signal dynamic range operation circuit, 43 is an RY signal dynamic range operation circuit, 44 is a Y signal code amount prediction circuit, and 45 is The BY signal code amount prediction circuit, 46 is R
-Y signal code amount prediction circuit, 47 is Y signal addition circuit, 48 is B
A -Y signal addition circuit, 49 is an RY signal addition circuit, 50 is a quantization level determination circuit, and 51 is a control reference value table.

Next, the operation of the code amount control circuit 4 in the second embodiment of the present invention will be described. Of the input image data, the Y signal is input to a Y signal dynamic range operation circuit 41, and the BY and RY signals are input to a BY signal dynamic range operation circuit 42 and an RY signal dynamic range operation circuit 43, respectively. Is entered. The Y signal dynamic range calculation circuit 41 calculates the maximum value SYmax and the minimum value SYmin in the input block Di (i, j) (i, j = 1 to 8) of 8 pixels × 8 lines. , And the dynamic range SYd is calculated and output by the following equation. SYd = SYmax-SYmin

The output SYd of the Y signal dynamic range calculation circuit 41 is input to the Y signal code amount prediction circuit 44, and the data amount generated in block units is predicted. FIG. 6 shows the dynamic range SYd in the block for the Y signal.
And the amount of data generated when each block is orthogonally transformed, standard quantized, and encoded. Here, FIG. 6 is a graph in which the data amount generated for each block with respect to the sample image and the average value of SYd values in that case are obtained. That is, when the dynamic range for each block is given, the amount of information generated for each block can be substantially predicted from FIG. Here, the Y signal code amount predicting circuit 44 is constituted by, for example, a ROM, and generates data generated when the dynamic range per block of the Y signal as shown by the solid line in FIG. The average of the amounts is recorded. That is, the Y signal code amount prediction circuit 44 outputs a prediction data amount when the standard quantization is performed on the output of the Y signal dynamic range calculation circuit 41. The output of the Y signal code amount prediction circuit 44 is added for one field in the Y signal addition circuit 47, and the predicted data amount of the Y signal for one field is obtained.

The data amount predicting means for the BY signal and the RY signal is the same as that for the Y signal and will not be described. However, in the case of the 4: 2: 2 component digital signal, the sampling frequency of the color difference signal is half of the Y signal. Therefore, as shown in FIG. 7, in the case of the BY and RY signals, the relationship between the dynamic range per block and the amount of generated data is different from that in the case of the Y signal shown in FIG. Accordingly, the BY signal code amount predicting circuit 45 and the RY signal code amount predicting circuit 46 generate when the dynamic range per block of the color difference signal is quantized by standard quantization as shown in FIG. The average of the amount of data to be recorded is recorded, and the BY signal dynamic range calculation circuit 42 and the R-
The prediction data amount per block for each addition result output by the Y signal dynamic range calculation circuit 43 is output.

The Y signal adding circuit 47 and the BY signal adding circuit 48
And the predicted data amount per field output by the RY signal addition circuit 49 is input to the quantization level determination circuit 50. The quantization level determination circuit 50 adds the predicted data amount per field of the Y, BY, RY signals to obtain the predicted data amount of the entire one field. Further, the prediction data amount per field is compared with the target data amount per field output from the control reference value table 51, and the quantization step width corresponding to the error is determined and output. That is, when the predicted data amount is smaller than the target data amount, the quantization step size is reduced to increase the data amount. Conversely, when the predicted data amount is larger than the target data amount, the quantization step width is increased to reduce the data amount. The operation of the field memory 20 is the same as that of the first embodiment of the present invention, and will not be described.

Embodiment 3 FIG. In the first and second embodiments,
Although adaptive quantization was not performed for each block, it was determined whether or not image quality degradation was conspicuous in blocks.
The code amount control may be performed by performing the adaptive quantization determination at the stage (n ≧ 2) and predicting the amount of data generated when encoding is performed at each adaptive quantization level. In this manner, the amount of data generated when the n-stage adaptive quantization is performed is predicted at each adaptive quantization level, thereby obtaining the predicted code amount of the entire field and controlling the code amount. An example is a third embodiment of the present invention.

FIG. 8 is a block diagram showing a video signal encoding apparatus according to a third embodiment of the present invention. In the figure, 1 is a digital video input terminal, 2 is a blocking circuit for blocking the input digital video signal, and 8 is a motion compensation prediction for a video signal block output from the blocking circuit 2 with a reference field. A motion compensation circuit that outputs a prediction error between an input block and a reference block in units of a block, and 3 selects an output of the blocking circuit 2 in the case of an intra-field in which motion compensation is not performed, and performs a prediction field in which motion compensation prediction is performed. Is a switch circuit for selecting the output of the motion compensation circuit 8. Reference numeral 15 denotes an adaptive quantization determination circuit that determines, for example, three types of quantization steps in accordance with the properties of the image blocks output from the blocking circuit 2. Reference numeral 14 denotes an image data block output from the switch circuit 3 whose information amount prediction is performed. At the same time, the data is output after being delayed until the end, and the amount of data generated when each block is adaptively quantized according to the determination result of the adaptive quantization determination circuit 15 is predicted in, for example, a field unit, and the actual information amount is calculated according to the prediction result. Is a code amount control circuit that determines a quantization parameter in a field unit such that is within a target value. Reference numeral 5 denotes an orthogonal transform circuit that performs orthogonal transform on the image data delayed by the code amount control circuit 4. 16 is a code amount control circuit
14 is an adaptive quantization circuit that quantizes the output of the orthogonal transform circuit 5 using the quantization parameter for each field obtained by 14 and the quantization parameter for each block obtained by the adaptive quantization determination circuit 15. Conversion circuit 6
Encoding circuit for encoding the output of
Is a buffer memory, and 9 is an output terminal for outputting encoded image data.

Next, the operation will be described. The operations of the blocking circuit 2, the switch circuit 3, and the motion compensation circuit 8 are the same as those in the first embodiment, and a description thereof will be omitted. The adaptive quantization determination circuit 15 determines whether the input image block is a block in which image quality deterioration is conspicuous or a block in which image quality deterioration is not conspicuous, and, for example, a three-stage quantization is performed according to the characteristics of the image block. Select the activation level. Here, the image blocks in which the image quality deterioration is most obvious are blocks in which fine lines are inserted with a high contrast on a flat background, and when such blocks are coarsely quantized, the inverse orthogonal transform is performed on the decoder side. However, the quantization error spreads over the entire block, and noise is superimposed on a flat portion where image quality degradation is easy to understand, so that noise in the flat portion becomes visually noticeable. On the other hand, a block in which the image quality deterioration is not conspicuous has no flat portion, and the movement in the block as a whole is very intense. Therefore, the adaptive quantization determination circuit 15 performs the adaptive quantization determination by detecting whether or not there is a flat portion and an edge portion in which image quality degradation is conspicuous in a block to be coded.

Next, the operation of the adaptive quantization determination circuit 15 will be described. In the adaptive quantization determination circuit 15, the blocking circuit 2
Is first divided into four sub-blocks. For example, when the input block outputs a block of 8 pixels × 8 lines, as shown in FIG.
The line is divided into four sub-blocks. Here, the four sub-blocks are D1, D2, D3, and D4, respectively, and the pixel values of each sub-block are D1 (i, j) and D2, respectively.
(I, j), D3 (i, j), D4 (i, j) (i, j
= 1 to 4). Next, for the input sub-blocks D1, D2, D3, and D4, the sum of absolute differences in the horizontal and vertical directions in the sub-blocks

[0036]

(Equation 2)

The minimum and maximum values of V1, V2, V3 and V4 are calculated as follows: A = MIN (V1, V2, V3, V4) B = MAX (V1, V2, V3, V4) and C = BA Ask for.

Here, the calculated value A can be regarded as a parameter representing a flat portion where the image quality deterioration of the image block is easily understood, and the calculated value C can be regarded as a parameter representing the edge portion of the image block. Thus, the adaptive quantization determination circuit 15 uses the calculated values A and C to perform three-stage adaptive quantization determination for each block according to the determination diagram shown in FIG. Output.
That is, in the adaptive quantization determination circuit 15, a fine quantization step is selected for a block in which image quality degradation is conspicuous,
A coarse quantization step is selected for a block in which image quality degradation is not conspicuous. However, in FIG. 10, the quantization levels are coarser in the order of quantization levels 1, 2, and 3.

On the other hand, the image data output from the switch circuit 3 is input to the code amount control circuit 14 and a trial calculation of the amount of information generated for each image block is performed according to the determination result of the adaptive quantization determination circuit 15. Here, the code amount control circuit 14
Has a configuration as shown in FIG. 11, for example. In FIG. 11, reference numeral 20 denotes a field memory, 21 denotes a Y signal difference absolute value sum operation circuit, 22 denotes a BY signal difference absolute value sum operation circuit, and 23 denotes R.
-Y signal difference absolute value sum calculation circuit, 64 is a Y signal code amount prediction circuit, 65 is a BY signal code amount prediction circuit, 66 is an RY signal code amount prediction circuit, 27 is a Y signal addition circuit, 28 is A BY signal addition circuit, 29 an RY signal addition circuit, 30 a quantization level determination circuit, and 31 a control reference value table.

Next, the operation of the code amount control circuit 14 will be described. In FIG. 11, the Y signal difference absolute value sum operation circuit 21,
The operations of the BY signal difference absolute value sum operation circuit 22 and the RY signal difference absolute value sum operation circuit 23 are the same as those in the first embodiment of the present invention, and a description thereof will be omitted. The Y signal code amount prediction circuit 64 predicts the code amount per block according to the output of the Y signal difference absolute value sum calculation circuit 21 for each block and the three-stage adaptive quantization determination output from the adaptive quantization determination circuit 15.
Here, the Y signal code amount predicting circuit 64 performs, for example, three types of R signals.
OM, each ROM stores the amount of data generated when quantizing by standard quantization at each adaptive quantization level with respect to the sum of absolute differences per block of the Y signal as shown in FIG. Average is recorded. That is, in the signal code amount prediction circuit 64, the three types of R
The ROM corresponding to the adaptive quantization determination result is selected from the OM, and the sum of absolute differences of each block is input to the selected ROM, and the predicted data amount per block in that case is output. However, in FIG. 12, (a) corresponds to quantization level 1 in FIG. 10, and (b) and (c) correspond to quantization levels 2 and 3 in FIG. 10, respectively. That is, when the quantization level 1 is selected by the adaptive quantization determination in the Y signal code amount prediction circuit 64, the code amount is predicted according to the determination in FIG. 12A, and the quantization levels 2 and 3 are similarly selected. In this case, the data generation amount per block is predicted and output according to the determinations of FIGS. 12B and 12C, respectively.

The data amount predicting means for the BY signal and the RY signal is the same as that for the Y signal and will not be described. However, in the case of the 4: 2: 2 component digital signal, the sampling frequency of the color difference signal is half of the Y signal. Therefore, as shown in FIG.
In the case of the −Y signal, the relationship between the sum of absolute differences per block and the amount of generated data is different from that in the case of the Y signal.
Signal code amount prediction circuit 65 and RY signal code amount prediction circuit 66
, The generated data amount is predicted based on the determination criteria shown in FIG. Next, the outputs of the Y signal code amount prediction circuit 64, the BY signal code amount prediction circuit 65, and the RY signal code amount prediction circuit 66 are output from the Y signal addition circuit 27, the BY signal addition circuit 28, and the R-signal
Each of them is added by the Y signal addition circuit 29 to obtain a predicted data amount for one field.

The Y signal adding circuit 27 and the BY signal adding circuit 28
And the predicted data amount per field output by the RY signal addition circuit 29 are input to the quantization level determination circuit 30, respectively. The quantization level determination circuit 30 adds the predicted data amount per field for the Y, BY, and RY signals, and calculates the predicted data amount for one entire field. Further, the prediction data amount of the entire one field is compared with the target data amount per one field outputted from the control reference value table 31, and the quantization step width corresponding to the error is determined and outputted. That is, if the predicted data amount is smaller than the target data amount, the quantization step width is reduced to increase the generated data amount. Conversely, when the predicted data amount is larger than the target data amount, the quantization step width is increased to reduce the generated data amount.

Here, assuming that the predicted data amount is Ap and the target data amount is Ar, the quantization level determination circuit 30 obtains E = Ap / Ar, and, for example, in five quantization steps as shown in Table 2, An appropriate quantization level L is selected and output.

[0044]

[Table 2]

On the other hand, the input data is also input to the field memory 20, and the image data is output to the orthogonal transformation circuit 5 after performing a data delay until the determination result is output from the quantization level determination circuit 30. . The orthogonal transformation circuit 5 performs, for example, DCT on the input data block. The output of the orthogonal transform circuit 5 is input to the adaptive quantization circuit 16 and converted into a field-based quantization level output from the code amount control circuit 14 and a block-based quantization level output from the adaptive quantization determination circuit 15. Therefore, quantization is performed. here,
The adaptive quantization circuit 16 has, for example, seven types of quantization step widths as shown in Table 3, and a five-step field-level quantization level output from the code amount control circuit 14 and an adaptive quantization determination circuit 15 It is possible to control the amount of data to be generated to be equal to or less than a predetermined amount of information by determining a quantization step for each block by the three-stage adaptive quantization judgment output in units of blocks and performing quantization. it can. However, among the quantization levels in Table 3, the three standard quantization levels used in the case of code amount prediction are the same as the quantization levels when the quantization level L in the field unit is 2. In Table 3, the setting is made such that the smaller the quantization level, the smaller the quantization step width.

[0046]

[Table 3]

In the above embodiment, when the data amount is predicted, the information amount of the image data is controlled in units of fields. However, the image data need not always be controlled in units of fields. May be performed. Although the code amount prediction is performed by the sum of absolute differences between adjacent pixels in each block, the amount of generated data is predicted by using the dynamic range of each block as shown in the second embodiment of the present invention. Is also good. In addition, although the quantization level is set to five levels in field units, the quantization level may be performed in n levels (n ≧ 2). Although the decision result of the adaptive quantization is three stages, it may be performed in m stages (m ≧ 2). Similarly, the number of quantization steps of the adaptive quantization circuit 16 is set to seven, but k may be performed ( k ≧ 2). The adaptive quantization is determined using the output of the blocking circuit 2. However, it is not always necessary to determine from the original image data but may be determined from the orthogonal transform coefficients. Although the input data is divided into 8 pixels × 8 lines, it is not necessarily 8 pixels × 8 lines, but may be performed by n pixels × m lines (n ≧ 2, m ≧ 2).

Embodiment 4 FIG. In the first and second embodiments, the code amount prediction is not performed in units of a plurality of fields or frames. However, the code amount control may be performed by performing the code amount prediction in units of a plurality of fields or frames. The fourth embodiment of the present invention is an example in which code amount control is performed by performing code amount prediction in units of a plurality of fields or frames.

FIG. 14 is a block diagram of the code amount control circuit 4 according to the fourth embodiment of the present invention. In FIG. 14, 32 is a field memory having a capacity of 4 fields, 21 is Y
Signal difference absolute value sum operation circuit, 22 is a BY signal difference absolute value sum operation circuit, 23 is an RY signal difference absolute value sum operation circuit, 24
Is a Y signal code amount prediction circuit, 25 is a BY signal code amount prediction circuit, 26 is an RY signal code amount prediction circuit, 27 is a Y signal addition circuit, 28 is a BY signal addition circuit, and 29 is an R-signal addition circuit. Y signal addition circuit, 33 is a code amount ratio calculation circuit , 34 is a control reference value generation circuit,
Reference numeral 35 denotes a quantization level determination circuit.

Next, the operation will be described. Here, one field of intra-fields and three fields of predicted fields (first, second, and third inter-fields)
Let us consider a case where a video signal is encoded into a predetermined constant information amount in units of four fields consisting of The input image data is in units of fields, and for the Y signal,
Y signal difference absolute value sum calculation circuit 21
The -Y signal is a BY signal difference absolute value sum operation circuit 22.
, And RY signal difference absolute value sum calculation circuit 23.
The prediction of the code amount in the field unit for the Y, BY, and RY signals is the same as in the first embodiment, and a description thereof will be omitted. Next, Y, B-
The predicted coding amount for the Y, RY signals is input to the code amount ratio calculation circuit 33. The code amount ratio calculation circuit 33 calculates the total data amount of each field by summing the data amounts of Y, BY, and RY for each field, and further calculates each field (intra field and first and second fields). , The third inter-field), and by allocating the target data amounts for the four fields output from the control reference value table 34 in accordance with these ratios, the information amount to be allocated to each field is calculated. decide.

For example, when the target data amount for four fields is 1 Mbits, when the result of the code amount prediction performed on a field basis is 6: 2: 2.5: 1.5, 0.5 Mbits for the intra field and the first 0 in Interfield.
166 Mbits, 0.208 Mbits in second interfield, third
A data amount of 0.125 Mbits is assigned to the interfield.

The information amount allocated to each field determined by the code amount ratio calculation circuit 33 and the predicted data amount in each field unit are input to the quantization level determination circuit 35. The quantization level determination circuit 35 compares the data amount allocated to each field with the data amount predicted for each field, and outputs a quantization step width corresponding to the error. That is, when the predicted data amount of each field is smaller than the target data amount assigned to each field, the quantization step size is reduced to increase the data amount. Conversely, when the predicted data amount is larger than the target data amount, the quantization step width is increased to reduce the data amount. On the other hand, the input video signal block is input to the field memory 32, and the data for four fields is delayed until the quantization level is determined by the quantization level determination circuit 30. As described above, it is possible to configure a video signal encoding device that performs code amount control by performing code amount prediction in units of four fields.

In the above embodiment, the code amount is predicted by the sum of the absolute differences in the block. However, the code amount may be predicted by the dynamic range in the block as shown in the second embodiment. Although the code amount prediction is performed in units of four fields, the prediction is not necessarily performed in units of four fields, and may be performed in units of arbitrary fields or frames.

Embodiment 5 FIG. In the first and second embodiments, when the input image data is blocked and output by the blocking circuit 2, the shuffling process is not performed so that adjacent blocks are not as close as possible. By predicting the code amount for 1 / n blocks of one field when predicting the code amount, the data amount of one field can be predicted. The fifth embodiment of the present invention is an example in which the shuffling process is performed at the time of blocking to simplify the code amount prediction.

Next, the operation will be described. When a 4: 2: 2 component signal is input to the input signal, 1
In the field, the Y signal is 720 pixels x 240 lines, BY,
The RY signal is composed of data of 360 pixels × 240 lines. Here, 8 pixels × 8 pixels of the Y signal adjacent in the horizontal direction
Two blocks of lines and their corresponding BY, RY
Each block of 8 pixels × 8 lines of a signal is collectively referred to as a sub-macro block, and block shuffling is performed in units of the sub-macro block. In this case, the image data for one field is
It is divided into 45, 30 in the vertical direction, for a total of 1350 sub-macroblocks. Further, for example, a total of 15 adjacent sub-macroblocks of 5 in the horizontal direction and 3 in the vertical direction are referred to as macroblocks, and one field is divided into 225 macroblock units as shown in FIG. Thus, a number from 1 to 225 is given to each macroblock. Also, as shown in FIG. 16, numbers 1 to 15 are given to the fifteen sub-macro blocks constituting each macro block.

Here, the block shuffling is performed by repeatedly outputting the sub-macroblocks one by one from the macroblocks No. 1 to No. 225 shown in FIG. However, the order of sub-macroblocks output one by one from each macroblock is determined according to the order of 1 to 15 shown in FIG. That is, the operation of first outputting the first sub-macroblock from the first macroblock and then outputting the first sub-macroblock from the second macroblock is sequentially repeated up to the 225th macroblock. After that, the process returns to the first macro block again, and this time, block shuffling is performed by repeating the operation of sequentially outputting the second sub macro block from each macro block.

When the above-described block shuffling is performed, the data for one field is equally divided into 225, and one sub-macroblock is output one by one from each macroblock. At the time of output, 1/15 of the data is output without bias. In this case, 1/1 of the whole after shuffling is performed.
By performing code amount prediction on 15 image data blocks, the data amount for one field can be sufficiently predicted. Therefore, by performing the block shuffling as described above and performing the code amount prediction in the first and second embodiments on 1/15 image data of one field, the data amount of one field can be reduced. Can be roughly predicted. Therefore, in FIG. 1, when the blocking circuit 2 performs the block shuffling as described above when blocking and outputting the input image data, the code amount prediction circuit 4
, The amount of generated data for one field is predicted by performing code amount prediction on 1/15 data of one field, the quantization parameter suitable for the predicted data amount is determined, and the code amount is controlled to perform code amount control. Can be kept constant.

In the above-described embodiment, one field is used.
The data amount for one field was predicted by the data of / 15, but it is not necessarily required to be 1/15, and 1 / n (n ≧ 2)
The total data amount may be predicted based on the data amount. Although the data amount control is performed in units of fields, it is not always necessary to perform control in units of fields, and may be performed in units of frames. Further, although the macroblock is constituted by 15 sub-macroblocks, the number does not necessarily have to be 15. Further, the sub-macro block is configured in units of two Y signal blocks and one BY and RY signal blocks. However, it is not always necessary to configure the sub macro block in such a unit, and 2n (n ≧ 2) ) Y signal blocks and corresponding n RY and RY signal blocks, respectively. The reading order of the macro block and the sub-macro block is performed in the order shown in FIGS. 15 and 16, but the reading order is not necessarily required to be the reading order shown in FIGS. The reading may be performed in any reading order.

Embodiment 6 FIG. In the first embodiment, the code amount is predicted from the sum of the difference absolute values in the block by using the blocked image data. However, the information processing is performed by calculating the difference absolute value sum as input data without performing blocking. The amount may be predicted. The sixth embodiment of the present invention is an example in which the data amount prediction is calculated from the sum of absolute differences of the input data to control the code amount.

FIG. 17 is a block diagram showing the configuration of a video signal encoding apparatus according to the fifth embodiment of the present invention. In the figure, 1 is a digital video input terminal, 2 is a blocking circuit for blocking a digital video input signal, 13 is a device for predicting the amount of input data, for example, in units of fields,
A code amount control circuit that determines a quantization parameter such that an actual information amount falls within a target value according to a prediction result;
Reference numeral 4 denotes an orthogonal transform circuit for performing orthogonal transform on the image data output from the block circuit 2, and reference numeral 6 denotes a quantization circuit for quantizing the output of the orthogonal transform circuit 5 with the quantization parameter obtained by the code amount control circuit 13. , 7 are coding circuits for coding the output of the quantization circuit 6 by variable length coding, 12 is a buffer memory, and 9 is an output terminal for outputting coded image data.

Next, the operation will be described. The input digital video signal is, for example, a 4: 2: 2 component digital signal, and is divided by the blocking circuit 2 into input blocks each having, for example, 8 [pixels] × 8 [lines]. On the other hand, the video signal is also input to the code amount control circuit 13, and the information amount is predicted in field units. Here, the code amount control circuit 13 has, for example, a configuration as shown in FIG. In FIG. 18, 61 is a Y signal difference absolute value sum operation circuit, 62 is a BY signal difference absolute value sum operation circuit, 63 is an RY signal difference absolute value sum operation circuit, 64 is a Y signal code amount prediction circuit, 65 Is a BY signal code amount prediction circuit;
Is an RY signal code amount prediction circuit, 67 is a quantization level determination circuit, and 68 is a control reference value table.

Next, the operation of the code amount control circuit 4 will be described. Of the input image data, the Y signal is input to a Y signal difference absolute value calculation circuit 61, and the BY and RY signals are respectively a BY signal difference absolute value calculation circuit 62 and an RY signal difference absolute circuit. It is input to the value sum operation circuit 63. In the Y signal difference absolute value sum operation circuit 61, data 72 for one field inputted
DY (i, j) of 0 pixels × 240 lines (i = 1 to 720,
j = 1 to 240), the absolute value of the difference between the horizontal and vertical directions

[0063]

(Equation 3)

Is output.

Output SY of Y signal difference absolute value sum calculating circuit 21
Is input to the Y signal code amount prediction circuit 64. In FIG.
The relationship between the sum of absolute differences SY of the Y signal in the horizontal and vertical directions and the amount of data in field units generated when the output of the blocking circuit 2 is orthogonally transformed, standard quantized, and encoded. That is, when the sum of absolute differences SY for each field is given as in the first embodiment, FIG.
Thus, the amount of information generated for each field can be substantially predicted. Therefore, in the Y signal code amount prediction circuit 64,
The average of the data amount generated when the standard quantization is performed on the sum of the absolute differences of the Y signals as shown by the solid line in FIG. 19 is recorded. And outputs the predicted data amount when standard quantization is performed.

On the other hand, when the BY signal and the RY signal are 4: 2: 2 component digital signals, since the number of data of the color difference signal is half of the Y signal, the BY signal difference absolute value In the sum operation circuit 62 and the RY signal difference absolute value sum operation circuit 63, D of 360 pixels × 240 lines of image data for one field of BY or RY is inputted.
For C (i, j) (i = 1 to 360, j = 1 to 240), the sum of absolute values of the difference between the horizontal direction and the vertical direction

[0067]

(Equation 4)

Is output. Here, in the case of the 4: 2: 2 component digital signal, the sampling frequency of the color difference signal is half of the Y signal. Therefore, as in the case of the first embodiment, as shown in FIG. 20, the sum of the absolute difference sums of the BY and RY signals and the amount of generated data are different from those of the Y signal shown in FIG. Therefore, the BY signal code amount prediction circuit
The 65 and RY signal code amount prediction circuit 66 uses the standard quantum for each sum of absolute values output by the BY signal difference absolute value sum operation circuit 65 and the RY signal difference absolute value sum operation circuit 66 in accordance with FIG. Outputs the predicted data amount in case of conversion.

The prediction data amounts output by the Y signal code amount prediction circuit 64, the BY signal code amount prediction circuit 65, and the RY signal code amount prediction circuit 66 are input to the quantization level determination circuit 67, respectively. . The quantization level determination circuit 67 adds the predicted data amounts of the Y, BY, and RY signals, and calculates the predicted data amount of the entire one field and the control reference value table 68.
, And a quantization step width corresponding to the error is determined and output. That is, when the predicted data amount is smaller than the target data amount, the quantization step size is reduced to increase the data amount.
Conversely, when the predicted data amount is larger than the target data amount, the quantization step width is increased to reduce the data amount. Hereinafter, the operations of the orthogonal transformation circuit 4, the quantization circuit 6, the encoding circuit 7, and the buffer memory 12 are the same as those in the first embodiment, and therefore the description is omitted.

In the above embodiment, when the data amount is predicted, the information amount of the image data is controlled in field units. However, the image data need not always be controlled in field units, but is constituted by frame units or a plurality of adjacent image blocks. Information amount control may be performed on a macroblock basis.

[0071]

The video signal encoding apparatus according to the present invention
In each block of the image signal, sum the absolute value of the difference between adjacent pixels
Is determined, quantized by a predetermined quantization step, and encoded.
The amount of data that would occur if
And estimate the amount of predicted data for one field.
Or one block for a plurality of blocks,
Ratio of summation result for field or multiple frames
And calculate each field based on the addition result and the ratio.
Alternatively, the quantization step of each frame is determined. Sand
That is, code amount prediction is performed from the sum of absolute values of differences for each block.
Field or frame-by-frame
Measurement data volume and multiple fields or multiple frames.
Based on the ratio of predicted data volume
Determine the quantization step. Therefore, the actual occurrence data
Select the appropriate quantization step to keep the
It can be quantized and encoded. Therefore, for encoding
The amount of generated data is almost constant, and the
Can output encoded data and each field
Or, while suppressing image quality degradation in each frame,
Actual generated data in fields or multiple frames
Video signal encoding generator that can keep the amount constant
Can be provided. In addition, the video signal code according to the present invention
The encoding device is a part of the macro block of the video signal
The sum of absolute values of the differences between adjacent pixels
Quantized and coded by a predetermined quantization step
Predict the amount of data generated in the case from the sum of absolute values of this difference
As well as the result of adding the predicted data amount
The quantization step of multiple macroblocks based on
You. That is, the code amount is calculated from the sum of the absolute values of the differences for each block.
Even when predictions are made, some blocks are almost
By taking out the blocks, some blocks
Based on the amount of predicted data, the number of blocks containing it
A quantization step is determined for each block. For this reason,
Quantization step suitable for keeping the amount of data generated during
Can be selected, quantized and encoded. Follow
The amount of data generated by encoding is almost constant,
Video signal encoding that outputs encoded data at a constant rate
An apparatus can be provided. Also, according to the present invention,
The signal encoding device controls the dynamics in each block of the video signal.
Calculate the quantization range and quantize by the specified quantization step
The amount of data generated when encoding
In addition to forecasting from cleanse, this forecast
Multiple blocks per field or one frame
Minute addition for multiple fields or multiple frames
The ratio of the addition result is calculated based on the addition result and the ratio.
Determine quantization step for each field or each frame
I do. That is, from the dynamic range of each block
Even if code amount prediction is performed, the field or
Predicted data volume per frame and multiple fields or
Based on the ratio of the predicted data amount for multiple frames,
A quantization step is determined for each of a plurality of blocks. others
Quantization suitable for keeping the actual amount of data generated constant
Steps can be selected and quantized and encoded
You. Therefore, the amount of data generated by encoding is almost constant
Can output encoded data at a fixed rate.
And the image quality in each field or frame is poor.
With multiple fields or multiple frames
Video that can keep the actual amount of generated data constant
A signal encoding device can be provided. In addition, the present invention
Video signal encoding apparatus comprises macroblocks.
For some of the blocks that are
Calculate the dynamic range and perform a predetermined quantization step
The amount of data generated when quantization and encoding is
The forecast data is calculated from the
Of multiple macroblocks based on the addition result
Determine the quantization step. That is, the block-by-block
When the code amount is predicted from the dynamic range,
Also, by taking out some blocks almost without bias
Based on the estimated data volume for some blocks,
The quantization step is performed for each of a plurality of blocks including
Determine the top. Therefore, the actual amount of generated data is fixed
Quantize by choosing the appropriate quantization step to keep
Can be encoded. Therefore, the
Coded data at a fixed rate with the amount of data
Output video signal encoding device can be provided
You.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a first embodiment of the present invention.

FIG. 2 is a block diagram showing a code amount prediction circuit according to the first embodiment of the present invention.

FIG. 3 is a diagram illustrating characteristics of a code amount predictor for a luminance signal in the first embodiment of the present invention.

FIG. 4 is a diagram illustrating characteristics of a code amount predictor for a color difference signal in the first embodiment of the present invention.

FIG. 5 is a block diagram showing a code amount prediction circuit according to a second embodiment of the present invention.

FIG. 6 is a diagram illustrating characteristics of a code amount predictor for a luminance signal in a second embodiment of the present invention.

FIG. 7 is a diagram illustrating characteristics of a code amount predictor for a color difference signal in a second embodiment of the present invention.

FIG. 8 is a block diagram showing a third embodiment of the present invention.

FIG. 9 is a diagram showing an example of sub-macroblock division in adaptive quantization determination according to a third embodiment of the present invention.

FIG. 10 is a diagram showing an example of adaptive quantization determination in a third embodiment of the present invention.

FIG. 11 is a block diagram showing a code amount prediction circuit according to a third embodiment of the present invention.

FIG. 12 is a diagram illustrating characteristics of a code amount predictor for a luminance signal according to the third embodiment of the present invention.

FIG. 13 is a diagram illustrating characteristics of a code amount predictor for a color difference signal in a third embodiment of the present invention.

FIG. 14 is a block diagram illustrating a code amount prediction circuit according to a fourth embodiment of the present invention.

FIG. 15 is a diagram illustrating shuffling in a field according to a fifth embodiment of the present invention.

FIG. 16 is a diagram for explaining shuffling in a macroblock according to a fifth embodiment of the present invention.

FIG. 17 is a block diagram showing a sixth embodiment of the present invention.

FIG. 18 is a block diagram showing a code amount prediction circuit according to a sixth embodiment of the present invention.

FIG. 19 is a diagram illustrating characteristics of a code amount predictor for a luminance signal according to a sixth embodiment of the present invention.

FIG. 20 is a diagram illustrating characteristics of a code amount predictor for a color difference signal in a sixth embodiment of the present invention.

FIG. 21 is an explanatory diagram of a conventional encoding device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Input terminal 2 Blocking circuit 3 Switch circuit 4 Code amount control circuit 5 Orthogonal transformation circuit 6 Quantization circuit 7 Encoding circuit 8 Motion compensation circuit 9 Output terminal 12 Buffer memory

────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-3-270388 (JP, A) JP-A-3-291058 (JP, A) JP-A-4-156794 (JP, A) (58) Field (Int.Cl. ⁷ , DB name) H04N 7/32

Claims (4)

(57) [Claims] 1. An input video signal is divided into blocks.
Video signal code to be quantized and coded after orthogonal transformation.
An encoding device that divides the video signal into the blocks for each predetermined pixel.
Locking means and a difference between adjacent pixels in each of the divided blocks.
Difference calculating means for calculating the sum of absolute values of
The amount of data generated in the block unit is calculated by the difference calculation
Code amount prediction means for predicting from the output of the stage, and the block unit output from the code amount prediction means
Predicted data amount for one field or one frame
Means for adding a plurality of blocks, and outputs of the adding means for a plurality of fields or a plurality of frames.
A code amount ratio calculating means for obtaining a power ratio, based on outputs of the adding means and the code amount ratio calculating means.
To determine the quantization step for each field or frame.
And a quantization step from the quantization step determination means.
Quantization means for quantizing the orthogonally transformed data.
A video signal encoding device characterized in that 2. An input video signal is divided into blocks.
Video signal code to be quantized and coded after orthogonal transformation.
In an encoding device, a video signal is divided into two or more blocks that are adjacent to each other.
Divide into macro blocks and macro from multiple macro blocks
Block that outputs some blocks that make up the block
Means for eliminating differences between adjacent pixels in each of the partial blocks.
A difference calculation means for calculating a sum of logarithms , and a case where quantization and encoding are performed in a predetermined quantization step.
The amount of data generated in blocks
Code amount predicted from the output of the difference calculation means corresponding to
Prediction means, and the partial blocks output from the code amount prediction means
Adding means for adding the predicted data amount of the plurality of blocks for a plurality of blocks, and adding a plurality of macroblocks based on an output of the adding means.
Quantization step determining means for determining a quantization step to be performed
And the quantization step from the quantization step determination means.
Quantization means for quantizing the orthogonally transformed data.
A video signal encoding device characterized in that 3. An input video signal is divided into blocks.
Video signal code to be quantized and coded after orthogonal transformation.
In an encoding device, a video signal is divided into blocks of predetermined pixels.
Means and the dynamic range within each block
Cleansing operation means, when quantized and coded by a predetermined quantization step,
The amount of data generated in block units can be
Code amount prediction means for predicting from the output of the logic operation means, and prediction in block units output from the code amount prediction means.
Measured data amount for one field or one frame
Adding means for adding a plurality of blocks by adding a plurality of fields ,
A code amount ratio calculating means for obtaining a power ratio, based on outputs of the adding means and the code amount ratio calculating means.
To determine the quantization step for each field or frame.
And a quantization step from the quantization step determination means.
Quantization means for quantizing the orthogonally transformed data.
A video signal encoding device characterized in that 4. An input video signal is divided into blocks.
Video signal code to be quantized and coded after orthogonal transformation.
In an encoding device, a video signal is divided into two or more blocks that are adjacent to each other.
Divide into macro blocks and macro from multiple macro blocks
Block that outputs some blocks that make up the block
And a dynamic range in each of the partial blocks
Dynamic range operation means, when quantized and coded by a predetermined quantization step,
The amount of data generated in blocks
From the output of the dynamic range calculation means corresponding to
Code amount predicting means for predicting, and the partial blocks output from the code amount predicting means
Adding means for adding the predicted data amount of the plurality of blocks for a plurality of blocks, and a plurality of macroblocks based on the output of the adding means.
Quantization step determinator that determines the quantization step for
And a quantization step from the quantization step determining means.
Quantization means for quantizing the orthogonally transformed data.
A video signal encoding device characterized in that