JP3013394B2 - Demultiplexer - Google Patents
DemultiplexerInfo
- Publication number
- JP3013394B2 JP3013394B2 JP2149372A JP14937290A JP3013394B2 JP 3013394 B2 JP3013394 B2 JP 3013394B2 JP 2149372 A JP2149372 A JP 2149372A JP 14937290 A JP14937290 A JP 14937290A JP 3013394 B2 JP3013394 B2 JP 3013394B2
- Authority
- JP
- Japan
- Prior art keywords
- duplexer
- reception
- band rejection
- filter
- transmission
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Landscapes
- Control Of Motors That Do Not Use Commutators (AREA)
- Transceivers (AREA)
- Radio Transmission System (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は分波装置に関し、特にマイクロ波通信用のス
ペースダイバーシティ装置に使用される分波装置に関す
る。Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a demultiplexer, and more particularly, to a demultiplexer used for a space diversity device for microwave communication.
従来、この種の分波装置は第３図の構成図に示すよう
に、主アンテナ14に接続された送受共用分波装置は、送
受共用器15と、送信周波数f3,f2,f1を混合するサーキュ
レータ11A〜11C、フィルタ11D〜11Fからなる送信分波部
43と、受信周波数f1′,f2′,f3′を分波するサーキュレ
ータ12A〜12C、フィルタ12D〜11Fからなる受信分波部44
とから構成される。また、ダイバーシティ受信用の副ア
ンテナ16に接続された分波装置は、サーキュレータ17
と、受信周波数f1′,f2′,f3′を分波するサーキュレー
タ13A〜13C、フィルタ13D〜13Fからなる受信分波部45と
から構成される。さらに送信分波部43から受信分波部44
に干渉を与える場合に、この干渉信号を阻止するための
帯域阻止フィルタ41と、この帯域阻止フィルタ41の遅延
等化用の遅延補償回路42とを送受共用器15と受信分波部
44との間に挿入していた。Conventionally, as shown in the block diagram of FIG. 3, a duplexer connected to a main antenna 14 includes a duplexer 15 and a duplexer 15 and transmission frequencies f 3 , f 2 , f 1. Transmission demultiplexer composed of circulators 11A to 11C and filters 11D to 11F
43, circulators 12A to 12C for demultiplexing the reception frequencies f 1 ′, f 2 ′, and f 3 ′, and a reception demultiplexing unit 44 including filters 12D to 11F.
It is composed of The demultiplexer connected to the diversity receiving sub-antenna 16 is connected to a circulator 17.
When the reception frequency f 1 ', f 2', circulator demultiplexes f 3 '13A - 13C, a reception demultiplexing section 45. consisting of filter 13D～13F. Further, the transmission division unit 43 is connected to the reception division unit 44.
A band rejection filter 41 for blocking the interference signal and a delay compensation circuit 42 for equalizing the delay of the band rejection filter 41,
It was inserted between 44 and.
上述した従来の分波装置は、遅延補償回路42による通
過損失が増加する欠点がある。また、この遅延補償回路
は遅延時間の周波数特性による遅延時間歪を補償するこ
とができるが、絶対遅延時間を補償できないという欠点
がある。すなわち絶対遅延時間はスペースダイバーシテ
ィ方式で位相合成する際に、主アンテナ側の信号径路
と、副アンテナ側の信号径路とで同一時間に合わせる必
要があるために、絶対遅延時間を合わせる目的で別のフ
ィーダ等の線路長を追加して、絶対遅延時間を補償しな
ければならない欠点もある。The above-described conventional demultiplexer has a disadvantage that the passage loss due to the delay compensation circuit 42 increases. Further, this delay compensation circuit can compensate for the delay time distortion due to the frequency characteristics of the delay time, but has the disadvantage that it cannot compensate for the absolute delay time. That is, the absolute delay time must be set to the same time for the signal path on the main antenna side and the signal path on the sub-antenna side when phase combining by the space diversity method. There is also a drawback that the absolute delay time must be compensated by adding a line length such as a feeder.
本発明の目的は主アンテナ側の信号径路と副アンテナ
側の信号径路の絶対遅延時間を正確に合わせるととも
に、遅延補償回路による損失増加を最小限におさえるこ
とができる分波装置を提供することにある。SUMMARY OF THE INVENTION An object of the present invention is to provide a demultiplexer capable of accurately adjusting an absolute delay time of a signal path on a main antenna side and a signal path on a sub-antenna side and minimizing an increase in loss due to a delay compensation circuit. is there.
本発明の分波装置は少なくとも２周波数以上の波をフ
ィルタを用いて合成する送信分波部と、少なくとも２周
波数以上の波をフィルタを用いて分波する第１の受信分
波部と、前記送信分波部と前記第１の受信分波部を結合
する送受共用器と、この送受共用器が主アンテナに接続
され、前記第１の受信分波部と同一構成のスペースタイ
バーシティ用の第２の受信分波部が副アンテナにサーキ
ュレータを介して接続される分波装置において、 前記送受共用器と前記第１の受信分波部との間に備え
られた第１の帯域阻止フィルタと、前記サーキュレータ
と前記第２の受信分波部との間に前記第１の帯域阻止フ
ィルタと同一の遅延時間特性を有する第２の帯域阻止フ
ィルタとを有する。A demultiplexing device of the present invention, a transmission demultiplexing unit that synthesizes at least two or more frequency waves using a filter, a first reception demultiplexing unit that demultiplexes at least two frequency or more waves using a filter, A duplexer that couples a transmission duplexer and the first receive duplexer, and a duplexer that is connected to the main antenna and has the same configuration as the first receive duplexer for space diversity; A demultiplexer, wherein the second reception demultiplexer is connected to the sub-antenna via a circulator; a first band rejection filter provided between the duplexer and the first reception demultiplexer; A second band rejection filter having the same delay time characteristic as the first band rejection filter is provided between the circulator and the second reception branching unit.
次に本発明について図面を参照して説明する。 Next, the present invention will be described with reference to the drawings.
第１図は本発明の一実施例の構成図である。第１図に
おいて第３図と同一の符号の回路は同一の構成と機能を
有している。すなわち、アンテナ14の送受共用分波装置
である送受共用器15、送信分波部43、受信分波部44と、
副アンテナ16のサーキュレータ17、受信分波部45とは従
来例と同一である。FIG. 1 is a configuration diagram of one embodiment of the present invention. In FIG. 1, circuits having the same reference numerals as those in FIG. 3 have the same configurations and functions. That is, a duplexer 15, which is a shared duplexer for the antenna 14, a duplexer 43, a duplexer 44,
The circulator 17 of the sub-antenna 16 and the reception branching unit 45 are the same as in the conventional example.
第１図において帯域阻止フィルタ１は送信信号が受信
装置への干渉と阻止するために装備されており、一般に
受信信号帯に最も近い送信周波数に帯域阻止フィルタ１
の中心周波数と合わせる。この帯域阻止フィルタ１の特
性は第２図に示すように、f1,f2,f3は送信周波数帯、
f1′,f2′,f3は受信周波数帯であり、帯域阻止フィルタ
の中心周波数をf3に設定すると、受信信号中における遅
延時間帯特性は曲線21のようになる。一方、帯域阻止フ
ィルタ２は本来送信波の受信装置の周波数帯への干渉を
阻止するためのものであるが、副アンテナ16側の受信分
波部45は受信専用であるために、送信装置からの干渉は
ないが、主アンテナ14側の分波装置に実装した帯域阻止
フィルタ１と同等の帯域阻止フィルタ２を実装すること
により、副アンテナ16側と主アンテナ14側との絶対遅延
時間は全く同一の遅延時間特性を実現することができ
る。主アンテナ14側と副アンテナ16側とで受信された信
号は、それぞれ受信分波部44,45の出力に接続される周
波数変換器3,4により中間周波数帯に変換されて位相合
成器５により合成される。ここで帯域阻止フィルタ器1,
2で発生した遅延時間特性（第２図の特性21）は、中間
周波帯の遅延等化器６により補償される。また、別に図
面を設けないが、帯域阻止フィルタ1,2をそれぞれフィ
ルタ12D,13Dの出力と周波数変換器3,4の入力との間に実
装した場合でも同一の絶対遅延時間特性と遅延等化の効
果が得られる。In FIG. 1, a band rejection filter 1 is provided to prevent a transmission signal from interfering with a receiving device, and is generally provided at a transmission frequency closest to a reception signal band.
And the center frequency of. As shown in FIG. 2, the characteristics of the band rejection filter 1 are f 1 , f 2 , and f 3 in the transmission frequency band,
f 1 ′, f 2 ′, and f 3 are reception frequency bands. When the center frequency of the band rejection filter is set to f 3 , the delay time band characteristics in the reception signal are as shown by a curve 21. On the other hand, the band rejection filter 2 is for originally preventing the transmission wave from interfering with the frequency band of the receiving device. However, by installing a band rejection filter 2 equivalent to the band rejection filter 1 mounted on the demultiplexer on the main antenna 14 side, the absolute delay time between the sub antenna 16 side and the main antenna 14 side is completely reduced. The same delay time characteristics can be realized. The signals received by the main antenna 14 and the sub-antenna 16 are converted into intermediate frequency bands by frequency converters 3 and 4 connected to the outputs of the reception splitters 44 and 45, respectively, and Synthesized. Here, the band-stop filters 1,
The delay time characteristic generated in 2 (characteristic 21 in FIG. 2) is compensated by the delay equalizer 6 in the intermediate frequency band. Although not separately provided, the same absolute delay time characteristics and delay equalization are obtained even when the band rejection filters 1 and 2 are mounted between the outputs of the filters 12D and 13D and the inputs of the frequency converters 3 and 4, respectively. The effect of is obtained.
このように中間周波部に遅延等化器６を配置すること
により、受信分波部の損失が改善された雑音指数も改善
される。By arranging the delay equalizer 6 in the intermediate frequency section in this way, the noise figure in which the loss of the reception branching section is improved is also improved.
以上説明したように本発明は、副アンテナ側の受信分
波器にも主アンテナ側の受信分波器と同様な帯域阻止フ
ィルタを実装するとともに、遅延等化器を中間周波部に
配置することにより、主アンテナ側と副アンテナ側の絶
対遅延時間特性を同一にすることができる。かつ、高周
波損失が少なくなり遅延時間補償が容易になるという効
果がある。As described above, the present invention implements the same band rejection filter as that of the main antenna side reception duplexer in the sub antenna side reception duplexer, and arranges the delay equalizer in the intermediate frequency section. Thereby, the absolute delay time characteristics on the main antenna side and the sub antenna side can be made the same. In addition, there is an effect that high-frequency loss is reduced and delay time compensation is facilitated.
第１図は本発明の一実施例の構成図、第２図は本実施例
の帯域阻止フィルタによる遅延時間特性を示す特性図、
第３図は従来の分波装置の構成図である。 1,2……帯域阻止フィルタ、3,4……周波数変換器、５…
…位相合成器（中間周波帯）、６……遅延等化器（中間
周波帯）、11A〜Ｃ、12A〜Ｃ、13A〜Ｃ、17……サーキ
ュレータ、11D〜Ｆ、12D〜Ｆ、13D〜Ｆ……フィルタ、1
4……主アンテナ、15……送受共用器、16……副アンテ
ナ、43……送信分波部、44,45……受信分波部。FIG. 1 is a configuration diagram of one embodiment of the present invention, FIG. 2 is a characteristic diagram showing a delay time characteristic by a band rejection filter of the present embodiment,
FIG. 3 is a configuration diagram of a conventional demultiplexer. 1,2 ... band rejection filter, 3,4 ... frequency converter, 5 ...
... Phase synthesizer (intermediate frequency band), 6 ... Delay equalizer (intermediate frequency band), 11A-C, 12A-C, 13A-C, 17 ... Circulator, 11D-F, 12D-F, 13D- F …… Filter, 1
4: Main antenna, 15: Duplexer, 16: Sub-antenna, 43: Transmission branching unit, 44, 45 ... Reception branching unit.
───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.7，ＤＢ名) H01Q 1/12 - 1/26 H04B 1/38 - 1/58 H04B 7/00 H04B 7/02 - 7/12 H04L 1/02 - 1/06 ────────────────────────────────────────────────── ─── Continued on the front page (58) Field surveyed (Int.Cl. 7 , DB name) H01Q 1/12-1/26 H04B 1/38-1/58 H04B 7/00 H04B 7/02-7 / 12 H04L 1/02-1/06
Claims (2)
用いて合成する送信分波部と、少なくとも２周波数以上
の波をフィルタを用いて分波する第１の受信分波部と、
前記送信分波部と前記第１の受信分波部を結合する送受
共用器と、この送受共用器が主アンテナに接続され、前
記第１の受信分波部と同一構成のスペースタイバーシテ
ィ用の第２の受信分波部が副アンテナにサーキュレータ
を介して接続される分波装置において、 前記送受共用器と前記第１の受信分波部との間に備えら
れた第１の帯域阻止フィルタと、前記サーキュレータと
前記第２の受信分波部との間に前記第１の帯域阻止フィ
ルタと同一の遅延時間特性を有する第２の帯域阻止フィ
ルタとを有することを特徴とする分波装置。A transmission branching unit for combining waves of at least two frequencies using a filter; a first reception branching unit for branching waves of at least two frequencies using a filter;
A duplexer that couples the transmission duplexer and the first receive duplexer, the duplexer being connected to a main antenna and having the same configuration as the first receive duplexer for space diversity; In a branching device in which a second reception branching unit is connected to a sub-antenna via a circulator, a first band rejection filter provided between the transmission / reception duplexer and the first reception branching unit And a second band rejection filter having the same delay time characteristic as the first band rejection filter between the circulator and the second reception demultiplexing unit.
号をそれぞれ周波数変換して位相合成して得られる中間
周波帯出力部に前記第１および第２の帯域阻止フィルタ
用の遅延等化器を備えたことを特徴とする請求項１記載
の分波装置。2. A delay for the first and second band rejection filters in an intermediate frequency band output unit obtained by frequency-converting and phase-combining output signals of the first and second reception branching units, respectively. The demultiplexer according to claim 1, further comprising an equalizer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2149372A JP3013394B2 (en) | 1990-06-07 | 1990-06-07 | Demultiplexer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2149372A JP3013394B2 (en) | 1990-06-07 | 1990-06-07 | Demultiplexer |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0440714A JPH0440714A (en) | 1992-02-12 |
| JP3013394B2 true JP3013394B2 (en) | 2000-02-28 |
Family
ID=15473697
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2149372A Expired - Lifetime JP3013394B2 (en) | 1990-06-07 | 1990-06-07 | Demultiplexer |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3013394B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3544644B2 (en) * | 2000-09-29 | 2004-07-21 | 松下電器産業株式会社 | Wireless receiving apparatus and method for detecting delay difference between branches in wireless receiving apparatus |
-
1990
- 1990-06-07 JP JP2149372A patent/JP3013394B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0440714A (en) | 1992-02-12 |
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