JP3012536B2 - Cross cable for bidirectional communication parallel port - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a cross cable for a bidirectional communication parallel port, and more particularly to a parallel port interface (I / F) provided in a computer.
The present invention relates to a cross cable for a bi-directional communication parallel port that can connect two devices to perform bi-directional high-speed data transfer.

[0002]

2. Description of the Related Art Generally, a computer has a parallel port I / F for connecting to peripheral devices, especially a printer.
Is provided, and the I / O of a Centronics printer
Specifications conforming to F are almost standard.

FIG. 6 shows an I / O with a printer manufactured by Centronics.
FIG. 2 is a diagram showing input / output terminal names (indicated in relation to signal names) of signals transmitted and received between parallel ports conforming to / F (hereinafter, referred to as “Centronics-compliant parallel ports”) and transfer directions of the signals. .

As shown in FIG. 6, eight data signals from the computer to the printer (Data 1 to 8; hereinafter, referred to as "data bus signals") and a signal 4 for the computer to control the printer are provided in the Centronics-compliant parallel port. These are referred to as “Strobe # (timing signal for transferring data), AutoFd # (feeding instruction signal), SelectIn # (signal for performing a predefined request), Init # (initialization signal), ), And five signals (Busy (signal indicating data reception), Ack # (signal indicating data reception), Fault # (error occurrence notification signal),
Select (a signal indicating that data can be received), PError (a signal indicating that the paper has run out), and these are hereinafter referred to as a "status monitoring signal", and are defined by several other power and ground lines (not shown). ing.

[0005] The cable connecting the computer and the printer is called a straight cable because the terminals having the same terminal name are connected to each other.

For the purpose of transferring data between computers, it is assumed that control is performed by application software called “Inter-Link” assuming that Centronics-compliant parallel ports of computers prepared for the peripheral devices are connected. Dedicated cross cable and equivalent cable (hereinafter referred to as "conventional cross cable for bidirectional communication parallel port")
Is the most widespread.

FIG. 7 is a diagram showing connection of a conventional cross cable for a bidirectional communication parallel port.

As shown in FIG. 7, in a conventional cross cable for a bidirectional communication parallel port, five of the data bus signal terminals of one computer are connected to status monitoring signal terminals (five) of the other computer. The target structure,
Four data bus signals (for example, Data1 to 4) and one timing control signal (for example, Data5) are assigned to these five signal lines in each of the forward transfer and reverse transfer directions.
It enables bidirectional data transfer.

In this case, the cable connecting the two computers is called a cross cable because it has a bidirectional symmetrical structure as shown and interconnects specific different terminal names.

[0010] "Inter-Link" uses this cross cable to reduce the amount of data that can be transferred in one transfer from normal 8 bits to 4 bits, and to switch the transfer direction. Is controlled.

[0011] On the other hand, computers developed after 1994 have been developed in order to enable high-speed and comfortable printing.
Extended Capabilities P, one of the parallel ports specified by EE1284
Ort (extended function port, hereinafter referred to as ECP) function is often provided.

[0012] Specifically, the ECP function is provided by Bidire.
It has a ctional data bus and a 16-stage FIFO buffer. Transmission and reception timing control conventionally performed by software I / O access is performed by hardware synchronized with the FIFO buffer. Also, when compressed data is received, a function such as automatic decompression by hardware is provided to reduce the load on the system and reduce the load on the system to 2 Mbytes / Sec (16 Mbit / s).
Sec) at a high transfer rate.

The parallel port of the ECP function is a superset of the parallel port conforming to the Centronics standard. It defines a new protocol in which the role of a conventional signal is changed without adding an interface signal line, and efficiently implements the new protocol. The above-mentioned dedicated hardware is added for operation.

FIG. 5 is a diagram showing input / output terminal names (displayed in relation to signal names) of signals transmitted and received between a computer and peripheral devices between parallel ports having an ECP function, and transfer directions of the signals. It is. For reference, FIG. 4 shows terminal names of corresponding terminals in the case of a parallel port having an ECP function and the case of a Centronics-compliant parallel port. FIG. 4 also shows correspondence with pin numbers of two types of cable connectors described later.

Referring to FIG. 5, the illustrated interface circuit includes a FIFO buffer (not shown).
Data bus signals (Data1 to Data
Data8), timing synchronization signals (HostClk (host clock signal), PeriphAck (peripheral device data acceptance signal)) at the time of data transfer from the computer to peripheral devices controlled by hardware in conjunction with the data bus FIFO buffer, A timing synchronization signal (PeriphClk) when data is transferred from a peripheral device controlled by hardware to a computer in conjunction with a FIFO buffer on the data bus.
(Peripheral device clock signal), HostAck (host data acceptance signal), monitoring signal from peripheral device to be monitored by software to computer (PeriphRequest # (peripheral device reverse transfer switching request signal), Xflag (ECP mode compatible signal) , A
ckReverse # (peripheral device reverse transfer switching acceptance signal), control signal from software controlled computer to peripheral device (1284Active (ECP mode transition signal), Reverse
Request # (host reverse transfer switching request signal) exists. Here, the reverse direction refers to the direction from the peripheral device to the host.

Here, the signals related to the data transfer speed are a data bus signal and a timing synchronization signal, and the other signals are signals related to switching of the transfer direction of the data transfer.

As shown in FIG. 5, a cable for connecting a computer having an ECP function to a peripheral device having an ECP is a straight cable since terminals having the same terminal name are connected.

As described above, since the parallel port of the ECP function is a superset of the parallel port conforming to Centronics, the parallel ports of the computers having the ECP function are connected by the conventional cross cable for the bidirectional communication parallel port. However, bidirectional data transfer can be performed.

However, in the conventional cross cable for bidirectional communication parallel port, signals used in the ECP protocol are not connected, so that the computer having the ECP function cannot exhibit the high-speed transfer capability, and the low-speed transfer is not possible. Will be forced.

[0020]

When two computers having an ECP function are connected to each other by a conventional bidirectional communication parallel port cross cable, the conventional parallel boat itself that performs transfer timing control by software. In addition to the low transfer speed, the parallel port, which was originally an interface for performing data transfer limited to the direction from the computer to the peripheral device, has a bidirectional transfer function. The amount of data that can be sent by transfer is 4 bits from normal 8 bits
To halve the low transfer capacity,
The maximum transfer is about 1.3 Mbit / Sec, and there is a problem that the transfer speed is low.

Such a low transfer rate is 115.2 Kbit, which is the limit of a transfer rate using a serial port controlled by a UART compatible with NS16550 manufactured by National Semiconductor, which is generally equipped in a computer.
Although the speed is much faster than / Sec, the capacity is insufficient when assuming a phase of transferring a large amount of data typified by image information for a purpose such as backup of a storage device.

Further, when two computers having an ECP function are connected to each other with a conventional cross cable for a bidirectional communication parallel port, the transfer timing is controlled by software, so that the CPU is used for each transfer. I
It is necessary to start the / O cycle, and there is a problem that the load on the CPU increases as the transfer capacity increases.

When two computers having an ECP function are connected to each other by a conventional two-way communication parallel port cross cable, the processing capacity of one of the two computers for data transfer is used. Data transfer speed is low, or the processing capacity assigned to data transfer is reduced due to high load on the CPU by other software, that is, the data transfer speed is reduced. There is a problem of dependence.

An object of the present invention is to provide a cross cable for a bidirectional communication parallel port which can improve the transfer speed on the interface from about 1.3 Mbit / Sec to about 16 Mbit / Sec. .

Another object of the present invention is to reduce the load on the CPU by not using the CPU for controlling the timing of data transfer, and to use the surplus processing capacity for other purposes. It is an object of the present invention to provide a cross cable for a bidirectional communication parallel port capable of improving the total performance.

[0026]

A cross cable for a bidirectional communication parallel port according to the first invention is an IEEE1284.
In the cross cable for the bidirectional communication parallel port connecting the first computer and the second computer each having the Extended Capabilities Port (extended function port) function specified in the above, the data bus signal n terminal of the first computer A connection line for connecting (Data n) (n = 1 to 8) to a corresponding data bus signal n terminal of the second computer and a host clock signal terminal (HostClk) of the first computer are connected to the second computer. A connection line connected to the peripheral device clock signal terminal (PeriphClk); and a host clock signal terminal (Ho) of the second computer.
stClk) to a peripheral device clock signal terminal (PeriphClk) of the first computer, and a host data acceptance signal terminal (HostAck) of the first computer to a peripheral device data acceptance signal terminal (PeriphAc) of the second computer.
k) and a connection line connecting the host data acceptance signal terminal (HostAck) of the second computer to the peripheral device data acceptance signal terminal (PeriphAck) of the first computer. .

A cross cable for a bidirectional communication parallel port according to a second invention is the cross cable for a bidirectional communication parallel port according to the first invention, wherein the ECP mode transition signal terminal (1284Active) of the first computer is connected to the first. ECP mode compatible signal terminal (Xflag) of computer and second
A connection line connected to a peripheral device reverse transfer switching request signal terminal (PeriphRequest #) of the second computer and an ECP mode transition signal terminal (1284Active) of the second computer are connected to an ECP mode-compatible signal terminal (Xfla) of the second computer.
g) and a connection line connected to the peripheral device reverse transfer switching request signal terminal (PeriphRequest #) of the first computer;
A connection line connecting the host reverse transfer request signal terminal (ReverseRequest #) of the first computer to the peripheral device reverse transfer switch acceptance signal terminal (AckReverse #) of the second computer; The direction transfer switching request signal terminal (ReverseRequest #) is connected to the peripheral device reverse transfer switching acceptance signal terminal (AckRev
erse #).

A cross cable for a bidirectional communication parallel port according to a third aspect of the present invention is the cross cable for a bidirectional communication parallel port according to the first or second aspect.
It has a 1284-A type connector specified in EE1284.

A cross cable for a bidirectional communication parallel port according to a fourth aspect of the present invention is the cross cable for a bidirectional communication parallel port according to the first or second aspect of the invention.
It has a 1284-C type connector defined by EE1284.

A cross cable for a bidirectional communication parallel port according to a fifth aspect of the present invention is the cross cable for a bidirectional communication parallel port according to the first or second aspect.
It has a 1284-A type connector specified by IEEE1284, and has a 12-bit connector specified by IEEE1284 at the other end.
It has an 84-C type connector.

[0031]

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a diagram showing connection of a cross cable for a bidirectional communication parallel port according to the first embodiment of the present invention.

As shown in FIG. 1, a cross cable for a bidirectional communication parallel port according to the first embodiment is a bidirectional data bus signal (Data1 to Data) having a FIFO buffer.
8) connects terminals with the same terminal name to each other as in a straight cable.

The handshake signal for each transfer direction controlled by hardware is such that one HostClk terminal is connected to the other PeriphClk terminal and one HostAck terminal is connected to the other PeriphClk terminal.
It is connected to the phAck terminal and cross-connected so that the forward transfer handshake signal of one computer becomes the reverse transfer handshake signal of the other computer.

Thus, 8-bit data transfer can be performed in one data transfer by the cross cable for the bidirectional communication parallel port of the first embodiment, and the handshake of the data transfer is performed by hardware. The data transfer is controlled by E
Using existing software attached to the CP function, E
The CP function can be fully utilized and high-speed transfer can be performed.

The remaining five unconnected wires in the first embodiment are not signals directly involved in the data transfer using the ECP function, but perform preparations such as determination of a transfer direction by software control. It is used as an application, and at least two sets of connections need only be connected so that the control signal of one computer reflects on the state monitoring signal of the other computer.

Next, a cross cable for a bidirectional communication parallel port according to a second embodiment of the present invention will be described.

FIG. 2 is a diagram showing connection of a cross cable for a bidirectional communication parallel port according to a second embodiment of the present invention.

As shown in FIG. 2, the cross cable for the bidirectional communication parallel port of the second embodiment has a FIFO buffer similar to the connection of the cross cable for the bidirectional communication parallel port of the first embodiment. The provided bidirectional data bus signals (Data1 to Data8) connect the terminals with the same terminal name as in a straight cable, and handshake signals for each transfer direction controlled by hardware are connected to one of the HostClk terminals. Is connected to the other PeriphClk terminal, one HostAck terminal is connected to the other PeriphAck terminal, and cross-connected so that the forward transfer handshake signal of one computer becomes the reverse transfer handshake signal of the other computer.

The difference between the cross cable for the bidirectional communication parallel port of the second embodiment and the cross cable for the bidirectional communication parallel port of the first embodiment is that the signal for switching the transfer direction is different. One another 12
84 Connect the Active terminal to the other PeriphRequest # terminal
Connect the verseRequest # terminal to the other AckReverse # terminal, and connect your computer's 1284Active terminal and Xflag
This is the point where the terminal is connected.

In connection with such a connection, EC
At the time of P transfer, one of the two computers facing each other acts as a host computer (this computer is abbreviated as computer H), and the other computer acts as a peripheral device (this computer is abbreviated as computer P). However, the computer P is caused to perform the following control.

Since the 1284Active terminal of the computer H is connected to the PeriphRequest # terminal of the computer P, the computer P monitors the 1284Active signal from the computer H arriving at the PeriphRequest # terminal so that the computer H can perform ECP transfer. If it is determined that a request to transfer to ECP is made, the own computer is shifted to a mode in which ECP transfer is possible.

Conversely, PeriphRequest # of computer H
Since the 1284 Active terminal of the computer P is connected to the terminal, when the computer P wants to make a request for the reverse transfer to the computer H, the intention is transmitted by controlling the 1284 Active signal.

Further, since the AckReverse # terminal of the computer P is connected to the ReverseRequest # terminal of the computer H and the ReverseRequest # terminal of the computer P is connected to the AckReverse # terminal of the computer H, the computer P is connected to the AckReverse # terminal. # If the computer H is requesting reverse transfer by monitoring the Reverse Request signal from the computer H arriving at the # terminal, prepare to change the transfer direction of the data bus from the previous reception mode to the transmission mode. Is completed, the computer H is informed of the acceptance of the reverse transfer request to the computer H by controlling the ReverseRequest # signal of the own computer.

Thus, in the computer H at the time of the ECP transfer, not only the data transfer but also the mode transition and the transfer direction switching are performed by the cross cable for the bidirectional communication parallel port according to the second embodiment. Using the ECP function control software, the EC
The P function can be fully utilized and high-speed transfer is possible.

Next, connectors arranged at both ends of the above-described cable will be described.

In IEEE 1284, a connector used for a parallel port of a computer is defined.
284-A type (25 pins) and 1284-C type (36 pins). In fact, there are computers with 1284-A type connectors and computers with 1284-C type connectors on the market.

FIG. 4 shows pin numbers of two types of connectors defined by IEEE1284 and EC assigned to the pins.
The signal names at the time of the P function and the signal names at the time of conformity with Centronics are shown (in the figure, pin information not related to the present invention is omitted). For example, in the 1284-A type connector, the pin number 1 is used for the HostClk terminal.
In the -C type connector, pin number 1 is used for the PeriphAck terminal.

Therefore, as a configuration of the cross cable,
When the connector is included, there are three types of configurations as shown in FIG.

That is, the first is a configuration in which 1284-A type connectors are provided at both ends of the cable shown in FIG. 3A, and the second is a configuration in which 1284-A connectors are provided at both ends of the cable shown in FIG.
FIG. 3 shows a configuration in which a 4-C connector is provided.
The cable shown in (c) has a 1284-A type connector at one end and a 1284-C type connector at the other end.

[0051]

The first effect is an improvement in data transfer speed.

A computer having an ECP function was connected with a cross cable according to the present invention to about 1.3 Mbit / Sec when connected with a conventional bidirectional communication parallel port cross cable, and data was transferred by ECP. In that case, the data transfer rate is improved to about 16 Mbit / Sec.

This difference in transfer speed is caused by the fact that, in the conventional cross cable for bidirectional communication
Even though the CP function is provided, ECP transfer could not be performed due to inadequate cable connection specifications. On the other hand, the cross cable of the present invention has a connection specification designed to enable ECP transfer. This is because high-speed transfer is possible.

The second effect is a reduction in the CPU load during data transfer.

When transferring 1-byte data, the CP
The comparison is made based on the number of I / O cycles activated by U. Six times when the timing is controlled by software using a conventional cross cable for bidirectional communication parallel ports. On the other hand, the ECP transfer using the cross cable of the present invention is performed once.

This difference is also due to the fact that the ECP function can be used only in the case of the cross cable of the present invention. In a conventional cross cable for a bidirectional communication parallel port, 1
Times data transfer is in units of 4 bits.
It is necessary to start the / O cycle three times. Therefore,
One-byte transfer requires twice as many cycles as six times.

Since the ECP function can be used in the cross cable of the present invention, data to be transferred is
Since it is only necessary to write data into the IFO buffer, the number of I / O cycles to be activated may be one.

Further, since the CPU power corresponding to the reduced load of the CPU for the transfer can be used for other purposes, it is expected that the total performance of the computer system is improved.

The third effect is that the C mounted on the computer
A certain transfer rate can be expected regardless of the processing capacity of the PU.

When a computer is connected using a conventional bidirectional communication parallel port cross cable and data transfer is performed by transfer timing control by software,
If a heavy load is applied to the CPU and the activation of the I / O cycle for instructing the data transfer timing is delayed, the data transfer speed is reduced.

However, when the ECP function is used by connecting with the cross cable according to the present invention, the hardware of the transfer timing control linked to the FIFO buffer requires the FIFO buffer.
It senses the data stored in the buffer and automatically transfers the data. In addition, due to the buffer effect of the multi-stage FIFO buffer, the activation of the I / O cycle for writing data may be irregular, so that the transfer speed is less likely to decrease even when the CPU is under heavy load.

[Brief description of the drawings]

FIG. 1 is a connection diagram showing a first embodiment of a cross cable for a bidirectional communication parallel port according to the present invention.

FIG. 2 is a connection diagram showing a second embodiment of a cross cable for a bidirectional communication parallel port according to the present invention.

FIG. 3 is a configuration diagram showing three types of configurations (a), (b) and (c) of a cross cable for a bidirectional communication parallel port of the present invention including a connector.

FIG. 4 is a diagram showing the correspondence between signal names of an ECP function and a Centronics-compliant parallel port and pin numbers of 1284A and 1284C connectors.

FIG. 5 is a connection diagram of a straight cable of a parallel port of the ECP function.

FIG. 6 is a connection diagram of a straight cable of a parallel port conforming to Centronics.

FIG. 7 is a connection diagram of a conventional cross cable for a bidirectional communication parallel port.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Cross cable for bidirectional communication parallel port 2 1284-A type connector 3 1284-C type connector

Claims (5)

(57) [Claims] 1. Exte specified by IEEE1284
In a cross cable for a bidirectional communication parallel port connecting a first computer and a second computer each having an nded CapabilitiesPort (extended function port) function, a data bus signal n terminal (Data n) (n = 1 to 8) to the corresponding data bus signal n terminal of the second computer, and the host clock signal terminal (Ho) of the first computer.
stClk) to the peripheral device clock signal terminal (PeriphClk) of the second computer and the host clock signal terminal (HostClk) of the second computer to the peripheral device clock signal terminal (PeriphClk) of the first computer. A connection line for connecting; a connection line for connecting the host data acceptance signal terminal (HostAck) of the first computer to a peripheral device data acceptance signal terminal (PeriphAck) of the second computer; and a host data acceptance signal of the second computer. A connection line for connecting a terminal (HostAck) to a peripheral device data acceptance signal terminal (PeriphAck) of the first computer. 2. An ECP mode transition signal terminal (1284Active) of the first computer is connected to the ECP mode of the first computer.
A mode compatible signal terminal (Xflag) and a peripheral device reverse transfer switching request signal terminal (PeriphRequest) of the second computer
#) And the EC of the second computer
The P-mode transition signal terminal (1284Active) is connected to the ECP mode-compatible signal terminal (Xflag) of the second computer and the peripheral device reverse transfer switching request signal terminal (Pe) of the first computer.
riphRequest #) and a host reverse transfer switching request signal terminal (ReverseReq) of the first computer.
uest #) to a peripheral device reverse transfer switching acceptance signal terminal (AckReverse #) of the second computer;
A connection line for connecting a host reverse transfer switching request signal terminal (ReverseRequest #) of the second computer to a peripheral device reverse transfer switching acceptance signal terminal (AckReverse #) of the first computer. Item 2. A cross cable for a bidirectional communication parallel port according to item 1. 3. The cross cable for a bidirectional communication parallel port according to claim 1, further comprising a 1284-A type connector defined by IEEE 1284 at both ends. 4. The cross cable for a bidirectional communication parallel port according to claim 1, further comprising a 1284-C connector defined by IEEE 1284 at both ends. 5. One end has a 1284-A type connector defined in IEEE 1284, and the other end has an IEEE 1224-type connector.
3. The cross cable for a bidirectional communication parallel port according to claim 1, further comprising a 1284-C type connector defined in claim 84.