JP3011284B2 - Solid-state imaging device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state image pickup device having a dynamic range improved by using a solid-state image pickup device which can be randomly accessed.

[0002]

2. Description of the Related Art Conventionally, when capturing an image signal in a solid-state imaging device, there is a phenomenon that if a bright portion and a dark portion exist in the same screen, the dark portion is blackened.
The reproduced image is significantly deteriorated. As a method for improving this phenomenon, there is a method in which an image signal is stored in a memory after the first exposure, a dark portion is detected, an exposure amount is adjusted, a second exposure is performed, and signal charges are read again. .

[0003]

However, a solid-state image pickup device using a plurality of pixels arranged in the X and Y directions, such as a conventional CCD image sensor or MOS type image sensor, cannot be used in the above-described means. Since all pixels have to be read out later, there is a problem that the photographing time becomes longer by the number of times of rereading.

The present invention has been made to solve such a problem, and an object of the present invention is to reduce the imaging time effectively and prevent deterioration of a reproduced image even though the imaging time is short. To provide a solid-state imaging device.

[0005]

SUMMARY OF THE INVENTION It is an object of the present invention to arrange a plurality of pixels including a photoelectric conversion unit in an X direction and a Y direction.
Designate the imaging area and X address / Y address
Read out signal from specified pixel by random
A solid-state imaging device including
A plurality of signals from the pixels.
Adding means for adding a signal, a first timing
Comparison between the signal read out by the
And reading at the first timing according to the result of the comparison.
When the detected signal is smaller than the predetermined reference signal
Reads the signal again from the same pixel at the second timing
The adding means reads at the first timing.
The read signal and the signal read at the second timing
And control means for controlling so as to perform the addition of .

It is another object of the present invention to include a photoelectric conversion unit.
An imaging region in which a plurality of pixels are arranged in the X direction and the Y direction;
Specified by specifying address / Y address
Reads signals from pixels and allows random access
And a solid-state imaging device having a solid-state imaging device including
A run for storing a signal read from the pixel.
A dumb accessible memory and a first tie from the pixel
When the signal read by the memory is stored in the memory,
In addition, the signal read at the first timing and the location
Perform a comparison with a fixed reference signal, and according to the result of the comparison,
The signal read at the first timing is the predetermined signal.
Is smaller than the reference signal of
Read out the signal with the large amount of photocharge stored at the timing
And control to store it again in the same location in the memory
That you and a control means for being accomplished by the solid-state imaging device according to claim. Furthermore, the object of the present invention is
Imaging region in which a plurality of pixels including a portion are arranged in the X and Y directions.
Area and X address / Y address
Random access to read signals from specified pixels
Solid-state imaging device including a solid-state imaging device including
In an imaging device, a plurality of signals from the pixels are added.
Adding means for storing a signal read from the pixel
A memory that is randomly accessible and a first
Store the signal read at the timing in the memory
And the signal read at the first timing
And a comparison with a predetermined reference signal.
Therefore, the signal read at the first timing is
If the reference signal is smaller than the predetermined reference signal,
At the second timing, the signal is read out and sent to the adding means.
And at the first timing stored in the memory
The read signal and the signal read at the second timing.
Signal, and the added signal is stored in the memory again.
And control means for controlling so as to remember
This is achieved by a solid-state imaging device.

[0007]

Embodiments of the present invention will be described below in detail with reference to the drawings. [First Embodiment] FIG. 1 is a block diagram showing an embodiment of a solid-state imaging device according to the present invention. In FIG. 1, reference numeral 2 denotes a solid-state imaging device capable of random access. The specific configuration of the solid-state imaging device 2 will be described later in detail. 3
Is a comparator that compares an image signal with a predetermined reference signal and outputs a signal in accordance with the comparison result. Reference numeral 4 denotes a random-accessible memory for storing a signal of the solid-state imaging device 2. Reference numeral 5 denotes a control signal generator for generating an address signal of the solid-state imaging device 2 and the memory 4 and synchronizing with the comparator 3, and reference numeral 6 denotes an output terminal. FIG. 2 is a diagram showing a configuration of a pixel of the solid-state imaging device 2, and shows an example in which an adder is provided for each pixel. In FIG. 2, 1 is an adder, D11 is a photodiode, C11 is a storage capacitor, and T9 is a pulse φV1.
A transistor driven by 1 and 20 is an output terminal connected to an output line.

FIG. 3 is a schematic configuration diagram showing the solid-state imaging device 2 which can be randomly accessed. This solid-state imaging device is disclosed in US Pat. No. 4,942,473. In FIG. 3, reference numeral 11 denotes an imaging region having a plurality of pixels arranged in the X direction and Y direction, 12 denotes a Y address line for selecting one horizontal line in the imaging region, and 13 denotes a Y address line. An output line for outputting one horizontal pixel signal, 14 is a Y direction decoder for selecting one line based on Y address information sent from the control signal generator 5, and 15 is an X direction sent from the control signal generator 5. An X-direction decoder for generating a signal for selecting one pixel in one line based on the address information, 16 for an X-direction selector for selecting a signal for one pixel in one line, 17 for an output circuit, and 18 for an output terminal is there. FIG. 4 shows pixels constituting the imaging region 11 shown in FIG. 3, where D1 and C1 are photodiodes and storage capacitors, T1 is a reset transistor driven by a reset pulse φR1 to reset the photodiode, and T2 and T3 are First stage source follower circuit, T
4 is a sample transistor driven by the sampling pulse φS1, C2 is a sample capacitor, T5 and T6 are source follower circuits of the second stage, T7 is a Y address transistor having a gate connected to a Y address line, 19
Is an output terminal connected to the output line 13.

Next, the operation of the solid-state imaging device will be described. First, the reset transistor T1 is turned on by the reset pulse φR1, and the electric charge stored in the storage capacitor C1 is swept out. Next, the reset transistor T1 is turned off, the photodiode D1 is exposed as much as necessary, and charges are stored in the storage capacitor C1. At this time, since the charge amount has been converted to a voltage value by the source follower circuit of the first stage, the sampling transistor T4 is turned on by the sampling pulse φS1, and the voltage value is changed to the sample capacitance C.
Hold at 2. The voltage value held in the sample capacitor C2 can be held until the sampling transistor T4 is turned on again by the sampling pulse φS1. Then, the voltage value is output from the output terminal 19 when the Y address transistor T7 is turned on. The output voltage value is selected by the X-direction selector 16 and output from the solid-state imaging device 2 as an image signal. Here, when the thing of FIG. 2 is used instead of FIG. 4,
The gate of the transistor T9 is connected to the Y address line 12, and the transistor T9 becomes a Y address transistor. Then, the output terminal 20 is connected to the output line 13.

The adder 1 can be realized by a circuit as shown in FIG. In FIG. 5, 21 is an input terminal, T11
And T21 are reset transistors driven by reset pulses φR11 and Rφ21, respectively.
12 and T13, T22 and T23, T16 and T17, and T19 and T20 are source follower circuits, respectively, and T14, T24 and T13 are sampling pulses φS11, φS21 and φS1, respectively.
3, the sample transistor driven by C1,
2, C22 and C13 are sample capacitors each holding a sampled voltage value, T15 is a switching transistor driven by the switching pulse φS12 and applying a predetermined reference voltage Vref to the sample capacitor C12, T2
An addition transistor 5 is driven by the addition pulse φS22 and adds the voltage values held in the sample capacitors C12 and C22. Reference numeral 22 denotes an output terminal.

In the adder 1, first, an input terminal 2
The signal input to 1 indicates that the sample transistor T14 is on while the switching transistor T15 is on,
Then, by turning off, it is held in the sample capacity C12. Next, the signal is held in the sample capacitor C13 when the sample transistor T18 is turned on and off. When addition is not performed, a signal is output from the output terminal 22 while maintaining this state until the next sampling is performed. When the addition is performed, in the above state, the signal held in the sample capacitor C13 is held in the sample capacitor C22 by turning on and off the sample transistor T24. Next, by turning off the switching transistor T15 and turning on the adding transistor T25, the signal voltages held in the sample capacitors C12 and C22 are added. Here, before the switching transistor T15 is turned off, a new signal is input from the input terminal 21, and the sample transistor T14 is turned on and off, and is held in the sample capacitor C12, so that different signals can be added. It is. Then, by turning on and off the sample transistor T18 in the state of the addition, the addition signal is held in the sample capacitor C13, and the addition signal can be output from the output terminal 22.

Next, the operation of the embodiment shown in FIGS. 1 and 2 will be described. First, after the first exposure, the signal of the pixel of the solid-state imaging device 2 is read out while the signal is controlled to pass through the adder 1 as it is, and the dark portion is detected by the comparator 3. The comparator 3 receives a predetermined reference signal from the control signal generator 5, compares it with a pixel signal, and returns the result to the control signal generator 5. Here, the predetermined reference signal is set low so that a dark part can be detected. When the signal currently being compared is lower than the predetermined reference signal, the control signal generator 5 reads out the signal of the pixel at the same address of the solid-state imaging device 2 again. This time, the adder 1 is controlled to add, and the signals of the pixels at the same address are added and read.
By repeating this operation a predetermined number of times, it is possible to increase the sensitivity of a dark part. As described above, the addition of signals for one pixel is completed, and the result is stored in the memory 4. Memory 4 is
It is controlled by the address generated by the control signal generator 5 and has a one-to-one correspondence with the pixels of the solid-state imaging device 2. However, in the frame mode in which all the pixels are read in one imaging, the capacity of the memory 4 is required only by the number of pixels of the solid-state imaging device 2. However, in the field mode in which only half of the pixels are read in one imaging. In this case, half the number of pixels is sufficient. This embodiment is a frame mode. As described above, the addition of signals for one pixel is completed, and this is performed for all pixels.
Thereby, the expansion of the dynamic range can be realized. Then, even if this operation is repeated a predetermined number of times, it is not necessary to read all the pixels every time, so that the imaging time can be greatly reduced as compared with the related art, and the problem that the imaging time becomes longer can be solved.

[Second Embodiment] FIG. 6 is a view showing a second embodiment, wherein a shutter and a diaphragm 7 are provided as means for adjusting the exposure amount. Further, an address memory 8 controlled by an address generated by the control signal generator 5 is provided. In the present embodiment, after the first exposure, the signals of the pixels of the solid-state imaging device 2 are read out while being controlled so that the signals pass through the adder 1 as they are, stored in the memory 4, and darkened by the comparator 3. Find the part. Control signal generator 5
In the case where the signal currently being compared is lower than the predetermined reference signal, the address is stored in the address memory 8.
Thereafter, the shutter and the aperture 7 are adjusted to perform the second exposure. Then, based on the address stored in the address memory 8, the signal of the pixel at the same address of the solid-state imaging device 2 is read out again. This time, the adder 1 is controlled to be added, the signal at the first exposure and the signal at the second exposure are added and read, and stored at the same address in the memory 4. By this operation, the sensitivity of the dark part can be increased, and thus the dynamic range can be expanded. Then, even if this operation is repeated a predetermined number of times, it is not necessary to read all the pixels every time, so that the problem that the photographing time becomes longer is eliminated. Further, the means for adjusting the exposure amount can be realized by causing the solid-state imaging device 2 to perform an electronic shutter operation. In this embodiment, the case where the shutter and the aperture 7 are used has been described.

[Third Embodiment] FIG. 7 is a diagram showing a third embodiment, in which an adder 1 is provided for each pixel column in the Y direction of the solid-state imaging device 2 and is shown in FIGS. It can be used instead of the solid-state imaging device 2.

[Fourth Embodiment] FIG. 8 is a diagram showing a fourth embodiment, in which an adder 1 is provided for each pixel column in the X direction of the solid-state imaging device 2 and is shown in FIGS. It can be used instead of the solid-state imaging device 2. In FIG. 8, reference numeral 23 denotes an X address line for selecting one vertical line in the imaging area 11, and reference numeral 24 denotes an output line for outputting a signal of a pixel selected by the X address line and the Y address line 12. FIG. 9 shows the pixels constituting the imaging region 11 shown in FIG. 8, and T7 designates the gate as the Y address line 1
2, a Y address transistor connected to 2; T8, an X address transistor whose gate is connected to an X address line 23; and 25, an output terminal connected to an output line 24. A signal is output to output terminal 25 only when Y address transistor T7 and X address transistor T8 are turned on.

[Fifth Embodiment] FIG. 10 is a diagram showing a fifth embodiment, in which an adder 1 is used in place of the output circuit of the solid-state imaging device 2, and the solid-state shown in FIGS. Image sensor 2
Can be used instead of

[Sixth Embodiment] FIG. 11 is a block diagram showing a sixth embodiment. In FIG. 11, the adder 1 is provided outside the solid-state imaging device 2. The same applies to the following embodiments. In this embodiment, first, after the first exposure, the solid-state imaging device 2
Are read out and stored in the memory 4.
The adder 1, either as it is passed through or for adding to the image signal of the solid-state image sensor 2 is controlled by a control signal generator 5. In the first exposure, the light is passed as it is. The memory 4 is controlled by an address generated by the control signal generator 5, and has a one-to-one correspondence with the pixels of the solid-state imaging device 2. However, in the frame mode in which all the pixels are read in one imaging, the capacity of the memory 4 is required only by the number of pixels of the solid-state imaging device 2. However, in the field mode in which only half of the pixels are read in one imaging. In this case, half the number of pixels is sufficient.
In this embodiment, the case of the frame mode will be described in the same manner as the above embodiment. The comparator 3 receives a predetermined reference signal from the control signal generator 5, compares it with an image signal, and returns the result to the control signal generator 5. Next, the signals of the memory 4 are sequentially read, and the comparator 3 compares the signals with a predetermined reference signal. Here, the predetermined reference signal is set low so that a dark part can be detected. When the signal currently being compared is lower than the predetermined reference signal, the control signal generator 5 reads out the signal of the pixel at the same address of the solid-state imaging device 2 again. This time, the adder 1 is controlled so as to add the signal of the solid-state imaging device 2 and the signal of the memory 4, and the signals of the pixels of the same address are added and stored at the same address of the memory 4. By repeating this operation a predetermined number of times, the sensitivity of the dark part can be increased, and thus the dynamic range can be expanded. Then, even if this operation is repeated a predetermined number of times, it is not necessary to read all the pixels every time, so that the imaging time can be greatly reduced similarly to the above embodiment, and the problem that the imaging time becomes longer is eliminated.

[Seventh Embodiment] FIG. 12 is a diagram showing a seventh embodiment. In this embodiment, after the first exposure, before reading out the signal of the pixel of the solid-state imaging device 2, the signal is controlled to pass through the adder 1, stored in the memory 4, and stored in the comparator 3. Detect dark areas. When the signal currently being compared is lower than the predetermined reference signal, the control signal generator 5 reads out the signal of the pixel at the same address of the solid-state imaging device 2 again. Next, the adder 1 is controlled to add the signal of the solid-state imaging device 2 and the signal of the memory 4, and the result of the addition is stored at the same address in the memory 4. By repeating this operation a predetermined number of times, it is possible to increase the sensitivity of a dark part. As described above, the addition of signals for one pixel is completed, and this is performed for all pixels. Thereby, the expansion of the dynamic range can be realized. In this embodiment, compared to the sixth embodiment, it is not necessary to temporarily store the signals of all the pixels of the solid-state imaging device 2 in the memory 4 after the first exposure, so that the photographing time is reduced accordingly. Can be shorter.

[Eighth Embodiment] FIG. 13 is a view showing an eighth embodiment, wherein a shutter and an aperture 7 are provided as means for adjusting the exposure amount. Further, an address memory 8 controlled by an address generated by the control signal generator 5 is provided. In the present embodiment, after the first exposure, the signals of all the pixels of the solid-state imaging device 2 are read out and stored in the memory 4. Next, the signals of the memory 4 are sequentially read, and the comparator 3 compares the signals with a predetermined reference signal. When the signal currently being compared is lower than the predetermined reference signal, the control signal generator 5 stores the address in the address memory 8. After comparing all the signals in the memory 4, the shutter and the aperture 7 are adjusted to perform the second exposure. Then, based on the address stored in the address memory 8, the signal of the pixel at the same address of the solid-state imaging device 2 is read out again and stored at the same address in the memory 4. By this operation, the sensitivity of the dark part can be increased, so that the dynamic range can be expanded. Then, since it is not necessary to read all the pixels after the second exposure, the problem that the photographing time becomes longer is eliminated. The means for adjusting the exposure amount can be realized by causing the solid-state imaging device 2 to perform an electronic shutter operation.
Has been described.

[Ninth Embodiment] FIG. 14 shows a ninth embodiment. In this embodiment, when reading out the signal of the pixel of the solid-state imaging device 2 after the first exposure, the signal is stored in the memory 4 and the dark portion is detected by the comparator 3. When the signal currently being compared is lower than the predetermined reference signal, the control signal generator 5 stores the address in the address memory 8. Then, adjust the shutter and the aperture 7 to
The second exposure is performed. Then, based on the address stored in the address memory 8, the signal of the pixel at the same address of the solid-state imaging device 2 is read out again and stored at the same address in the memory 4. By this operation, the sensitivity of the dark part can be increased, so that the dynamic range can be expanded. In the present embodiment, compared to the eighth embodiment, 1
After the second exposure, the photographing time can be shortened by the time for storing the signals of all the pixels of the solid-state imaging device 2 in the memory 4.

[Tenth Embodiment] FIG. 15 is a view showing a tenth embodiment, which is an example in which the sixth embodiment and the eighth embodiment are combined. In this embodiment, after the first exposure, the signals of all pixels of the solid-state
To memorize. At this time, the adder 1 passes the signal of the solid-state imaging device 2 as it is. Next, the signals of the memory 4 are sequentially read, and the comparator 3 compares the signals with a predetermined reference signal. When the signal currently being compared is lower than the predetermined reference signal, the control signal generator 5 stores the address in the address memory 8.
To memorize. After comparing all the signals in the memory 4, the shutter and the aperture 7 are adjusted to perform the second exposure. Then, based on the address stored in the address memory 8, the signal of the pixel at the same address of the solid-state imaging device 2 is read out again. This time, the adder 1 is controlled so as to add the signal of the solid-state imaging device 2 and the signal of the memory 4, and the addition result is stored in the same address of the memory 4. By this operation, the sensitivity of the dark part can be increased, and thus the dynamic range can be expanded. In this embodiment, since it is not necessary to read all the pixels after the second exposure, the problem that the photographing time becomes longer is eliminated.

[Eleventh Embodiment] FIG. 16 is a view showing an eleventh embodiment, in which the seventh embodiment and the ninth embodiment are combined. In this embodiment, after the first exposure, when reading out the signal of the pixel of the solid-state imaging device 2, the signal is controlled to pass through the adder 1, stored in the memory 4, and darkened by the comparator 3. Find the part. When the signal currently being compared is lower than the predetermined reference signal, the control signal generator 5 stores the address in the address memory 8. Thereafter, the shutter and the aperture 7 are adjusted to perform the second exposure. Then, based on the address stored in the address memory 8, the signal of the pixel at the same address of the solid-state imaging device 2 is read out again. This time, the adder 1 is controlled so as to add the signal of the solid-state imaging device 2 and the signal of the memory 4, and the addition result is stored in the same address of the memory 4. By this operation, the sensitivity of the dark part can be increased, and thus the dynamic range can be expanded. In the present embodiment, the signals of all the pixels of the solid-state imaging device 2 are stored in the memory 4 after the first exposure as compared with the tenth embodiment.
The shooting time can be shortened by the time stored in the camera.

[0023]

As described above, the present invention has the following effects.
is there. (1) Using a solid-state image sensor that can be accessed randomly,
If the signal read from the element is smaller than a predetermined reference signal
Signal from the same pixel again, and
By adding read signals, dynamic
Pixels that can expand the range and correspond to dark areas
You only need to re-read, so you can shorten the shooting time.
it can. (2) Random access to signal read from pixel
The memory read out from the pixel.
If the signal is smaller than the predetermined reference signal,
Read the signal with the larger amount of accumulated photocharge
Memory in the same location
Image can be enlarged and the pixel signal corresponding to the dark area
Since only the number needs to be rewritten, the shooting time is also reduced.
Can be (3) Random access is possible for signals read from pixels
The memory read out from the pixel.
If the signal is smaller than the predetermined reference signal,
Read out the signal and compare this signal with the signal stored in memory.
Add and store the added signal in memory again
Allows the dynamic range to be expanded and
Only the pixels corresponding to the part need to be read and rewritten
Therefore, the photographing time can be similarly reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a solid-state imaging device according to a first embodiment of the present invention.

FIG. 2 is a circuit diagram showing pixels of the solid-state imaging device of the embodiment of FIG.

FIG. 3 is a block diagram illustrating a configuration of a solid-state imaging device capable of performing random access.

FIG. 4 is a circuit diagram showing pixels forming an imaging region 11 of the solid-state imaging device of FIG. 3;

FIG. 5 is a circuit diagram showing a specific example of an adder of the solid-state imaging device of FIG. 2;

FIG. 6 is a block diagram showing a second embodiment of the present invention.

FIG. 7 is a block diagram showing a third embodiment of the present invention.

FIG. 8 is a block diagram showing a fourth embodiment of the present invention.

FIG. 9 is a circuit diagram showing pixels forming an imaging region 11 in the embodiment of FIG.

FIG. 10 is a block diagram showing a fifth embodiment of the present invention.

FIG. 11 is a block diagram showing a sixth embodiment of the present invention.

FIG. 12 is a block diagram showing a seventh embodiment of the present invention.

FIG. 13 is a block diagram showing an eighth embodiment of the present invention.

FIG. 14 is a block diagram showing a ninth embodiment of the present invention.

FIG. 15 is a block diagram showing a tenth embodiment of the present invention.

FIG. 16 is a block diagram showing an eleventh embodiment of the present invention.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 adder 2 solid-state imaging device 3 comparator 4 memory 5 control signal generator 7 shutter and aperture 8 address memory 11 imaging area 12 Y address line 13 output line 14 Y-direction decoder 15 X-direction decoder 16 X-direction selector D11 photodiode C11 Storage capacity

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-63-278474 (JP, A) JP-A-63-269688 (JP, A) JP-A-1-120182 (JP, A) JP-A-63-278 123282 (JP, A) JP-A-60-22879 (JP, A) JP-A-64-37177 (JP, A) JP-A-4-502688 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H04N 5/30-5/335

Claims (8)

(57) [Claims] A pixel including a photoelectric conversion unit is arranged in an X direction and a Y direction.
Are specified by specifying an imaging area arranged in multiple directions and an X address and a Y address.
Randomly accessible reading that reads signals from the pixels
Output means, in a solid-state imaging device provided with a solid-state imaging device including, an addition means for adding a plurality of signals from the pixel , a signal read from the pixel at a first timing,
A comparison with a predetermined reference signal is performed, and based on the result of the comparison.
The signal read at the first timing is
If the reference signal is smaller than the predetermined reference signal,
The signal is read out at the timing of 2, and
Thus, the signal read at the first timing and the second
Control to add signals read at the timing
A solid-state imaging device comprising: Wherein said adding means is a solid-state imaging device according to claim 1, characterized in that provided in the solid-state imaging device. 3. The solid-state imaging device according to claim 1 , wherein said adding means is provided for each of said pixels. 4. The solid-state imaging device according to claim 1, wherein the adding means is provided for each pixel column in the Y direction of the solid-state imaging device.
3. The solid-state imaging device according to item 1. 5. The solid-state imaging device according to claim 1, wherein the adding means is provided for each pixel column in the X direction of the solid-state imaging device.
3. The solid-state imaging device according to item 1. Wherein said addition means according to claim 1, characterized in that provided in the output circuit of the solid-state imaging device
The solid-state imaging device. 7. A pixel including a photoelectric conversion unit is arranged in an X direction and a Y direction.
Are specified by specifying an imaging area arranged in multiple directions and an X address and a Y address.
Randomly accessible reading that reads signals from the pixels
In the solid-state imaging device including a solid-state imaging device comprising: means out, a random action for storing the signal read from the pixel
Accessible memory and a signal read from the pixel at a first timing.
At the first timing.
The read signal is compared with a predetermined reference signal,
Read at the first timing according to the result of the comparison
If the signal obtained is smaller than the predetermined reference signal,
Again from the same pixel, the amount of accumulated photocharge at the second timing
Read out the enlarged signal and again at the same location in the memory
A solid-state imaging device comprising: a control unit configured to perform control so as to store the image data in a solid-state imaging device. 8. A pixel including a photoelectric conversion unit is arranged in an X direction and a Y direction.
Are specified by specifying an imaging area arranged in multiple directions and an X address and a Y address.
Randomly accessible reading that reads signals from the pixels
Solid-state imaging device having a solid-state imaging device including
In, adding means for adding a plurality of signals from the pixels, the random accession for storing a signal read from the pixel
Accessible memory and a signal read from the pixel at a first timing.
At the first timing.
The read signal is compared with a predetermined reference signal,
Read at the first timing according to the result of the comparison
If the signal obtained is smaller than the predetermined reference signal,
The signal is read again from the same pixel at the second timing,
In the adding means, the second data stored in the memory is stored.
The signal read at the timing of 1 and the second timing
Add the signals read out by the
Control means for controlling the data to be stored in the memory each time.
A solid-state imaging device.