JP3009979B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method of manufacturing a semiconductor device, and more particularly to a selective epitaxial growth technique of silicon, a structure of a MOSFET to which the present invention is applied, and a manufacturing method.

[0002]

2. Description of the Related Art Along with the miniaturization of LSIs, it is necessary to shorten the gate length of a MOSFET. However, a conventional LDD (Lightly Doped Drain) MOSFET has a problem that the junction between the source and drain regions and the semiconductor substrate is formed deeply, so that a single-channel effect occurs and the gate length cannot be shortened. . The LDD-MOSFET with the conventional structure has a shorter gate length by lowering the energy of ion implantation and lowering the temperature of the activation anneal or by performing a high-temperature rapid heat treatment to form a shallow junction depth. Many attempts have been made to realize transistors, but no fundamental solution has been reached.

[0003] Therefore, attention has been paid to a technique of forming a source and a drain region stacked above a channel region of a MOSFET to thereby form a junction substantially shallow. A MOSF having a structure having source and drain regions stacked above the channel region will be described below.
A conventional example of an ET (stacked diffusion layer type transistor) will be described.

As a conventional method of manufacturing a stacked diffusion layer type transistor, there is a manufacturing method as shown in FIGS. As shown in FIG. 16A, a semiconductor substrate 160 having a field oxide film 1602 formed in a predetermined region
Forming a gate electrode 1603 on top of FIG.
As shown in (b), the silicon film 1604 is selectively grown on the active region by epitaxial growth of silicon.
(For example, Japanese Unexamined Patent Publication (Kokai) No. 61-196577, "Semiconductor Device" NEC Corporation, Isami Sakai).

There is also a manufacturing method as shown in FIGS. 17 (a) to 17 (d).

As shown in FIG. 17A, a semiconductor substrate 170 having a field oxide film 1702 formed in a predetermined region is provided.
17 and a step of depositing a polycrystalline silicon film 1703 on the polycrystalline silicon film 1703 as shown in FIG.
After the oxide film 1704 is formed on the substrate 3, the oxide film 1704 and the polycrystalline silicon film 1703 in the region to be the channel region of the transistor are etched by RIE until the silicon substrate is exposed. As shown, the gate oxide film 1705 and the gate electrode 1706
Is formed. In addition, as a silicidation formation technique, a region to be a source / drain region is doped with an impurity by an ion implantation method, activated by a heat treatment, then sputtered with Ti, and the gate electrode and the source / drain region are self-aligned by RTA. Is commonly used (eg, M. Shimiz
u et al., Symposium on VLSI Technology Digest of
Tchnical Papers, p11 (1988)).

[0007]

In the conventional method of FIG. 16, since a very large amount of hydrogen is used in the selective silicon epitaxial growth apparatus, the method is large and the cost is very high. Further, with respect to such a stacked transistor structure formed by the device, due to the characteristics of the selective silicon epitaxial growth device, facets are formed in the epitaxially grown silicon near the gate electrode as shown in FIG. Occurs, and the thickness of the epitaxially grown silicon becomes thin. For the above reason, the source and drain regions formed by ion implantation become deep near the channel region, and are affected by the short channel effect, making it difficult to form a transistor with a fine gate length. Furthermore, the deposition temperature is high (900 ° C.
-1100 ° C.), thermal defects, etc., cause crystal defects near the gate electrode and near the field oxide film,
There is a problem that a leak current increases.

Further, in the conventional method of FIG. 17, in the step of etching the oxide film and the polycrystalline silicon film in the region to be the channel region of the transistor until the silicon substrate is exposed by RIE,
Since the silicon substrate is damaged, there is a problem that the transistor characteristics are deteriorated. In addition, since the gate electrode cannot be formed in a self-aligned manner with respect to the stacked source and drain regions, alignment is required.
The shape of the gate electrode is a T-shape, and there is a problem in that the gate electrode serves as a mask when impurity ions are implanted for forming the source and drain regions, and an asymmetrical offset depending on the alignment accuracy occurs.

Further, in the silicidation forming technique, since the impurity diffusion layer is formed before the silicidation reaction is performed (before depositing the Ti metal), it is difficult to control the silicidation reaction and the TiSi2 C54 crystal is formed. However, there is a problem that it cannot be formed stably and the resistance becomes high.

An object of the present invention is to solve the above problems.

[0011]

According to a first aspect of the present invention, there is provided a method of manufacturing a semiconductor device for depositing a silicon film on a semiconductor substrate, the method comprising using a single crystal silicon substrate as the semiconductor substrate and exposing it to the atmosphere. After exposing the surface of the single crystal silicon substrate without the above, the single crystal silicon film is epitaxially grown by an LPCVD method while inheriting the plane orientation of the surface of the single crystal silicon substrate in an active region where the surface of the single crystal silicon substrate is exposed. A method of manufacturing a semiconductor device, comprising depositing an amorphous silicon film in a region other than the active region.

According to a second aspect of the present invention, in the method of manufacturing a semiconductor device for depositing a silicon film on a semiconductor substrate, a single crystal silicon substrate is used as the semiconductor substrate.
After exposing the surface of the single-crystal silicon substrate without being exposed to the atmosphere, the single-crystal silicon film is transferred to the active region where the surface of the single-crystal silicon substrate is exposed by the LPCVD method by inheriting the plane orientation of the single-crystal silicon substrate. A method for manufacturing a semiconductor device, comprising epitaxially growing and depositing a polycrystalline silicon film in a region other than the active region.

According to a third aspect of the present invention, in the method of manufacturing a semiconductor device for depositing a silicon film on a semiconductor substrate, a single crystal silicon substrate is used as the semiconductor substrate.
After exposing the surface of the single-crystal silicon substrate without being exposed to the atmosphere, the single-crystal silicon film is transferred to the active region where the surface of the single-crystal silicon substrate is exposed by the LPCVD method by inheriting the plane orientation of the single-crystal silicon substrate. A method of manufacturing a semiconductor device, comprising: epitaxially growing, depositing an amorphous silicon film in a region other than the active region, and epitaxially growing the single crystal silicon film in a lateral direction until reaching the region other than the active region by heat treatment. It is.

According to a fourth aspect of the present invention, in the method of manufacturing a semiconductor device for depositing a silicon film on a semiconductor substrate, a single crystal silicon substrate is used as the semiconductor substrate.
After exposing the surface of the single-crystal silicon substrate without being exposed to the atmosphere, the single-crystal silicon film is transferred to the active region where the surface of the single-crystal silicon substrate is exposed by the LPCVD method by inheriting the plane orientation of the single-crystal silicon substrate. Manufacturing a semiconductor device, comprising: epitaxially growing, depositing a polycrystalline silicon film in a region other than the active region, and epitaxially growing the single crystal silicon film in a lateral direction to a region other than the active region by heat treatment. Is the way.

According to a fifth aspect of the present invention, in the method of manufacturing a semiconductor device according to the first, second, third, or fourth aspect, after growing the single crystal silicon film, A method for manufacturing a semiconductor device, characterized by selectively removing unnecessary amorphous silicon film or polycrystalline silicon film.

According to a sixth aspect of the present invention, there is provided a method for manufacturing a semiconductor device selected from the first, second, third, fourth and fifth aspects of the present invention. A method of manufacturing a semiconductor device, wherein the single crystal silicon film is epitaxially grown by repeating.

According to a seventh aspect of the present invention, there is provided a semiconductor device wherein a silicon surface of a source region and a drain region is formed above a surface of a single crystal silicon substrate immediately below a gate electrode of a MOS transistor. A semiconductor is characterized in that the region is a single-crystal silicon film formed by the method for manufacturing a semiconductor device according to any one of claims 1, 2, 3, 4, 5, and 6. Device.

According to the present invention, there is provided a semiconductor device in which a silicon surface of a source region and a drain region is formed above a surface of a single crystal silicon substrate immediately below a gate electrode of a MOS transistor. The region is a single-crystal silicon film formed by the method for manufacturing a semiconductor device according to claim 1, claim 2, claim 3, claim 4, claim 5, or claim 6; A semiconductor device comprising a refractory metal silicide film provided on the single crystal silicon film on a drain region.

According to a ninth aspect of the present invention, there is provided a method for forming an element isolation region and an active region on a single crystal silicon substrate,
A step of forming a gate insulating film and a gate electrode on the active region, and performing an etch-back after forming the insulating film;
A step of exposing at least a surface of the single crystal silicon substrate in a source region and a drain region of the active region and forming the insulating film on a side wall of the gate electrode; 7. A step of forming a single-crystal silicon film in the source region and the drain region by the method of manufacturing a semiconductor device according to claim 5, and forming the single-crystal silicon film in the source region and the drain region. And a step of implanting impurities of the opposite conductivity type and activating the impurities by heat treatment.

According to a tenth aspect of the present invention, there is provided a semiconductor device comprising: a step of forming an element isolation region and an active region on a single crystal silicon substrate; a step of forming a gate insulating film and a gate electrode on the active region; Forming an insulating film on a side wall of the gate electrode while exposing at least the surface of the single-crystal silicon substrate in the source region and the drain region of the active region after forming the film. Forming a single-crystal silicon film in the source region and the drain region by the method for manufacturing a semiconductor device according to claim 2, 3, 4, 5, or 6; Depositing a film, selectively forming a refractory metal silicide film on the single crystal silicon film by a salicide process, and forming the source region and the drain A method of manufacturing a semiconductor device which comprises a step of activating the impurities by injection to heat treatment of the single crystal silicon substrate and the opposite conductivity type impurity into range.

According to the present invention, there is provided a semiconductor device comprising: a step of forming an element isolation region and an active region on a single crystal silicon substrate; a step of forming a gate insulating film and a gate electrode on the active region; Forming an insulating film on a side wall of the gate electrode while exposing at least the surface of the single-crystal silicon substrate in the source region and the drain region of the active region after forming the film. Forming a single-crystal silicon film in the source region and the drain region by the method for manufacturing a semiconductor device according to claim 2, 3, 4, 5, or 6; Depositing a film;
Reacting the refractory metal film with the single-crystal silicon film by rapid heating to form a refractory metal silicide film; and ion-implanting a semiconductor substrate and impurities of the opposite conductivity type into the refractory metal silicide film. And a step of etching and removing the unreacted refractory metal film, and a step of changing the refractory metal silicide film into a stable crystal structure by a second rapid heating treatment. This is a method for manufacturing a semiconductor device.

The present invention according to claim 12 provides the present invention according to claim 9,
12. The method of manufacturing a semiconductor device according to claim 10, wherein the insulating film is formed in the order of an oxide film and a silicon nitride film.

The present invention described in claim 13 provides the present invention according to claim 9,
13. The method for manufacturing a semiconductor device according to claim 10, wherein the step of exposing at least a surface of the single crystal silicon substrate in a source region and a drain region of the active region and forming a single crystal silicon film And a step of recovering crystal defects by performing nitrogen annealing between the step and the step of performing the method.

The present invention described in claim 14 provides the present invention as defined in claim 9,
13. The method for manufacturing a semiconductor device according to claim 10, wherein the step of exposing at least a surface of the single crystal silicon substrate in a source region and a drain region of the active region and forming a single crystal silicon film Performing a sacrificial oxidation of the source region and the drain region, and etching and removing an oxide film formed by the sacrificial oxidation. .

The present invention described in claim 15 provides the present invention according to claim 1.
12. The method of manufacturing a semiconductor device according to claim 11, wherein the refractory metal film is made of Ti, Co, Ni, Zr,
V, Hf.

The present invention described in claim 16 is based on claim 1,
5. The method of manufacturing a semiconductor device according to claim 2, wherein the amorphous silicon film, the polycrystalline silicon film, and the epitaxially grown single crystal silicon are removed from a pretreatment for removing an oxide film on the surface of the single crystal silicon substrate. An apparatus for depositing a film is a cluster-type silicon film deposition apparatus, which is a method for manufacturing a semiconductor device, wherein the steps from the pretreatment to the silicon film deposition are performed in a nitrogen atmosphere without opening to the atmosphere.

[0027]

According to the present invention, epitaxial growth can be performed while inheriting the plane orientation of a silicon single crystal substrate, and source and drain regions stacked up from a channel region of a transistor can be formed easily and easily.

Further, according to the present invention, the short channel effect of the formed transistor can be suppressed.

Further, according to the present invention, since the source and drain regions can be formed at a low temperature, crystal defects are less likely to occur and a semiconductor device with less leak current can be obtained.

Further, according to the present invention, before the single crystal silicon film is epitaxially grown, annealing is performed in a nitrogen atmosphere or sacrificial oxidation is performed to recover crystal defects and damage generated in the manufacturing process. Can be performed reliably.

Further, according to the present invention, a single-crystal silicon film for forming source and drain regions stacked from a channel region of a transistor is formed in a plurality of steps, so that the transistor can be sufficiently grown in a lateral direction. As a result, a silicide process or the like can be easily performed.

[0032]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a method for manufacturing a semiconductor device according to the present invention will be described in detail with reference to embodiments.

First Embodiment FIGS. 1A to 1E are cross-sectional views in the order of steps of a first embodiment of the present invention. First, as shown in FIG. 1A, a field oxide film 10 is formed on a semiconductor substrate 101 by a known method.
2. A gate oxide film 103 and a gate electrode 105 whose upper portion is covered with an oxide film 104 are formed.

Next, as shown in FIG. 1B, an oxide film 106 (about 300 ° in this embodiment) is deposited by low pressure chemical vapor deposition (LPCVD).

Next, as shown in FIG. 1C, the oxide film 1 is exposed until the active region 107 of the semiconductor substrate 101 is exposed.
06 is etched back by the RIE apparatus. At this time, the etching is performed under the condition that the damage to the semiconductor substrate is small.

Next, as shown in FIG. 1D, in order to clean the surface of the active region 107 and recover from damage, an ashing process, a cleaning process, an ammonia / hydrogen process, and an HF process are sequentially performed. By the active area 1
07, a silicon film is deposited under conditions such that an amorphous silicon film 109 is deposited on the single crystal silicon film 108 epitaxially grown while inheriting the substrate plane orientation, and on the gate electrode 105 and the field oxide film 102 (the silicon To deposit the film, the LPCVD equipment
This is a cluster type apparatus, and performs from HF processing to silicon film deposition without opening to the atmosphere. The deposition temperature is in the range of 400 ° C. to 550 ° C.).

Next, as shown in FIG. 1E, the amorphous silicon film is selectively etched by a mixed solution of hydrofluoric acid, nitric acid, and acetic acid, and the single crystal silicon film 108 is selectively activated. Stack on the region (later source and drain regions). Then, in a known manner, the MOSFE
Form T.

In this embodiment, single-crystal silicon and amorphous silicon having higher etching selectivity are deposited. However, the present invention is not limited to this. Deposition temperature is 5
The temperature range is from 50 ° C. to 750 ° C., and an epitaxially grown single crystal silicon film 108
On the gate electrode 105 and the field oxide film 102,
A polycrystalline silicon film may be deposited. Note that when the unnecessary amorphous silicon film is selectively removed as described above, or when the unnecessary polycrystalline silicon film is selectively removed, etching in an etchant in a state where ultrasonic waves are applied has a higher removal efficiency. The same applies to the example.

In this embodiment, as shown in FIG. 1B, the oxide film 106 (about 300 ° in this embodiment) is deposited by low pressure chemical vapor deposition (LPCVD). However, the invention is not limited to an oxide film. Instead of the oxide film 106, a silicon nitride film may be used.

Second Embodiment FIGS. 2A to 2E are sectional views in the order of steps of a second embodiment of the present invention. First, as shown in FIG. 2A, a field oxide film 20 is formed on a semiconductor substrate 201 by a known method.
2. A gate oxide film 203 and a gate electrode 204 made of polycrystalline silicon are formed.

Next, as shown in FIG. 2B, an oxide film 205 (about 300 ° in this embodiment) is deposited by low pressure chemical vapor deposition (LPCVD).

Next, as shown in FIG. 2C, the oxide film 2 is removed until the active region 206 of the semiconductor substrate 201 is exposed.
05 is etched back by the RIE apparatus. At this time, the etching is performed under the condition that the damage to the semiconductor substrate is small.

Next, as shown in FIG. 2D, in order to clean and recover the damage of the surface of the active region 206, an ashing process, a cleaning process, an ammonia peroxide process, and an HF process are sequentially performed. The active area 2
A silicon film is deposited under conditions such that an amorphous silicon film 208 is deposited on the single crystal silicon film 207 epitaxially grown by inheriting the substrate plane orientation on the substrate 06, and on the gate electrode 204 and the field oxide film 202 (the silicon To deposit the film, the LPCVD equipment
This is a cluster type apparatus, and performs from HF processing to silicon film deposition without opening to the atmosphere. The deposition temperature is in the range of 400 ° C. to 550 ° C.).

Next, as shown in FIG. 2E, the amorphous silicon film is selectively etched by a mixed solution of hydrofluoric acid, nitric acid, and acetic acid, and the single crystal silicon film 207 is selectively activated. Stack on the region (later source and drain regions). At this time, the gate electrode surface is slightly etched as a result. After that, the MO
Form an SFET.

In this embodiment, single-crystal silicon and amorphous silicon having higher etching selectivity are deposited. However, the present invention is not limited to this. Deposition temperature is 5
The temperature range is from 50 ° C. to 750 ° C., and an epitaxially grown single crystal silicon film 207 is formed on the active region 206.
On the gate electrode 204 and the field oxide film 202,
A polycrystalline silicon film may be deposited.

In this embodiment, as shown in FIG. 2B, an oxide film 205 (about 300 ° in this embodiment) is deposited by low pressure chemical vapor deposition (LPCVD). However, the invention is not limited to an oxide film. Instead of the oxide film 205, a silicon nitride film may be used.

In this embodiment, since the polycrystalline silicon on the gate electrode surface is exposed and one of the gate electrode side wall oxide films is formed on the gate electrode side wall, the salicide M
In the case of forming an OSFET, a structure in which a gate electrode is silicided can be easily formed.

Third Embodiment FIGS. 3A to 3D are cross-sectional views in the order of steps of a third embodiment of the present invention. First, as shown in FIG. 3A, a field oxide film 302, a gate oxide film 303, an upper portion, and a side wall portion are covered with an oxide film 304 on a semiconductor substrate 301 through steps similar to those of the first embodiment. A gate electrode 305 is formed.

Next, as shown in FIG. 3B, in order to clean and recover the surface of the active region 306, an ashing process, a cleaning process, an ammonia / hydrogen process, and an HF process are sequentially performed. As a result, the active region 3
A silicon film is deposited under a condition such that an amorphous silicon film 308 is deposited on the single crystal silicon film 307 epitaxially grown by inheriting the substrate plane orientation on the gate electrode 306 and the field oxide film 302 (the silicon film described above). To deposit the film, the LPCVD equipment
This is a cluster type apparatus, and performs from HF processing to silicon film deposition without opening to the atmosphere. The deposition temperature is in the range of 400 ° C. to 550 ° C.).

Next, as shown in FIG. 3C, solid-phase epitaxial growth is performed by a heat treatment in a lateral direction (until it overlaps on the field oxide film or until it overlaps on the gate electrode). At this time, the amorphous silicon film 308 on the gate electrode 305 and the field oxide film 302 is transformed into a polycrystalline silicon film 309 (in this embodiment, the heat treatment is performed at 600 ° C. for 24 hours).

Next, as shown in FIG. 3D, the polycrystalline silicon film 309 is selectively etched by a mixed solution of hydrofluoric acid, nitric acid and acetic acid, and the single crystal silicon film 307 is selectively etched. On the active region (the later source and drain regions). Then, in a known manner, the MOSFE
Form T. In this embodiment, the heat treatment is performed at 600 ° C. for 24 hours, but the present invention is not limited to this condition.

In this embodiment, as shown in FIG. 3B, on the active region 306, a single-crystal silicon film 307, a gate electrode 305, and a field oxide film 302 are epitaxially grown while inheriting the substrate plane orientation. A silicon film is deposited under conditions such that an amorphous silicon film 308 is deposited, but a silicon film may be deposited on the field oxide film 302 under conditions such that a polycrystalline silicon film is deposited. . In this case, as shown in FIG. 3C, the heat treatment for performing the solid-phase epitaxial growth in the lateral direction (until the overlap on the field oxide film or the overlap on the gate electrode) is performed using amorphous silicon. It must be performed at a higher temperature than during the deposition. (For example, rapid heating treatment at 1100 ° C. in a nitrogen atmosphere for about 20 seconds) Fourth Embodiment FIGS. 4A to 4D are step-by-step cross-sectional views of a fourth embodiment of the present invention. . First, as shown in FIG. 4A, through a process similar to that of the second embodiment, a field oxide film 402, a gate oxide film 403, and a side wall portion covered with an oxide film 404 are formed on a semiconductor substrate 401. A gate electrode 405 made of crystalline silicon is formed.

Next, as shown in FIG. 4B, in order to clean the surface of the active region 406 and recover from damage, an ashing process, a cleaning process, an ammonia / hydrogen process, and an HF process are sequentially performed, and then the LPCVD apparatus is used. The active area 4
A silicon film is deposited under conditions such that an amorphous silicon film 408 is deposited on the single-crystal silicon film 407 epitaxially grown by inheriting the substrate plane orientation on the substrate 06, and on the gate electrode 405 and the field oxide film 402. To deposit the film, the LPCVD equipment
This is a cluster type apparatus, and performs from HF processing to silicon film deposition without opening to the atmosphere. The deposition temperature is in the range of 400 ° C. to 550 ° C.).

Next, until it overlaps on the oxide film or on the gate electrode.
Solid layer epitaxial growth is performed. At this time, the amorphous silicon film 408 on the gate electrode 405 and the field oxide film 402 is transformed into a polycrystalline silicon film 409. (In this embodiment, the heat treatment is performed at 600 ° C. for 24 hours.) Next, as shown in FIG.
The polycrystalline silicon film 409 is selectively etched with a mixed solution of nitric acid and acetic acid to form a single crystal silicon film 40.
7 is selectively stacked on the active region (the later source and drain regions). At this time, the gate electrode surface is slightly etched as a result. Then, in a known manner, the MOSFE
Form T. In this embodiment, the heat treatment is performed at 600 ° C. for 24 hours, but the present invention is not limited to this condition.

In this embodiment, as shown in FIG. 4B, on the active region 406, a single crystal silicon film 407, a gate electrode 405, and a field oxide film 402, which are epitaxially grown while inheriting the substrate plane orientation, are formed. A silicon film is deposited under conditions such that an amorphous silicon film 408 is deposited, but a silicon film may be deposited on the field oxide film 402 under conditions such that a polycrystalline silicon film is deposited. . In this case, as shown in FIG. 4C, the heat treatment for performing the solid layer epitaxial growth in the lateral direction (until the overlap on the field oxide film or the overlap on the gate electrode) is performed by using amorphous silicon. It must be performed at a higher temperature than during the deposition. (For example, at 1100 ° C. in a nitrogen atmosphere,
In this embodiment, the polycrystalline silicon on the surface of the gate electrode is exposed and the gate electrode side wall oxide film is formed on the gate electrode side wall. It is possible to easily form a structure in which silicidation is performed up to the gate electrode.

Fifth Embodiment FIGS. 5A to 5D are cross-sectional views in the order of steps in a fifth embodiment of the present invention. First, as shown in FIG. 5A, a field oxide film 502, a gate oxide film 503, an upper portion, and a side wall portion are covered with an oxide film 504 on a semiconductor substrate 501 through the same steps as in the first embodiment. A gate electrode 505 is formed.

Next, as shown in FIG. 5B, in order to clean the surface of the active region 506 and recover from damage, an ashing process, a cleaning process, an ammonia / hydrogen process, and an HF process are sequentially performed, and then the LPCVD apparatus is used. (In order to eliminate oxygen at the interface between the amorphous silicon film 507 and the semiconductor substrate 501 as much as possible, the LPCVD apparatus for depositing the amorphous silicon film 507 is a cluster type apparatus. HF treatment to silicon film deposition are performed without opening to the atmosphere, and the deposition temperature is 400 ° C. to 55 ° C.
In the range of 0 ° C).

Next, as shown in FIG. 5C, the substrate plane orientation is inherited on the active region 506 by heat treatment, and the amorphous silicon film 507 is formed on the single crystal silicon film 508 by solid layer epitaxial growth. At the same time, the solid epitaxial growth is performed laterally (until it overlaps on the field oxide film or on the gate electrode). At this time, the amorphous silicon film 507 on the gate electrode 505 and the field oxide film 502 is
Transforms to 9. (In this embodiment, the heat treatment is performed at 600 ° C. 24
Time has gone. Next, as shown in FIG.
The polycrystalline silicon film 509 is selectively etched with a mixed solution of hydrofluoric acid, nitric acid, and acetic acid, and the single crystal silicon film 508 is selectively stacked on the active region (the source and drain regions to be described later). After that, in a known manner, MOS
Form an FET. In this embodiment, the heat treatment is performed at 600 ° C.
The operation is performed for 4 hours, but is not limited to this condition.

In this embodiment, the amorphous silicon film 507 is deposited as shown in FIG. 5B, but a polycrystalline silicon film may be deposited. In this case, as shown in FIG. 5C, on the active region 506, the substrate plane orientation is inherited, and the polycrystalline silicon film is changed to a single crystal silicon film by solid layer epitaxial growth, and at the same time, solidified in the lateral direction. The heat treatment for the layer epitaxial growth needs to be performed at a higher temperature than when amorphous silicon is deposited. Sixth Embodiment FIGS. 6A to 6D are cross-sectional views in the order of steps of a sixth embodiment of the present invention. . First, as shown in FIG. 6A, through a process similar to that of the second embodiment, a field oxide film 602, a gate oxide film 603, and a multi-layered structure in which a sidewall portion is covered with an oxide film 604 on a semiconductor substrate 601. A gate electrode 605 made of crystalline silicon is formed.

Next, as shown in FIG. 6B, in order to clean and recover the surface of the active region 606, an ashing process, a cleaning process, an ammonia / hydrogen process, and an HF process are sequentially performed. (The LPCVD apparatus for depositing the amorphous silicon film 607 to eliminate oxygen at the interface between the amorphous silicon film 607 and the semiconductor substrate 601 as much as possible is a cluster type apparatus.) HF treatment to silicon film deposition are performed without opening to the atmosphere, and the deposition temperature is 400 ° C. to 55 ° C.
In the range of 0 ° C).

Next, as shown in FIG. 6C, the heat treatment allows the substrate plane orientation to be inherited on the active region 606, and the single-crystal silicon film 608 and the amorphous silicon film 607 are formed by solid-layer epitaxial growth. At the same time, the solid epitaxial growth is performed laterally (until it overlaps on the field oxide film or on the gate electrode). At this time, the amorphous silicon film 607 on the gate electrode 605 and the field oxide film 602 is
Transforms to 9. (In this embodiment, the heat treatment is performed at 600 ° C. 24
Time has gone. Next, as shown in FIG.
The polycrystalline silicon film 609 is selectively etched by a mixed solution of hydrofluoric acid, nitric acid, and acetic acid, and the single crystal silicon film 608 is selectively deposited on the active region (the source and drain regions to be described later). At this time, the gate electrode surface is slightly etched as a result. Then, in a well-known manner,
A MOSFET is formed. In this embodiment, the heat treatment is performed for 60 times.
It is performed at 0 ° C. for 24 hours, but is not limited to this condition.

In this embodiment, the amorphous silicon film 607 is deposited as shown in FIG. 6B, but a polycrystalline silicon film may be deposited. In this case, as shown in FIG. 6 (c), the substrate plane orientation is inherited on the active region 606, and solid-phase epitaxial growth is performed.
The heat treatment for changing the polycrystalline silicon film into a single crystal silicon film and simultaneously performing the solid epitaxial growth in the lateral direction needs to be performed at a higher temperature than when amorphous silicon is deposited. (For example, rapid heat treatment at 1100 ° C. in a nitrogen atmosphere for about 20 seconds) In this embodiment, polycrystalline silicon on the surface of the gate electrode is exposed and an oxide film is formed on the side wall of the gate electrode. Therefore, Salicide M
In the case of forming an OSFET, a structure in which a gate electrode is silicided can be easily formed.

Seventh Embodiment FIGS. 7A to 7D are cross-sectional views in the order of steps in a seventh embodiment of the present invention. First, as shown in FIG. 7A, a field oxide film 702, a gate oxide film 703, an upper portion, and a side wall portion are covered with an oxide film 704 on a semiconductor substrate 701 through a process similar to that of the first embodiment. A gate electrode 705 is formed.

Next, as shown in FIG. 7B, in the method of the third or fifth embodiment, on the active region 706, up to the field oxide film epitaxially grown while inheriting the substrate plane orientation. A single crystal silicon film 707 that overlaps or overlaps the gate electrode
Then, a polycrystalline silicon film 708 is formed on the gate electrode 705 and the field oxide film 702.

Next, as shown in FIG. 7C, the single-crystal silicon film 707 is epitaxially grown on the single-crystal silicon film 707 by inheriting the plane orientation of the single-crystal silicon film by the method of the first embodiment. 709, a silicon film is deposited on the polycrystalline silicon film 708 under conditions such that an amorphous silicon film 710 is deposited (in this embodiment, a single crystal silicon film and an amorphous silicon film are deposited. The single crystal silicon film 707 is not limited to this.
A polycrystalline silicon film may be deposited on the epitaxially grown single crystal silicon film, and on the polycrystalline silicon film 708).

Next, as shown in FIG. 7D, the amorphous silicon film 710 and the polycrystalline silicon film 708 are selectively etched by a mixed solution of hydrofluoric acid, nitric acid, and acetic acid, and Crystalline silicon films 709 and 707
Is selectively stacked on the active region (the later source and drain regions). Thereafter, a MOSFET is formed by a known method.

Eighth Embodiment FIGS. 8A to 8D are cross-sectional views in the order of steps in an eighth embodiment of the present invention. First, as shown in FIG. 8A, through a process similar to that of the second embodiment, a field oxide film 802, a gate oxide film 803, and a multi-layered structure in which a sidewall portion is covered with an oxide film 804 on a semiconductor substrate 801. A gate electrode 805 made of crystalline silicon is formed.

Next, as shown in FIG. 8B, in the method of the fourth or sixth embodiment, on the active region 806, up to the field oxide film epitaxially grown while inheriting the substrate plane orientation. A single crystal silicon film 807 that overlaps or overlaps the gate electrode
A polycrystalline silicon film 808 is formed on the gate electrode 805 and the field oxide film 802.

Next, as shown in FIG. 8C, the single-crystal silicon film 807 is epitaxially grown by inheriting the plane orientation of the single-crystal silicon film on the single-crystal silicon film 807 by the method of the second embodiment. 809, a silicon film is deposited on the polycrystalline silicon film 808 under conditions such that an amorphous silicon film 810 is deposited (in this embodiment, a single crystal silicon film and an amorphous silicon film are deposited. The single crystal silicon film 807 is not limited to this.
A polycrystalline silicon film may be deposited on the single-crystal silicon film epitaxially grown, and on the polycrystalline silicon film 808).

Next, as shown in FIG. 8D, the amorphous silicon film 810 and the polycrystalline silicon film 808 are selectively etched by a mixed solution of hydrofluoric acid, nitric acid and acetic acid, Crystalline silicon films 809 and 807
Is selectively stacked on the active region (the later source and drain regions). At this time, the gate electrode surface is slightly etched as a result. Then, in a well-known manner, MOSFET
To form

In this embodiment, since the polycrystalline silicon on the surface of the gate electrode is exposed and the gate electrode side wall oxide film is formed on the gate electrode side wall, the salicide M
In the case of forming an OSFET, a structure in which a gate electrode is silicided can be easily formed.

Ninth Embodiment FIGS. 9A to 9D are sectional views in the order of steps of a ninth embodiment of the present invention. First, as shown in FIG. 9A, a field oxide film 902, a gate oxide film 903, an upper portion, and a side wall portion are covered with an oxide film 904 on a semiconductor substrate 901 through the same steps as in the first embodiment. A gate electrode 905 is formed.

Next, as shown in FIG. 9B, in the method of the third or fifth embodiment, on the active region 906, up to the field oxide film epitaxially grown while inheriting the substrate plane orientation. A single-crystal silicon film 907 that overlaps or overlaps the gate electrode
A polycrystalline silicon film 908 is formed on the gate electrode 905 and the field oxide film 902.

Next, as shown in FIG. 9C, the third or fifth embodiment employs the vertical orientation of the single crystal silicon film 907 by inheriting the plane orientation of the single crystal silicon film. direction,
In addition, a polycrystalline silicon film 910 is formed on the single crystal silicon film 909 and the polycrystalline silicon film 908 which are epitaxially grown in the lateral direction.

Next, as shown in FIG. 9D, the polycrystalline silicon films 910 and 908 are selectively etched by a mixed solution of hydrofluoric acid, nitric acid and acetic acid, and the single crystal silicon films 909 and 907 are etched. Select the active region (after source,
On the drain region). Then, in a well-known manner,
A MOSFET is formed.

Tenth Embodiment FIGS. 10A to 10D are cross-sectional views in the order of steps of a tenth embodiment of the present invention. First, as shown in FIG.
Through the same steps as in the second embodiment, the semiconductor substrate 1001
Field oxide film 1002, gate oxide film 100
3. A gate electrode 1005 made of polycrystalline silicon whose side wall is covered with the oxide film 1004 is formed.

Next, as shown in FIG. 10B, in the method of the fourth or sixth embodiment, on the active region 1006,
The single-crystal silicon film 100 epitaxially grown while inheriting the substrate plane orientation, overlapping on the field oxide film, or overlapping on the gate electrode
7, the gate electrode 1005 and the field oxide film 100
2, a polycrystalline silicon film 1008 is formed.

Next, as shown in FIG. 10C, the single-crystal silicon film 1007 is formed by the method of the fourth or sixth embodiment.
A polycrystalline silicon film 1010 is formed on the single crystal silicon film 1009 which has been epitaxially grown in the vertical and horizontal directions while inheriting the plane orientation of the single crystal silicon film, and on the polycrystalline silicon film 1008.

Next, as shown in FIG. 10D, the polycrystalline silicon films 1010 and 1008 are selectively etched by a mixed solution of hydrofluoric acid, nitric acid and acetic acid, and the single crystal silicon films 1009 and 1007 are etched. Is selectively stacked on the active region (the later source and drain regions). At this time, the gate electrode surface is slightly etched as a result. After that,
A MOSFET is formed by a known method.

In this embodiment, since polycrystalline silicon on the surface of the gate electrode is exposed and one of the gate electrode side wall oxide films is formed on the gate electrode side wall, the silicide M
In the case of forming an OSFET, a structure in which a gate electrode is silicided can be easily formed.

Eleventh Embodiment In the first to tenth embodiments, etch back is performed to form an oxide film on the side wall of the gate electrode. In this embodiment, however, the semiconductor substrate after the etch back is An embodiment for removing damage will be described.

First, in order to form an oxide film on the side wall of the gate electrode, after performing an etch back, an ashing process, a cleaning process, and an ammonia peroxide process are performed.

Next, annealing is performed in a nitrogen atmosphere. (In this example, the process was performed at 850 ° C. for 60 minutes.)
By the annealing treatment, the crystallinity of the damaged active region surface can be recovered.

Then, according to the first to tenth embodiments,
A single-crystal silicon film is selectively deposited on the active region (source and drain regions later).

Twelfth Embodiment In the first to tenth embodiments, etch back is performed to form an oxide film on the side wall of the gate electrode. In this embodiment, however, the semiconductor substrate after the etch back is etched. An embodiment for removing damage will be described.

First, in order to form an oxide film on the side wall of the gate electrode, after performing an etch back, an ashing process, a cleaning process, and an ammonia peroxide process are performed.

Next, sacrificial oxidation of about 100 ° is performed to change the damaged layer on the surface of the active region into an oxide film.

Next, the oxide film is removed by etching, and thereafter, according to the first to tenth embodiments, a single-crystal silicon film is selectively deposited on the active region (the later source and drain regions).

Thirteenth Embodiment FIGS. 11A to 11D are cross-sectional views in the order of steps in a thirteenth embodiment of the present invention. First, as shown in FIG.
By a well-known method, a field oxide film 1102, a gate oxide film 1103, and an oxide film 11
A gate electrode 1105 covered with 04 is formed.

Next, as shown in FIG. 11B, an oxide film 1106 is formed by low pressure chemical vapor deposition (LPCVD).
(Approximately 100 ° in this embodiment), the silicon nitride film 110
7 (about 200 ° in this embodiment) are sequentially deposited.

Next, as shown in FIG. 11C, the gate electrode 1105 and the active region 11 of the semiconductor substrate 1101 are formed.
After etching back the silicon nitride film 1107 until the oxide film 1106 on the gate electrode 08 is exposed, the gate electrode 1
Using the silicon nitride film 1107 remaining on the side wall of the mask 105 as a mask, the oxide film 1106 is removed by etching with an HF-based solution until the active region 1108 of the semiconductor substrate 1101 is exposed. At this time, the silicon nitride film 1107 is formed under the condition that the damage to the semiconductor substrate is small.
Perform etch back. Next, the surface of the active region 1108 damaged by the RIE is sacrificed by about 100 ° to oxidize the damaged layer of the active region 1108 to the oxide film 11.
09.

Next, as shown in FIG. 11D, the oxide film 1109 is removed by etching, and the first or third oxide film 1109 is removed.
Alternatively, the single crystal silicon film 1110 is selectively stacked on the active region (the later source and drain regions) by the method of the fifth, seventh, or ninth embodiment.
Thereafter, a MOSFET is formed by a known method.

In this embodiment, since the silicon nitride film is formed on the side wall of the gate electrode, there is an advantage that a bird's beak is not formed on the gate oxide film even when the sacrificial oxidation is performed.

The surface of the active region 1108 is directly RIE
Since the semiconductor substrate is not exposed to the semiconductor substrate, there is an advantage that damage to the semiconductor substrate is small.

Fourteenth Embodiment FIGS. 12A to 12D are cross-sectional views in the order of steps in a fourteenth embodiment of the present invention. First, as shown in FIG.
By a well-known method, a field oxide film 1202, a gate oxide film 1203, and an oxide film 12
Then, a gate electrode 1205 covered with 04 is formed.

Next, as shown in FIG. 12B, an oxide film 1206 is formed by low pressure chemical vapor deposition (LPCVD).
(Approximately 100 ° in this embodiment), the silicon nitride film 120
7 (about 200 ° in this embodiment) are sequentially deposited.

Next, as shown in FIG. 12C, the gate electrode 1205 and the active region 12 of the semiconductor substrate 1201 are formed.
After etching back the silicon nitride film 1207 until the oxide film 1206 on the gate electrode 08 is exposed, the gate electrode 1
Using the silicon nitride film 1207 remaining on the side walls of the mask 205 as a mask, the oxide film 1206 is etched away using a HF-based solution until the active region 1208 of the semiconductor substrate 1201 is exposed. At this time, the silicon nitride film 1207 is formed under the condition that the damage to the semiconductor substrate is small.
Perform etch back. Next, the surface of the active region 1208 damaged by the RIE is sacrificed by about 100 ° to oxidize the damaged layer of the active region 1208 by the oxide film 12.
09.

Next, as shown in FIG. 12D, the oxide film 1209 is removed by etching, and the second or fourth oxide film 1209 is removed.
Alternatively, according to the method of the sixth, eighth, or tenth embodiment, after the single-crystal silicon film 1210 is selectively deposited on the active region (the later source and drain regions), the oxidation on the gate electrode is performed. The film 1204 is removed by etching with a solution based on HF using the silicon nitride film 1207 as a mask. After that, the MOSF
Form ET.

In this embodiment, since the silicon nitride film is formed on the side wall of the gate electrode, there is an advantage that a bird's beak is not formed on the gate oxide film even if the sacrificial oxidation is performed.

The surface of the active region 1208 is directly RIE
Since the semiconductor substrate is not exposed to the semiconductor substrate, there is an advantage that damage to the semiconductor substrate is small.

In this embodiment, since the polycrystalline silicon on the surface of the gate electrode is exposed and one of the gate electrode side wall oxide films is formed on the gate electrode side wall, the gate electrode is not formed when the salicide MOSFET is formed. Thus, it is possible to easily form a silicified structure.

The first, third, or fifth
Alternatively, also in the method of the seventh or ninth embodiment, the gate electrode side wall oxide film is changed to a silicon nitride film to expose the polycrystalline silicon on the gate electrode surface as in the present embodiment. It becomes possible.

Fifteenth Embodiment FIGS. 13A to 13D are cross-sectional views in the order of steps in a fifteenth embodiment of the present invention. First, as shown in FIG.
A field oxide film 1302, a gate oxide film 1303, and a gate electrode 1304 made of polycrystalline silicon are formed on a semiconductor substrate 1301 by a known method.

Next, as shown in FIG. 13B, an oxide film 1305 is formed by low pressure chemical vapor deposition (LPCVD).
(Approximately 100 ° in this embodiment), the silicon nitride film 130
6 (approximately 200 ° in this embodiment).

Next, as shown in FIG. 13C, the gate electrode 1304 and the active region 13 of the semiconductor substrate 1301 are formed.
After etching back the silicon nitride film 1306 until the oxide film 1305 on the semiconductor device 07 is exposed, the gate electrode 1
Using the silicon nitride film 1306 remaining on the side walls of 304 as a mask, the oxide film 1305 is etched away using a HF-based solution until the active region 1307 of the semiconductor substrate 1301 is exposed. At this time, the silicon nitride film 1306 is formed under the condition that the damage to the semiconductor substrate is small.
Perform etch back. Next, the surface of the active region 1307 damaged by the RIE is sacrificed by about 100 ° to oxidize the damaged layer of the active region 1307 by the oxide film 13.
08. At this time, as a result, an oxide film 1309 is formed also on the gate electrode.

Next, as shown in FIG. 13D, the oxide films 1308 and 1309 are removed by etching, and the method according to the second, fourth, sixth, eighth, or tenth embodiment is performed. As a result, the single crystal silicon film 1310
Is selectively stacked on the active region (the later source and drain regions). Thereafter, a MOSFET is formed by a known method.

In this embodiment, since the silicon nitride film is formed on the side wall of the gate electrode, there is an advantage that a bird's beak is not formed on the gate oxide film even if the sacrificial oxidation is performed.

In this embodiment, since the polycrystalline silicon on the surface of the gate electrode is exposed, and one of the gate electrode side wall oxide films is formed on the side wall of the gate electrode, the gate electrode is not formed when the salicide MOSFET is formed. Thus, it is possible to easily form a silicified structure.

Sixteenth Embodiment FIGS. 14A to 14D are sectional views in the order of steps of a sixteenth embodiment of the present invention. First, as shown in FIG.
On a semiconductor substrate 1401, a field oxide film 1402, a gate oxide film 1403, and an oxide film 1404 are formed on the upper and side walls.
After forming a gate electrode 1405 (in this embodiment, a gate electrode having a two-layer structure of a tungsten silicide film and a polycrystalline silicon film) covered with a first, third, fifth, seventh or seventh or The method of the ninth or thirteenth embodiment, or the method of the first or third embodiment
Alternatively, by combining the fifth, seventh, or ninth embodiment with the eleventh or twelfth embodiment, a single-crystal silicon film is selectively formed on the active region 1406 (subsequent source and drain regions). 1407 are stacked (in this embodiment, a single crystal silicon film of about 800 ° is stacked). In this embodiment, an oxide film is formed on the side wall of the gate electrode. However, a silicon nitride film or a two-layer film of an oxide film and a silicon nitride film may be used instead of the oxide film.

Next, as shown in FIG. 14B, a titanium metal film 1408 is deposited. (In this embodiment, 400
About Å is deposited. Next, as shown in FIG. 14 (c), a first rapid heating process is performed in a nitrogen atmosphere at 600 ° C.
C. for about 20 to 30 seconds at a temperature of about 650.degree. C. to about 650.degree.
After reacting 407 to form a titanium silicide film 1409 of about 700 to 800 °, impurity ions of a conductivity type opposite to that of the semiconductor substrate are implanted.

Next, as shown in FIG. 14D, the titanium metal 1408, the titanium nitride film formed on the surface of the titanium silicide film 1409, and the titanium metal film 14
08 is selectively removed by etching with a sulfuric acid-based solution, and then a second rapid heat treatment is performed to change the titanium silicide film into a stable TiSi2c54 structure and activate the ion-implanted impurities. , Source and drain regions 1410 are formed.

In this embodiment, the second rapid heat treatment is performed under a nitrogen atmosphere at 1000 ° C. for about 20 seconds. However, when a reflow step of the interlayer insulating film by heat treatment at 850 ° C. or more is performed later, The activation of the ion-implanted impurities can be performed by the heat treatment at 850 ° C. or higher.
The second rapid heat treatment may be performed at a lower temperature (about 850 ° C. to 950 ° C.).

The silicidation of the present invention is not limited to titanium silicide. Instead of depositing the titanium metal film, Co, Ni, Zr, V, and Hf metals may be deposited.

Seventeenth Embodiment FIGS. 15A to 15D are sectional views of a seventeenth embodiment of the present invention in the order of steps. First, as shown in FIG.
After forming a field oxide film 1502, a gate oxide film 1503, and a gate electrode 1505 made of polycrystalline silicon whose side walls are covered with an oxide film 1504 on a semiconductor substrate 1501, a second, fourth, sixth, or Eighth, tenth, or fourteenth, or first
In the method of the fifth embodiment, or in the second or fourth embodiment,
Alternatively, by combining the sixth, eighth, or tenth embodiment with the eleventh or twelfth embodiment, single-crystal silicon is selectively formed on the active region 1506 (subsequent source and drain regions). The films 1507 are stacked (in this embodiment, a single crystal silicon film of about 800 ° is stacked). In this embodiment, on the side wall of the gate electrode,
Although an oxide film is formed, a silicon nitride film or a two-layer structure film of an oxide film and a silicon nitride film may be used instead of the oxide film.

Next, as shown in FIG. 15B, a titanium metal film 1508 is deposited. (In this embodiment, 400
About Å is deposited. Next, as shown in FIG. 15C, a first rapid heating process is performed under a nitrogen atmosphere at 600 ° C.
At about 650 ° C. to about 650 ° C. for about 20 seconds to about 30 seconds.
507 and the gate electrode 15 made of polycrystalline silicon
After forming a titanium silicide film 1509 with a thickness of about 700 to 800 °, impurity ions of a conductivity type opposite to that of the semiconductor substrate are implanted.

Next, as shown in FIG. 15D, the titanium metal 1508 and the titanium nitride film formed on the surface of the titanium silicide film 1509 and the titanium metal film 15
08 is selectively removed by etching with a sulfuric acid-based solution, and then a second rapid heat treatment is performed to change the titanium silicide film into a stable TiSi2c54 structure and activate the ion-implanted impurities. , Source and drain regions 1510 are formed.

In this embodiment, the second rapid heat treatment is performed under a nitrogen atmosphere at 1000 ° C. for about 20 seconds. However, when a reflow step of the interlayer insulating film by heat treatment at 850 ° C. or more is performed later, Activation of the ion-implanted impurities can be performed by the heat treatment at 850 ° C. or higher.
The second rapid heat treatment may be performed at a lower temperature (about 850 ° C. to 950 ° C.).

The silicidation of the present invention is not limited to titanium silicide. Instead of depositing the titanium metal film, Co, Ni, Zr, V, and Hf metals may be deposited. The transistors of the embodiments described herein are all
An epitaxial silicon layer of about 1000 ° is formed in the source and drain regions. Therefore, the junction depth from the channel region of the transistor is 100
Å, which makes it possible to form a very shallow junction. For this reason, the transistor is very effective against the single-channel effect of the transistor. In the conventional LDD transistor, the effect of the single-channel effect was remarkably exhibited at a gate width of 0.4 μm. It has been confirmed that there is no influence of the single channel effect up to a gate width of 0.1 μm.

Further, in the cluster type LPCVD apparatus for depositing a silicon film in this embodiment, after removing the natural oxide film on the silicon substrate surface by vapor-phase hydrofluoric acid treatment or hydrofluoric acid solution treatment, there is no open air. In a nitrogen atmosphere, it can be transported to a drying room equipped with preliminary exhaust equipment,
After completely removing H ₂ O molecules adsorbed on the surface of the semiconductor substrate in the drying chamber with purified nitrogen, it is possible to transport the silicon film to the deposition chamber in a nitrogen atmosphere without opening to the atmosphere and deposit a silicon film. ing. Therefore, unlike a conventional LPCVD silicon deposition system, there is no natural oxide film or adsorbed H2O molecules on the semiconductor wafer surface before deposition, and it is possible to epitaxially grow a silicon film on the silicon substrate surface under normal silicon deposition conditions. It has become.

Here, it is very important not only to remove the natural oxide film but also to remove the adsorbed H2O molecules with purified nitrogen. When a silicon film is deposited in a silicon deposition chamber with H2O molecules adsorbed on the semiconductor wafer surface, the adsorbed H2
O molecules react with the silicon substrate at the deposition temperature to form a silicon oxide film, so that silicon epitaxial growth becomes impossible. In this embodiment, the dew point of the drying chamber is -1.
It is kept below 00 ° C.

With the above cluster type LPCVD apparatus, for example, (500
(C, Si2H6, 50 Pa), an epitaxially grown silicon film can be deposited on the active region, and an amorphous silicon film can be deposited on the region other than the active region. The conditions for depositing polycrystalline silicon are (620 ° C., Si
(H4, 30 Pa), an epitaxially grown silicon film can be deposited on the active region, and a polycrystalline silicon film can be deposited on the region other than the active region.

[0122]

As is apparent from the above, according to the present invention, in the step of forming a silicon film on a semiconductor substrate, only the region where the silicon substrate surface is exposed inherits the plane orientation of the underlying silicon substrate. And
In other regions, amorphous silicon or polycrystalline silicon is formed, and the amorphous silicon or polycrystalline silicon is selectively etched to form source and drain regions stacked up from a channel region of the transistor, In the silicidation step, impurity ions are implanted after the silicidation reaction is performed. Therefore, unlike the conventional example of FIG. 16, a selective silicon epitaxial growth apparatus is not required, and the cost is not increased. In addition, as shown in FIG. 16B, epitaxial growth can be performed in the horizontal and vertical directions in the vicinity of the gate electrode, so that facet does not occur in the epitaxially grown silicon and the silicon is formed by ion implantation. The source and drain regions do not become deep in the vicinity of the channel region and are less susceptible to the short channel effect, which facilitates formation of a transistor having a fine gate length.

Further, since deposition can be performed at a low temperature, crystal defects do not occur near the gate electrode and near the field oxide film, and there is no increase in leak current.

In the conventional method shown in FIG. 17, in the step of etching the oxide film and the polycrystalline silicon film in the region to be the channel region of the transistor until the silicon substrate is exposed by RIE,
Since the silicon substrate in the channel region is damaged, the transistor characteristics are deteriorated, and the gate electrode cannot be formed in a self-aligned manner with the stacked source and drain regions. The gate electrode has a T-shape, and the gate electrode serves as a mask at the time of impurity ion implantation for forming the source and drain regions. Is formed first, and then the stacked source and drain regions are formed, so that a fundamental solution can be achieved.

Further, since the impurity diffusion layer region can be formed after the silicide layer is formed, the influence of impurity ions on silicidation on the impurity diffusion layer region is eliminated, and a complete TiSi2 C54 crystal structure can be formed. An extremely low-resistance silicide layer can be formed.

[Brief description of the drawings]

FIG. 1 is a diagram showing a manufacturing process cross section of a semiconductor device according to a first example of the present invention.

FIG. 2 is a diagram showing a manufacturing process cross section of a semiconductor device according to a second embodiment of the present invention.

FIG. 3 is a diagram showing a cross section of a manufacturing process of a semiconductor device according to a third embodiment of the present invention.

FIG. 4 is a diagram showing a manufacturing process cross section of a semiconductor device according to a fourth embodiment of the present invention.

FIG. 5 is a diagram showing a cross section of a manufacturing step of a semiconductor device according to a fifth embodiment of the present invention.

FIG. 6 is a view showing a cross section of a manufacturing step of a semiconductor device according to a sixth embodiment of the present invention.

FIG. 7 is a view showing a cross section of a manufacturing step of a semiconductor device according to a seventh embodiment of the present invention.

FIG. 8 is a diagram showing a cross section of a manufacturing step of a semiconductor device according to an eighth embodiment of the present invention.

FIG. 9 is a view showing a cross section of a manufacturing step of a semiconductor device according to a ninth embodiment of the present invention.

FIG. 10 is a diagram illustrating a cross section of a manufacturing step of a semiconductor device according to a tenth embodiment of the present invention;

FIG. 11 is a diagram showing a cross section of a semiconductor device according to a thirteenth embodiment of the present invention in the manufacturing process.

FIG. 12 is a diagram showing a cross section of a semiconductor device according to a fourteenth embodiment of the present invention in the manufacturing process.

FIG. 13 is a view showing a cross section of a manufacturing step of a semiconductor device according to a fifteenth embodiment of the present invention;

FIG. 14 is a diagram showing a cross section of a semiconductor device according to a sixteenth embodiment of the present invention in the manufacturing process.

FIG. 15 is a diagram showing a cross section of a manufacturing step of a semiconductor device according to a seventeenth embodiment of the present invention.

FIG. 16 is a diagram illustrating a cross section of a manufacturing process of a semiconductor device according to a conventional technique.

FIG. 17 is a diagram showing a cross section of a manufacturing step of a semiconductor device according to another conventional technique.

[Explanation of symbols]

101, 201, 301, 401, 501, 601, 7
01, 801, 901, 1001, 1101, 120
1, 1301, 1401, 1501, 1601, 170
1: Semiconductor substrate 102, 202, 302, 402, 502, 602, 7
02, 802, 902, 1002, 1102, 120
2, 1302, 1402, 1502, 1602, 170
2: Field oxide film 103, 203, 303, 403, 503, 603, 7
03, 803, 903, 1003, 1103, 120
3, 1303, 1403, 1503, 1705: Gate oxide films 104, 106, 205, 304, 404, 504, 6
04, 704, 804, 904, 1004, 1104,
1106, 1109, 1204, 1206, 1209,
1305, 1308, 1309, 1404, 1504,
1704: oxide film 105, 204, 305, 405, 505, 605, 7
05, 805, 905, 1005, 1105, 120
5, 1304, 1405, 1505, 1603, 170
6: Gate electrodes 107, 206, 306, 406, 506, 606, 7
06, 806, 906, 1006, 1108, 120
8, 1307, 1406, 1506: Active areas 108, 207, 307, 407, 508, 608, 7
07, 709, 807, 809, 907, 909, 10
07, 1009, 1110, 1210, 1310, 14
07, 1507: Single crystal silicon film 109, 208, 308, 408, 507, 607, 7
10, 810: amorphous silicon film 309, 409, 509, 609, 708, 808, 9
08, 910, 1008, 1010, 1703: polycrystalline silicon film 1107, 1207, 1306: silicon nitride film 1408, 1508: titanium metal film 1409, 1509, 1707: titanium silicide film 1410, 1510, 1708: source, drain region 1604 : Silicon epitaxial growth layer

Continuation of front page (56) References JP-A-2-106922 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 21/205 H01L 21/336 H01L 29/78

Claims (16)

(57) [Claims] 1. A method for manufacturing a semiconductor device, comprising depositing a silicon film on a semiconductor substrate, comprising: using a single-crystal silicon substrate as the semiconductor substrate, exposing the surface of the single-crystal silicon substrate without exposing the surface to LPCVD; A single-crystal silicon film is epitaxially grown by inheriting the plane orientation of the single-crystal silicon substrate surface in the active region where the single-crystal silicon substrate surface is exposed by the method,
A method for manufacturing a semiconductor device, comprising depositing an amorphous silicon film in a region other than the active region. 2. A method of manufacturing a semiconductor device in which a silicon film is deposited on a semiconductor substrate, wherein a single crystal silicon substrate is used as the semiconductor substrate, and LPCVD is performed after exposing the surface of the single crystal silicon substrate without exposing it to the air. A single-crystal silicon film is epitaxially grown by inheriting the plane orientation of the single-crystal silicon substrate in an active region where the surface of the single-crystal silicon substrate is exposed, and a polycrystalline silicon film is deposited in a region other than the active region. A method for manufacturing a semiconductor device, comprising: 3. A method of manufacturing a semiconductor device, wherein a silicon film is deposited on a semiconductor substrate, wherein a single crystal silicon substrate is used as the semiconductor substrate, and the surface of the single crystal silicon substrate is exposed without being exposed to the atmosphere, and LPCVD is performed. A single crystal silicon film is epitaxially grown by inheriting the plane orientation of the single crystal silicon substrate in an active region where the surface of the single crystal silicon substrate is exposed by a method, and an amorphous silicon film is deposited in a region other than the active region, A method for manufacturing a semiconductor device, comprising: epitaxially growing the single-crystal silicon film in a lateral direction to a region other than the active region by heat treatment. 4. A method of manufacturing a semiconductor device for depositing a silicon film on a semiconductor substrate, comprising: using a single crystal silicon substrate as the semiconductor substrate, exposing the surface of the single crystal silicon substrate without exposing the surface to LPCVD, A single crystal silicon film is epitaxially grown by inheriting the plane orientation of the single crystal silicon substrate in an active region where the surface of the single crystal silicon substrate is exposed, and a polycrystalline silicon film is deposited in a region other than the active region. A method of manufacturing a semiconductor device, comprising: epitaxially growing the single crystal silicon film in a lateral direction to a region other than the active region by heat treatment. 5. The method for manufacturing a semiconductor device according to claim 1, wherein the unnecessary amorphous silicon film or the polycrystalline silicon is grown after growing the single crystal silicon film. A method for manufacturing a semiconductor device, comprising selectively removing a silicon film. 6. The method of manufacturing a semiconductor device according to claim 1, 2, 3, 4, or 5, wherein the method is repeated a plurality of times. A method for manufacturing a semiconductor device, comprising epitaxially growing a film. 7. A semiconductor device in which a silicon surface of a source region and a drain region is formed above a surface of a single crystal silicon substrate immediately below a gate electrode of a MOS transistor, wherein the source region and the drain region are formed.
7. A semiconductor device comprising a single crystal silicon film formed by the method for manufacturing a semiconductor device according to claim 2, claim 3, claim 4, claim 5, or claim 6. 8. A semiconductor device in which a silicon surface of a source region and a drain region is formed above a surface of a single crystal silicon substrate immediately below a gate electrode of a MOS transistor, wherein the source region and the drain region are formed.
A single crystal silicon film formed by the method for manufacturing a semiconductor device according to claim 2, 3, 4, 5, or 6, wherein the single crystal silicon film is formed on at least a source region and a drain region. A semiconductor device comprising a refractory metal silicide film provided on a crystalline silicon film. 9. A step of forming an element isolation region and an active region on a single crystal silicon substrate, a step of forming a gate insulating film and a gate electrode on the active region, and performing an etch-back after forming the insulating film. A step of exposing at least a surface of the single crystal silicon substrate in a source region and a drain region of the active region and forming the insulating film on a side wall of the gate electrode;
7. A step of forming a single-crystal silicon film in the source region and the drain region by the method of manufacturing a semiconductor device according to claim 4, and forming the single-crystal silicon film in the source region and the drain region. Implanting impurities of the opposite conductivity type to the silicon substrate and activating the impurities by heat treatment. 10. A step of forming an element isolation region and an active region on a single crystal silicon substrate; a step of forming a gate insulating film and a gate electrode on the active region; A step of exposing at least a surface of the single crystal silicon substrate in a source region and a drain region of the active region and forming the insulating film on a side wall of the gate electrode; 7. A step of forming a single-crystal silicon film in the source region and the drain region by the method of manufacturing a semiconductor device according to claim 4, 5, a step of depositing a refractory metal film, and a step of salicide. Forming a refractory metal silicide film selectively on the single crystal silicon film by the step; and forming the single crystal silicon base on the source region and the drain region. Implanting impurities of the opposite conductivity type to the plate and activating the impurities by heat treatment. 11. A step of forming an element isolation region and an active region on a single crystal silicon substrate; a step of forming a gate insulating film and a gate electrode on the active region; A step of exposing at least a surface of the single crystal silicon substrate in a source region and a drain region of the active region and forming the insulating film on a side wall of the gate electrode; A step of forming a single-crystal silicon film in the source region and the drain region by the method of manufacturing a semiconductor device according to claim 4, a step of depositing a refractory metal film, (1) a step of reacting the refractory metal film with the single crystal silicon film by a rapid heating treatment to form a refractory metal silicide film; Implanting a type impurity into the refractory metal silicide film, etching and removing the unreacted refractory metal film, and performing a second rapid heating process to form the refractory metal silicide film into a stable crystal structure. A method of manufacturing a semiconductor device. 12. The method for manufacturing a semiconductor device according to claim 9, wherein the insulating film is formed in the order of an oxide film and a silicon nitride film. Manufacturing method. 13. The method of claim 9, claim 10, claim 11,
13. The method for manufacturing a semiconductor device according to claim 12, wherein nitrogen annealing is performed between a step of exposing at least the source and drain regions of the active region and the surface of the single crystal silicon substrate and a step of forming a single crystal silicon film. Performing a step of recovering crystal defects. 14. The method of claim 9, claim 10, claim 11,
13. The method of manufacturing a semiconductor device according to claim 12, wherein the step of exposing at least a surface of the single crystal silicon substrate in a source region and a drain region of the active region and a step of forming a single crystal silicon film. A method of manufacturing a semiconductor device, comprising: a step of performing sacrificial oxidation of a region and a drain region; and a step of etching away an oxide film formed by the sacrificial oxidation. 15. The method for manufacturing a semiconductor device according to claim 10, wherein the high melting point metal film is
i. Co, Ni, Zr, V, Hf. 16. The method of manufacturing a semiconductor device according to claim 1, wherein the amorphous silicon film is removed from a pre-treatment for removing an oxide film on the surface of the single crystal silicon substrate. An apparatus for depositing a crystalline silicon film and an epitaxially grown single crystal silicon film is a cluster type silicon film deposition apparatus, wherein the pretreatment to the silicon film deposition are performed in a nitrogen atmosphere without opening to the atmosphere. Manufacturing method.