JP3004787B2 - Data transfer method for IC card - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data transfer method for an IC card, and more particularly to a data transfer method for avoiding data batting on a single I / O line.

[0002]

2. Description of the Related Art As a new information storage medium, an IC card is becoming widespread. Data is written to and read from this IC card by a dedicated reader / writer device. Since the IC card has a convenient shape for carrying, the number of external connection terminals for making an electrical connection with the reader / writer device is limited. Through the I / O line. That is, the same I / O line is used when data is transferred from the reader / writer device to the IC card, and conversely, when data is transferred from the IC card to the reader / writer device. Therefore, if the two-way data transfer is performed simultaneously, a situation in which data collide with each other on a single I / O line, that is, data batting occurs. When such data batting occurs, normal data transfer is hindered, which is not preferable.

Conventionally, in order to avoid such data batting, when data is transferred from an IC card to a reader / writer device, an I / O line is set for a predetermined time CWT (Character Waiting Time). )
Only to confirm that the data transfer from the reader / writer device has been completed, and then perform the data transfer.

[0004]

However, the conventional data transfer method for an IC card has a problem that the transfer time is slow. That is, in order to transfer data from the IC card, the time CWT (usually several mW) is required.
It is necessary to monitor the I / O line only for about (sec), so that the data transfer process cannot be performed quickly.

Accordingly, an object of the present invention is to provide a data transfer method in an IC card which can realize a quick data transfer process while avoiding occurrence of data batting.

[0006]

According to the present invention, there is provided a method for transferring data between an IC card and a reader / writer device through a single I / O line, wherein the data to be transferred is a bit having a first attribute. Alternatively, the bit of the second attribute is transferred in the form of digital data selected every predetermined period t, and when data is not transferred, the voltage level of the I / O line is changed to the first bit corresponding to the bit of the first attribute. The bit pattern of the data provided from the reader / writer device to the IC card is maintained at the voltage level and the bit of the first attribute is n times or more (n
≧ 2) Restrict to only bit patterns that are not continuous,
When outputting the response data to the data transferred from the reader / writer device, the IC card monitors the I / O line and sets the voltage level to the first voltage level and T> t
Only when it is confirmed that the time T satisfying (n-1) is maintained, the response data is output to the reader / writer device.

[0007]

[Operation] When the bit of the first attribute is "1" and the bit of the second attribute is "0", digital data is transferred in which "1" or "0" is continuous at every cycle t. I
The / O line is maintained at the voltage level corresponding to "1" when data is not transferred. The bit pattern of the data transferred from the reader / writer device to the IC card is
For example, the bit pattern is limited to a bit pattern in which “1” does not continue two or more times. Therefore, when data transfer is being performed from the reader / writer device to the IC card, the voltage level of the I / O line exceeds "1" over the period t.
Is not maintained at the voltage level corresponding to. Therefore, by monitoring the voltage level of the I / O line and confirming that the voltage level corresponding to "1" has been maintained beyond the period t, it is determined that data transfer from the reader / writer device has not been performed. Can be recognized. By such a method, by judging the presence or absence of data transfer from the reader / writer device, the presence or absence of occurrence of data batting can be quickly judged.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the illustrated embodiments. Now, for example, consider a case where a predetermined command A is transferred from the reader / writer device R / W to an IC card through an I / O line. Normally, a command from the reader / writer device R / W requests a response from the IC card. Therefore, the IC card performs predetermined internal processing based on the command A, and performs a task of transferring the response A as response data to the command A to the reader / writer device R / W. Similarly, a predetermined command B from the reader / writer device R / W is
When the data is transferred to the C card, the response B is sent to the reader / writer R / W as response data corresponding to the command B.
Transferred to

Generally, a reader / writer device R / W has a structure shown in FIG.
As shown in (a), when the first command A is given to the IC card, it is confirmed that the response A to the first command A has returned, and then the second command B is given to the IC card. However, depending on the command,
As shown in (b), after the command A is transferred, an operation of transferring the next command B may be performed without waiting for the response A to the command A. In such a case,
If the response A is transferred from the IC card without monitoring the I / O line, data batting occurs in the period P shown in FIG. In particular, in the case of a command used in the inspection mode for an IC card, an operation is performed such that the command is continuously transferred without waiting for a response from the IC card. Therefore, conventionally, as described above, the I / O line is monitored for a predetermined time CWT, and after confirming that the data transfer from the reader / writer device R / W is not performed, the response A is transferred from the IC card. Was performed.

The present invention proposes a new method capable of reducing the monitoring time of an I / O line. Now, as an example, an IC card and a reader / writer R / W
Is represented by a first attribute bit “1” and a second attribute bit “0”, and when the first attribute bit “1” is transferred, I When the voltage level of the / O line is set to “H” (for example, 5 V) and bit “0” of the second attribute is transferred, I / O
It is assumed that the voltage level of the line is “L” (for example, 0 V). In addition, when data is not transferred, the I / O line is fixed at the voltage level “H” during non-transfer.

Normally, there is no restriction on the bit pattern of data transferred between the reader / writer device R / W and the IC card. For example, the bit pattern of 1-byte data is from “00000000” to “1111111”.
There are 256 combinations up to "1". A feature of the present invention is that the bit pattern of the command data transferred from the reader / writer device R / W to the IC card is limited to only the bit pattern in which the bit of the first attribute is not repeated n times or more (n ≧ 2). It is in. For example, when n = 2, the bit pattern is limited to a bit pattern in which the bit “1” does not continue two or more times. Examples of such a bit pattern are shown in FIGS. The example shown here shows the bit patterns of “AA”, “54”, and “12” in hexadecimal notation, respectively. In each case, the bit pattern starts with the start bit ST (always at the “L” level) and ends with the stop bit SP (always at the “H” level), and the bit “1” is never repeated more than twice. Absent. That is, in the present invention, only codes such as "AA", "54", and "12" are defined as command codes given to the IC card from the reader / writer device R / W. So, for example,
The code of "9A" as shown in FIG. 2D (in the bit pattern, there is a portion where bit "1" is repeated twice) cannot be used as a command code. When such restrictions are imposed, the number of codes that can be used as command codes becomes smaller than 256, but a sufficient number of command codes can be ensured in practical use. In particular, there is no problem at all if the present invention is applied only under a specific condition of an inspection mode for an IC card.

By imposing such restrictions on the command data from the reader / writer device R / W, whether or not the command data has been transferred from the reader / writer device R / W can be determined in an extremely short time. You can judge. Now, as shown in FIG. 2A, if the bit period is t,
If the reader / writer device R / W is transferring command data, the time during which the I / O line is at the "H" level will never exceed the period t. Since the bit “1” does not continue more than once,
The time when the I / O line is at the "H" level is a maximum of t. Therefore, the I / O line is monitored, and if the "H" level is maintained for more than the time t, it can be determined that no command data has been transferred from the reader / writer device R / W. This is the principle of the present invention. Therefore, when the command A is transferred from the reader / writer device R / W and the response A corresponding to the command A is ready, the I / O line is monitored first, and the "H" level is set at the time t.
After confirming that the response A is maintained, the response A may be transferred. Since the cycle t is generally on the order of several μsec, it is possible to make a determination in a very short time.

FIG. 3 is a flowchart showing a procedure of a transfer process on the IC card side using the data transfer method according to the present invention. First, in step S1, the reader / writer device R
The command transferred from the / W side is input, and in a succeeding step S2, a predetermined process defined in advance for the command is performed. As a result of the command processing, a response corresponding to the command can be generated. Subsequently, after executing a batting check subroutine described later in step S3, the generated response is stored in step S3.
In step 4, the data is output to the reader / writer device R / W.

FIG. 4 shows a subroutine of the batting check in step S3. First, in step S5, it is determined whether the set time T has elapsed. The set time T can be theoretically set to any time as long as the time is longer than the bit period t. However, if the set time T is too close to the bit period t, erroneous detection due to the fluctuation of the bit period will occur. On the other hand, if the value is too large, it takes a long time for the batting check. Therefore, for example, it is preferable to set T to about 1.5t. If the set time T has not elapsed in step S5, the I / O line is monitored in step S6. If the voltage level of the I / O line is "H", the process returns to step S5. Thus,
When the set time T has elapsed while the state where the voltage level of the I / O line is "H" is maintained, this subroutine is terminated, and the response output of step S4 is executed.
However, if the voltage level of the I / O line becomes “L” before the set time T elapses, it is considered that data transfer is being performed from the reader / writer device R / W side. Therefore, when a response is output, data batting occurs, so that the process jumps from step S6 to the batting prevention routine.

As described above, the present invention has been described based on one embodiment shown in the drawings. However, the present invention is not limited to this embodiment, but can be implemented in various other modes.
For example, the command data bit pattern constraint is:
Any condition can be used as long as the bit pattern is such that the bit of the first attribute is not repeated n times or more (n ≧ 2). In the above-described embodiment, the case where n = 2 has been described. However, n can be set to 3 or more. When n = 3, the bit pattern may be a bit pattern in which the bit “1” does not continue three or more times, so that the restriction is slightly relaxed. However, the set time T for monitoring the I / O line needs to satisfy the condition of T> t (n-1), and therefore needs to be slightly longer than n = 2. Further, in the above-described embodiment, when data is not transferred, I
Although the voltage level of the / O line is set to “H” (corresponding to bit “1”), it is also possible to set it to “L” (corresponding to bit “0”). In this case, a bit pattern in which the bit “0” is not continuous n or more times is used.

[0016]

As described above, according to the data transfer method for an IC card according to the present invention, the bit pattern of the data transferred from the reader / writer device to the IC card is restricted, and the I / O line is set based on the restriction. , It is possible to realize a quick data transfer process while avoiding occurrence of data batting.

[Brief description of the drawings]

FIG. 1 is a diagram showing the occurrence of data batting between an IC card and a reader / writer device.

FIG. 2 is a diagram showing an example of a data bit pattern used in the data transfer method according to the present invention.

FIG. 3 is a flowchart showing a procedure of a transfer process on the IC card side using the data transfer method according to the present invention.

FIG. 4 is a flowchart showing a subroutine of a batting check in step S3 in the flowchart of FIG. 3;

[Explanation of symbols]

 P: Data batting period SP: Stop bit ST: Start bit t: Bit period of transfer data T: Setting time for monitoring R / W: Reader / writer device

Continuation of the front page (56) References JP-A-5-110571 (JP, A) JP-A-56-172048 (JP, U) Kazunobu Murata, "Basic Knowledge of Data Communication", Interface, CQ Publisher, Heisei February 1, 3rd, Vol. 17, No. 2, p. 124-146 (58) Fields investigated (Int.Cl. ⁷ , DB name) G06F 13/12 G06K 17/00 H04L 12/28 H04L 12/40 H04L 13/18 H04L 29/00-29/12

Claims (1)

(57) [Claims] 1. A method of transferring data between an IC card and a reader / writer device through a single I / O line, wherein data to be transferred is a bit of a first attribute or a bit of a second attribute. Is transferred in the form of digital data selected every predetermined period t. When data is not transferred, the voltage level of the I / O line is maintained at the first voltage level corresponding to the bit of the first attribute, The bit pattern of the data given from the reader / writer device to the IC card is such that the bit of the first attribute is n times or more (n ≧
2) Limit to only bit patterns that are not continuous, and when the IC card outputs response data to the data transferred from the reader / writer device, monitor the I / O line and When the voltage level of the line is the first
Output of the response data to the reader / writer device only when it is confirmed that the voltage level of T is maintained for a time T satisfying T> t (n-1). A data transfer method in an IC card, characterized in that: