JP2998454B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a metal wiring.

[0002]

2. Description of the Related Art At present, in most semiconductor devices from ICs to VLSIs, Al-Si and Al-S are used as wiring materials in view of ohmic characteristics and Al spike control.
i-Cu alloys and the like are widely used. However, with these wiring materials, the formation of hillocks and the occurrence of migration due to heat treatment are inevitable, and there is a serious problem in terms of reliability. The method was taken. However, that is not enough, and recently, Au has been used as a wiring material. Au is extremely stable as a wiring material and has a migration resistance of one of Al alloys.
There is an advantage that the number is 0 times or more and the reliability is extremely high.
However, even with the Au wiring, as with the Al wiring, the number of layers is increasing in recent years as the degree of integration is becoming higher and higher, and accordingly, how to secure flatness has become a problem. Currently A
In the u wiring, flattening by a coating film used for the Al wiring is mainly used.

A conventional method for forming a wiring will be described below with reference to FIG. FIG. 2 is a vertical sectional view showing a conventional technique for the present invention in the order of steps.

As shown in FIG. 2A, an insulating film 12 is formed on a semiconductor substrate 11 on which a diffusion layer 13 has been formed. The insulating film 12 is made of an oxide film by chemical vapor deposition or the like.
Grow about 0 nm. Next, an opening is formed in a predetermined region of the insulating film 12 to form a contact hole for forming an electrode wiring.
After that, the first and second metal films 14 and 15 are sequentially deposited by the sputtering method. The first metal film 14 secures adhesion to the insulating film 12, and is made of, for example, Ti, TiW, Cr, or the like.
The second metal film 15 is used to ensure barrier properties, plating properties, and the like, and is made of Ni, Cu, Pt, Au, Pd, or the like, and each having a thickness of about 30 to 100 nm is sufficient. A single layer may be used as long as the above conditions are satisfied. The first and second metal films 14 and 15 serve as power supply layers during electrolytic plating.

Next, as shown in FIG. 2B, a predetermined area is opened by using a photosensitive resin 20.

Subsequently, as shown in FIG. 2C, a metal electrode 18 and a metal wiring 18 of Au are formed in a predetermined area by electroplating to a thickness of about 0.5 to 2.0 μm.

Then, as shown in FIG. 2D, after the photosensitive resin 20 is removed, the first and second metal films 1 are formed by reactive ion etching using the metal electrode and the metal wiring 18 as a mask.
4 and 15 are sequentially removed. First and second metal films 14, 15
The removal may be performed by wet etching or dry etching.
The etchant or gas system can be selected according to the type of each metal film. Next, as shown in FIG. 2E, the first interlayer insulating film 21, the coating film 22, the second interlayer insulating film 23 and the like are appropriately combined to form an interlayer film. First,
For the second interlayer insulating films 21 and 23, oxide-based or nitride-based insulating films are used, and 200 to 500 by chemical vapor deposition or the like.
It is formed on the order of nm. As the coating film 22, a silica-based coating film, silicon polyimide, or the like is generally used. By coating several times and performing etch-back, more flatness is ensured. Conventionally, it was formed by the above method.

[0008]

This conventional manufacturing method has the disadvantage that the flatness is extremely poor, and it becomes more difficult to secure the flatness as the number of layers increases, resulting in a short circuit between the upper wirings. There is also a method of securing flatness by using a large amount of a coating insulating film, but this method is not sufficient, and has a disadvantage that cracks or swelling between layers occur in the coating film.

For the above reasons, the reliability and the yield have been remarkably reduced in the conventional manufacturing method.

Further, the conventional manufacturing method has a disadvantage that the manufacturing process is long and complicated due to the addition of a process for ensuring flatness.

An object of the present invention is to manufacture a semiconductor device in which a metal electrode and a metal wiring are formed, a step due to the thickness of the electrode and the wiring is almost eliminated, flattening is remarkably improved, and a high yield is stably obtained. It is to provide a method.

[0012]

According to a method of manufacturing a semiconductor device of the present invention, an electric insulating film for covering a conductive layer provided in or on a semiconductor substrate and an electric insulating film provided on the electric insulating film are provided.
Forming at least one layer of metal film on the entire surface of the semiconductor substrate including the first opening, forming a second insulating film on the metal film on the entire surface, in the second insulating film, future metal electrodes Forming a second opening selectively in a predetermined region where a metal wiring is to be formed , exposing the metal film in the second opening, and only a side wall of the second opening. Forming a second film having an insulating or conductive property, forming a metal electrode and a metal wiring in the predetermined region, and forming a second film only on a side wall of the second opening. removing the second film, thereby exposing the metal layer, removing the metal film described above exposes the metal electrodes, metal wires and the first insulating film as a mask, the third on the entire surface of the semiconductor substrate It is configured to include a step of forming an insulating film as a feature Ru.

[0013]

Next, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a longitudinal sectional view of a semiconductor device shown in the order of steps for explaining one embodiment of the present invention.

First, as shown in FIG.
An insulating film 12 is formed on the semiconductor substrate 11 on which 3 is formed. As the insulating film 12, a silicon oxide film or the like is grown to a thickness of about 200 to 500 nm by a chemical vapor deposition method or the like.
Next, an opening is formed in a predetermined region of the insulating film 12 to serve as a contact hole for securing electrical connection with the diffusion layer 13 by an electrode wiring.

Next, as shown in FIG. 1B, the first and second metal films 14 are formed on the entire surface of the semiconductor substrate 11 including the contact holes.
15 are sequentially formed. The first metal film 14 is made of a metal having good adhesion to the insulating film 12, for example, Ti, TiW, Cr or the like, and the second metal film 15 is made of a metal having a barrier property and good plating properties, for example, Cu, Pt, Pd. , Ni, Au, and the like. The first and second metal films 14 and 15 each have a thickness of 30 to 10
About 0 nm is sufficient. If the above conditions are satisfied, the first and second metal films 14 and 15 may be a single layer.
After that, the insulating film 16 is formed in a thickness of about 0.5 to 1.5 μm. In this embodiment, the silicon nitride film is formed in a thickness of 0.5-1.
It is formed to be about 5 μm.

Thereafter, as shown in FIG. 1C, an opening is selectively formed in the insulating film 16 using a photosensitive resin or the like, and a second metal film 15 is formed in a region where a metal electrode and a metal wiring are to be provided. Expose. Next, an insulating or conductive film 17 is formed on the entire surface including the exposed second metal film 15 to a thickness of 100 to 200 nm.
Degree formed. Thereafter, an etch back is performed to perform the insulating film 1.
The film 17 is left only on the side wall of the opening formed in FIG. Membrane 1
Numeral 7 serves as a mask for forming a metal electrode and a metal wiring to be formed later. The insulating film 16 and the metal electrode and metal wiring to be formed later and the first metal film 14 or the second metal film are selected at the time of etching removal. It is necessary to have the property. In this embodiment, a Ti metal film, which is a conductive film, is formed as the film 17. If the above condition is satisfied, an insulating film may be used. However, since the insulating film is also formed on a side wall of a contact hole for forming an electrical connection from the diffusion layer 13, a metal film having conductivity is preferable. T as the film 17
When an i metal film is used, a reactive ion etch is used for etch back, and an etch rate of 20 to 150 nm / m is selected by selecting a CF ₄ -based gas or an Ar + SF ₆ -based gas.
in is obtained. After that, the first and second metal films 14 and 15
Is used as a power supply layer, and a metal electrode and a metal wiring 18 made of Au are formed in a predetermined region by an electrolytic plating method. The film thickness is 0.5
It may be about 1.0 μm. The electrolytic plating solution of Au is provided by several companies such as Tanaka Kikinzoku Kogyo, Kanigen, Japan Mining, etc., and can be selected according to the purpose. Thus, the structure shown in FIG. 1D is obtained. Then, FIG.
As shown in (1), the Ti metal film 17 is removed, and the first and second metal films 14 and 15 are exposed. Hydrofluoric acid and hydroperoxide are effective for removing the Ti metal film. An etch rate of 600 to 700 nm / min can be obtained with 1% hydrofluoric acid.

Next, as shown in FIG. 1F, the exposed first and second metal films 14, 15 are sequentially removed using the insulating film 16, the metal electrode or the metal wiring as a mask. For the removal, a reactive ion etching method is used, and as an etching gas, Ar, O ₂ , Ne, SF ₆ , C ₂ Cl ₂ F ₄ or the like may be combined and selected depending on the type of metal.
After that, the interlayer insulating film 19 is
It is formed to about 1.0 μm. At this time, the gaps around the metal electrode and the metal wiring 18 are all equally spaced and can be easily buried. As the interlayer insulating film 19, a silicon oxide film, a silicon nitride film or the like can be considered.

The embodiments of the present invention have been described above.
The composition and type of the insulating film 16, the insulating or conductive film 17, and the first and second metal films 14 and 15 can be changed, and the flatness can be improved by using a coating film as the interlayer insulating film 19. Dramatically improved. As the coating film, there are silica type, silicon polyimide and the like, which can be selected according to the purpose.

[0019]

As described above, according to the present invention, all the gaps around the metal electrode and the metal wiring are equally spaced,
It can be completely buried by a chemical vapor deposition method or a coating film, and a step caused by a metal electrode metal wiring can be almost eliminated, so that the flatness is remarkably improved.

By leaving the metal film used as the power supply layer during electrolytic plating as a part of the interlayer film, the effect of strengthening the interlayer film and improving heat dissipation can be obtained.

Further, there is an effect that the steps required for securing the flatness in the conventional manufacturing method become unnecessary, and the steps can be shortened.

In the conventional manufacturing method, since the step is large,
The upper and lower layers are frequently short-circuited, and the wiring TEG
In the above, the yield varied from about 20 to 50%, but according to the manufacturing method of the present invention, a stable yield of about 50 to 70% can be secured.

[Brief description of the drawings]

FIG. 1 is a longitudinal sectional view of a semiconductor device shown in the order of steps for explaining one embodiment of the present invention.

FIG. 2 is a longitudinal sectional view of a semiconductor element shown in a process order for describing an example of a conventional method for manufacturing a semiconductor device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 11 Semiconductor substrate 12 Insulating film 13 Diffusion layer 14 1st metal film 15 2nd metal film 16 Insulating film 17 Insulating or conductive film 18 Au electrode and Au wiring 19 Insulating film 20 Photosensitive resin 21 Insulating film 22 Coating film 23 Insulating film

Claims (5)

(57) [Claims] At least one metal film is formed on an entire surface of a semiconductor substrate including an electrical insulating film covering a conductive layer provided in or on a semiconductor substrate and a first opening provided in the electrical insulating film. Forming a second insulating film over the entire surface of the metal film; and selectively forming a second insulating film on a predetermined region where a metal electrode and a metal wiring will be formed in the future .
And forming a second opening step of exposing the metal layer within the second opening, forming a second film having an insulating or conductive only on the sidewalls of the second opening and forming a metal electrode and the metal wiring in the predetermined region, the second
Removing the second film formed only on the sidewalls of the second opening, thereby exposing the <br/> metal film and the exposed the metal electrode and the metal wiring and the first insulation film as a mask the A method for manufacturing a semiconductor device, comprising: a step of removing a metal film; and a step of forming a third insulating film over the entire surface of the semiconductor substrate . 2. A method according to claim 1, wherein the forming by the metal electrodes and conductive metal wires Kaime Tsu key method. 3. A pre-Symbol third insulating film, a silicon oxide film,
2. The method according to claim 1, wherein the method is a silicon nitride film or a silicon polyimide . 4. A manufacturing method of a semiconductor device before Symbol claim 1, wherein the second layer is characterized in that it is a titanium film. 5. The material of said metal electrode and metal wiring is Au
And the said metal layer is selected TiW, from among Ti 1
2. The method according to claim 1, wherein the semiconductor device is a two-layer metal film including one metal film and one metal film selected from Pt, Pd, and Au.