JP2986648B2 - Power supply - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply for a device (such as a portable personal computer) that can be operated not only with an AC power supply but also with a battery.

[0002] Devices that include an AC adapter and a primary battery or a secondary battery (hereinafter referred to as a main battery) and operate on the main battery when the AC adapter is not used have become widespread. And in such a device,
When the main battery is replaced, it is impossible to resume the operation of the device with the main battery.
Normal operation could only be resumed using the C adapter.

[0003]

2. Description of the Related Art FIG. 10 shows a configuration of a conventional power supply device.
In FIG. 10, reference numeral 100 denotes a power supply device.

Reference numeral 101 denotes a battery, which serves as a power supply for the apparatus. 102 is a semiconductor switch,
It is turned on or off under the control of the microcomputer, and the battery 1
01 and the DD converter 105 are connected and disconnected.

[0005] An AC adapter 103 rectifies a commercial AC power supply and uses it as a DC power supply (6 V, 9 V, etc.). Reference numeral 104 denotes a diode for preventing current from flowing backward from the battery 101 to the AC adapter 103.

Reference numeral 104 'denotes a diode for preventing current from flowing backward from the AC adapter 103 to the battery 101. A DD converter 105 converts the voltage of the battery 101 or the AC adapter 103 into an operating voltage (3 V, 5 V, etc.) of a circuit (an internal circuit such as system logic) 108.

[0007] Reference numeral 106 denotes a high withstand voltage port for inputting a control signal of the microcomputer 107 to the gate of the semiconductor switch 102. High breakdown voltage port is P channel MOSF
ET, low impedance at H input and L
Is output. It is brought into a high impedance state by L input.

A microcomputer 107 controls the power supply. Reference numeral 108 denotes a system logic circuit, which is an internal circuit of a computer or the like. Reference numeral 110 denotes voltage monitoring means provided in the microcomputer 107 to monitor the voltage of the battery 101.

The operation of the configuration shown in FIG. 10 will be described. When using the AC adapter 103 as a power supply,
7 turns off the semiconductor switch 102. The D / D converter 105 converts an output of the AC adapter 103 into an operation voltage of the system logic circuit 108 and supplies the operation voltage to the system logic circuit 108 and the microcomputer 107.

When using the battery 101, the microcomputer 107 turns on the semiconductor switch 102. As a result, the output voltage of the battery 101 is
05 is input. The D-D converter 105 converts the output voltage of the battery 101 into an operation voltage of the system logic circuit 108 and supplies the operation voltage to the system logic circuit 108 and the microcomputer 107.

In the microcomputer 107, the voltage monitoring means 110 monitors the voltage of the battery 101, and when the remaining battery power becomes low, the microcomputer 107 turns off the semiconductor switch 102 to prevent the battery 101 from being over-discharged. In the overdischarge prevention mode, the microcomputer 107 enters a low power consumption operation state and supplies a voltage only to a circuit such as a memory that requires a voltage backup by a backup battery (not shown).

[0012]

In the conventional power supply device, when the battery 101 is replaced or the battery 101 runs out of power, a backup battery is required to store data in a memory or the like. Only the voltage is supplied, and the discharge path of the battery 101 is completely disconnected. Therefore, even if the battery is replaced with a normal one, the microcomputer 107 cannot operate immediately.
Connecting the AC adapter 103 allows the microcomputer 10
The normal operation of the apparatus could be resumed only after the operation of Example 7 was resumed.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a power supply device capable of restarting after battery replacement or the like even from a battery.

[0014]

FIG. 1 shows the basic configuration of the present invention. In FIG. 1 , reference numeral 1 denotes a main battery, which is a power supply for a main circuit (such as a system logic circuit) 14 and a main control unit 7.

Reference numeral 2 denotes a connection switch, which connects and disconnects the main battery 1 and the voltage converter 3.
Reference numeral 3 denotes a voltage converter, which converts the voltage of the main battery 1 and the AC adapter 11 into the operating voltage of the main circuit 14 and the like.

Reference numeral 4 denotes a switch control unit which controls on / off of the connection switch unit 2. A main control unit (microcomputer) 7 controls the power supply.

A reset unit 8 resets the main control unit 7. Reference numeral 9 denotes a switch, such as a power switch. Reference numeral 10 denotes a backup battery, which supplies a voltage to a circuit such as a memory or a clock that requires a backup when the remaining amount of the main battery 1 is small.

Reference numeral 11 denotes an AC adapter, which rectifies a commercial AC power supply to generate a power. Reference numeral 14 denotes a main circuit, which is an internal circuit such as a system logic circuit.

Reference numeral 16 denotes a pull-up resistor which inputs H to the switch control unit 4 when the switch 9 is off. Reference numeral 17 denotes a wraparound prevention buffer.
This prevents the voltage of the backup battery 10 from being directly applied to the main control unit 7.

Reference numeral 18 denotes a battery attachment / detachment detection unit for detecting attachment / detachment of the main battery 1.

[0021]

The operation of the configuration shown in FIG. 1 will be described. In a normal use state of the main battery 1, the main control unit 7 outputs a control signal for turning on the connection switch unit 2 via the switch control unit 4, and the voltage conversion unit 3 converts the voltage of the main battery 1 into the main circuit 14 To the operating voltage. AC adapter 1
When using the main control unit 1, the main control unit 7 outputs a control signal for turning off the connection switch unit 2 via the switch control unit 4 so that the voltage of the main battery 1 is not input to the voltage conversion unit 3. In that state, the AC adapter 11
Is input to the voltage converter 3 and is converted into an operating voltage of the main circuit 14 and supplied to the main circuit 14 and the main controller 7 and the like.

When the remaining amount of the main battery 1 is low,
Alternatively, when the microcomputer 7 is removed to replace the main battery 1, when the microcomputer 7 detects this,
The connection switch unit 2 is turned off via the switch control unit 4.

Then, the main control unit 7 is set in a mode in which it operates with a low current, and the backup battery 10 supplies a voltage only to a backup circuit such as a memory or a clock which requires a backup. Further, the backup battery 10 supplies an operation voltage to the switch control unit 4.

Then, when the main battery 1 is replaced or the like, it becomes normal, and the switch 9 is depressed. The input signal of the switch control unit 4 changes from H to L, for example, and the switch control unit 4 turns on the connection switch unit 2. A signal for pressing down the power switch 9 is input to the microcomputer 7 via the wraparound buffer 17.

When the connection switch unit 2 is turned on, the voltage of the main battery 1 is applied to the main control unit 7 and the reset unit 8, and the microcomputer 7 is reset to start a normal operation.

Therefore, the switch control section 4 outputs a control signal for turning on the connection switch section 2 and outputs the control signal.
Is turned on, the normal operation by the main battery 1 is maintained in a self-holding manner.

As described above, according to the present invention, restart after replacement of the main battery or the like can be performed from the main battery without using an AC adapter.

[0028]

FIG. 2 shows an embodiment (1) of the present invention.
1, 1 ', 1 "is a main battery.

Reference numerals 2, 2 ', and 2 "denote semiconductor switches (connection switch sections) for connecting or disconnecting the main battery 1 and the DD converter 3 (corresponding to the connection switch section in FIG. 1). The semiconductor switch 2 is composed of a P-channel MOSFET.
(20) or turned on by the L output of the high withstand voltage port B (21), and turned off by the H output of the high withstand voltage port A (20) and the high withstand voltage port B (21). When one or both of the breakdown voltage ports B (21) outputs L, the semiconductor switch 2 is turned on.

Reference numeral 3 denotes a DD converter which converts the voltage of the main battery 1 into a system logic circuit (main circuit) 14.
Is converted into the operating voltage. Reference numeral 4 denotes a switch control unit that controls on / off of the semiconductor switch 2.

Reference numeral 7 denotes a microcomputer (main control unit) for controlling the power supply device. A reset unit 8 resets the microcomputer 7. 9 is a switch SW1 (power switch).

A backup battery 10 supplies a backup voltage for a clock, a memory, and the like. Reference numeral 14 denotes a system logic circuit (main circuit), which is an internal circuit that receives power supply.

Reference numeral 17 denotes a wraparound buffer, which transmits an input signal from the power switch 9 to the microcomputer 7,
This prevents the voltage from being directly supplied from the three-terminal regulator 24 to the microcomputer 7 (see FIG. 3B).

Reference numerals 20 and 21 denote high-withstand voltage ports. The output side becomes L when H is input, and Hi-Z (high impedance) when L is input. In Hi-Z, the output side is pulled up to H.

Reference numeral 22 denotes a logic gate (NOR circuit).
23 is a clock and other backup circuits (memory, etc.). The operation of the configuration of FIG. 2 will be described. The microcomputer 7 operates normally when the main battery 1 operates.
Outputs H from the control port 3, changes the output of the high-withstand voltage port 21 to L, and turns on the semiconductor switch 2. As a result, the voltage of the main battery 1 is input to the DD converter 3, converted into an operating voltage of the system logic circuit 14, and supplied to the system logic circuit 14.

When detecting that the remaining amount of the main battery 1 is low or that the main battery 1 has been removed,
The mode shifts to the overdischarge prevention mode, and the microcomputer 7
Is set to L. As a result, the output of the high breakdown voltage port 21 becomes H, the semiconductor switch 2 is turned off, and the overdischarge of the main battery 1 is prevented. Then, the microcomputer 7 shifts to the operation mode with low power consumption.

In the overdischarge prevention mode, the three-terminal regulator 24 operates to input the voltage of the backup battery 10, convert the voltage to the operating voltage of the backup circuit 23, and back up. Further, a voltage is also supplied to the switch control unit 4 including the logic gate 22 and the high-voltage boats 20 and 21. 3B, the voltage of the backup battery 10 is applied to the gate of the wraparound buffer via the three-terminal regulator 24 at the gate, and the voltage is not directly applied to the microcomputer 7. As can be seen from the configuration of the wraparound buffer in FIG. 3B, when the power switch 9 is on, the gate thereof is at L, the P-channel transistor is on, the N-channel transistor is off, and Vdd (microcomputer) Is output to the microcomputer 7, and the microcomputer 7 is notified that the power is on. When the switch SW1 (1) is off, the P-channel transistor of the wraparound buffer 17 is turned off and the N-channel transistor is turned on by the voltage of the three-terminal regulator 24. Off is notified.

It is assumed that the power switch 9 is depressed in the overvoltage prevention mode. When the input of the logic gate 22 is L
(The output of the control port 1 is set to L), and the logic gate 22 outputs H. Then, the high withstand voltage port 20 outputs L, and the semiconductor switch 2 (or the semiconductor switches 2 ′, 2 ″) is turned on. Therefore, the voltage of the replaced main battery 1 (or the battery 1 ′, battery 1 ″). Is input to the DD converter 3. D
The voltage of the -D converter 3 is applied to the microcomputer 7 and the reset unit 8, and the microcomputer 7 is reset to start operation.

Then, the microcomputer 7 outputs H to the control port 3 and outputs L from the high withstand voltage port 21 to turn on the semiconductor switch 2 to be in a self-holding state. Thereafter, the semiconductor switch 2 is controlled by the microcomputer 7.
Turn off once. That is, the other batteries (1 ′,
1 ") is not inadvertently discharged. The microcomputer 7 outputs a return end signal (control port 1).
(When the control port 1 is H, the logic gate 22 always outputs L). At this time, the control port 3 is set to L.

The microcomputer 7 uses the built-in A / D converter to operate the main battery 1 (or 1 ',
1 "), and determines whether the connected main battery 1 has a capacity sufficient for operation.

If it is determined that the memory has sufficient capacity for normal operation, the microcomputer 7 notifies the system logic circuit 14 of the permission to shift to the normal operation mode, and shifts to the normal operation.

If the main battery 1 is not in an overdischarged state but cannot shift to the normal operation,
The semiconductor switch 2 is turned on without notification of the normal shift permission, and the semiconductor switch 2 is turned on to enter a pseudo standby mode (because there is a remaining battery, the remaining battery (battery voltage) is periodically operated as an intermittent operation by polling). Transition.

When the main battery 1 is in the overdischarged state, the microcomputer 7 shifts to the overdischarge prevention mode with the semiconductor switch 2 turned off. FIG. 3 shows an embodiment of the switch control unit and the wraparound prevention buffer according to the present invention.

(A) is a switch control unit, which is constituted by one logic gate, three high withstand voltage ports, and three gates (OR gates) by reducing the number of high withstand voltage ports of the switch control unit in FIG. It was made.

The operation is the same as that of the switch control unit shown in FIG. (b) shows an example of the wraparound prevention buffer. It is composed of CMOS and applies a voltage on the three-terminal regulator side to the gate.

When the power switch 9 is turned on, its gate becomes L, the transistor on the P-channel side is turned on, and the N-channel transistor is turned off, so that an H signal based on Vdd (power supply voltage of the microcomputer) is sent to the microcomputer 7. Entered,
The power switch 9 is notified of being turned on. When the power switch 9 is off, the cable voltage becomes H by the voltage of the three-terminal regulator, and the P-channel transistor is turned off.
When the N-channel transistor is turned on and its output becomes L
And the microcomputer 7 is notified that the power switch 9 is turned off. As described above, the voltage of the three-terminal regulator 24 does not directly appear on the output (microcomputer side) because of the wraparound buffer 17, but the on / off signal of the power switch 9 is notified to the microcomputer 7. Therefore, the backup battery is not wasted when the power switch 9 is turned on and off.

FIG. 4 shows an embodiment (2) of the present invention. Figure 2)
In the method of Embodiment (1), even if the overdischarge prevention mode is set,
Until the main battery is replaced with a battery having a remaining amount, the above-described processing until the re-stop must be performed. Therefore, in the present embodiment, the return process by the power switch 9 is prohibited until it is detected that the main battery has been replaced.

FIG. 4 shows such a configuration. 4, the same reference numerals as those in FIG. 2 indicate the common parts. Reference numeral 15 denotes a battery attachment / detachment detection unit that detects attachment / detachment of the main battery 1.

FIG. 5 shows the structure of the battery detachment detecting section.
In FIG. 5, reference numeral 41 denotes an inverter.

Reference numeral 42 denotes an AND gate. 43 is a flip-flop. The logic of the input / output of the flip-flop 43 is as follows. In the overdischarge prevention mode, the signal of the control port 1 is set to L. Therefore, the output of the inverter 41 becomes H, and the signal change from the detachment detection switch (SW2) 36 is transmitted to the flip-flop 43. When the main battery 1 is attached, the detachment detection switch 36 (S
W2) is ON (removal detection signal), so the AND gate 4
2, the input A becomes L, and the output of the AND gate 42 becomes H,
The output Q of the flip-flop 43 becomes H. At this time, the output of the logic gate 22 becomes L, and the high withstand voltage port A (2
Since the output of 0) is H, the semiconductor SW2 is turned off (the output of the high breakdown voltage port 21 is set to H). When the main battery 1 is removed, the AND gate 4
2 becomes high, and the output B of the AND gate 42 becomes low.
And the output Q bar of the flip-flop 43 becomes L, indicating that the battery has been removed. At this time, since the power switch 9 is off, the output of the logic gate 22 is L, the output of the high withstand voltage port 20 is H, and the semiconductor SW2 is off. In this state, when the main battery 1 is mounted, the input A of the AND gate 42 becomes L, but the output Q bar of the flip-flop holds the output at that time, so that Q bar becomes L.
It is. Therefore, the output of the flip-flop 43 remains at L even if the attachment / detachment of the main battery 1 is repeated thereafter.

In this state, when the power switch 9 is pressed down, the output of the logic gate 22 becomes H and the high withstand voltage port A (2
The output of 2) becomes L, the semiconductor switch 2 is turned on, and the microcomputer 7 starts the return process.

Therefore, the microcomputer 7 sets the return processing end signal (control port 1) to H. At this time, the AND gate 42
Is low regardless of the logic of the input A, and the output Q of the flip-flop 43 is high. In this state, the output of the logic gate is L irrespective of the logic on the power switch 9 side, and the on / off signal of the power switch 9 is not transmitted to the semiconductor switch 2 via the logic gate 22, but the wraparound prevention buffer The information is transmitted to the microcomputer 7 via 17. Then, it becomes a control signal of the microcomputer 7.

The subsequent operation is the same as in the embodiment (1). FIG. 6 shows an embodiment (3) of the present invention. FIG. 6 shows an embodiment.
(1) Or the high withstand voltage ports 20, 21,.
The logic gate (CMOS logic) 22, the wraparound buffer 17, and the battery attachment / detachment detection unit 15 are integrated circuits by CMOS.

In FIG. 6, the same reference numerals as those in FIGS. 2 and 4 denote the same components. Reference numeral 50 denotes an integrated IC, which includes high withstand voltage ports 20 and 21, a logic gate (CMOS logic) 22,
The wraparound prevention buffer 17 or the battery attachment / detachment detection unit 15 is integrated by CMOS.

Reference numerals 51 and 52 denote butting diodes, which are the main battery 1 and the backup battery 10.
Are input to the three-terminal regulator 24.

Reference numeral 53 denotes a pull-up resistor of the attachment / detachment detection switch SW2 (36). The configuration of FIG.
By inputting both of the backup batteries 10 to the three-terminal regulator 24, as long as the main battery 1 and the backup battery 10 are not overdischarged, the three-terminal regulator 24 with extremely low power consumption uses the reference voltage of the integrated IC (the battery voltage). This is used for voltage pull-up when the power switch 9 and the detachment detection switch 36 are off.

After the main battery 1 is pulled out, the backup battery 10 is discharged until the voltage drops, and even if the output of the three-terminal regulator 24 drops,
When the fully charged main battery 1 is mounted, a voltage is applied via the butting diodes 51 and 52, and the three-terminal regulator 24 is restored. When the power switch 9 is turned on, the operation of the integrated IC or the like becomes possible.

Thereafter, the return method of the embodiment (1) is used. FIG. 7 shows an embodiment (4) of the present invention. In FIG. 7, FIG.
The numbers common to FIG. 6 indicate the common parts.

Reference numeral 21 'denotes a high withstand voltage port, which outputs L when the output of the microcomputer 7 is H, and outputs L when the output of the microcomputer 7 is L.
In this case, the output side becomes high impedance and outputs H.

Reference numeral 55 denotes a reset or interrupt output unit. An interrupt control circuit 60 outputs an interrupt signal to the microcomputer 7.

Reference numeral 61 denotes a reset circuit.
To output a reset signal to the CPU. The interrupt control circuit 60 and the reset circuit 61 are constituted by an IC with very low power consumption.

In the configuration shown in FIG. 7, the power of the microcomputer 7 is supplied from the main battery 1 and the backup battery 10 by the three-terminal regulator via the butting diodes 51 and 52.

When the main battery 1 is over-discharged, the microcomputer 7 is set to the stop mode (intermittent operation mode).
Low power operation. The configuration of the battery detachment detection unit 15 is the same as that in FIG. The input of the inverter 41 is connected to the control port 1 of the microcomputer 7. When the main battery 1 is installed, the control port 1 of the microcomputer 7
Is set to L to make it possible to detect the attachment / detachment of the battery. When the main battery 1 is mounted, the attachment / detachment detection switch 36 (SW2) is ON, the attachment / detachment detection signal is L, the output of the AND gate 42 is H, and the flip-flop 4
The output Q bar of No. 3 is H, and the output of the high withstand voltage port (21 ') is L. Therefore, the semiconductor SW2 is on.
When the battery is removed in this state, the AND gate 4
2, the input A becomes H, the output of the AND gate 42 becomes L, the output Q bar (negation of the queue) becomes L, and a signal indicating that the battery has been removed is output. This signal is input to the interrupt control circuit 60 as an interrupt control signal. Then, the microcomputer 7 outputs an H signal from the control port 1 and supplies it to the battery detachment detection unit 15. In this state, even if the main battery 1 is attached, the battery detachment detection unit 1
Since the flip-flop No. 5 performs a hold operation, L which is to be output from the Q bar at that time is output from the Q bar. Therefore, irrespective of ON / OFF of the attachment / detachment detection switch 36, the output of the battery attachment / detachment detection unit 15 (input of the interrupt control circuit 61) does not change.

At this time, the output from the microcomputer 7 to the high-withstand voltage port 21 ′ (output from the control port 3) is set to L, and the output from the high-withstand voltage port 21 ′ is set to H.
Leave 2 off.

In this state, when the power switch 9 is turned on, the input of the reset circuit 61 becomes L, and the reset circuit 6
1 issues an interrupt request to the interrupt control circuit 60 and issues a reset pulse (reset output signal) having a time lapse characteristic in consideration of the main clock transmission stabilization time of the microcomputer 7. When the microcomputer 7 is started, the microcomputer 7 connects the control port 3 to the high withstand voltage port 21 ′.
H is output as a signal to the high-voltage port 21 ′, and the output of the high-withstand voltage port 21 ′ is set to L. As a result, the semiconductor switch 2 is turned on, power is supplied to the system logic circuit 14, and the operation is started.

FIG. 8 shows a flow chart of the embodiments (1), (2) and (3). S1 Turn on the power switch. S2
The output of the logic gate (the NOR circuit) is set to H.

S3 The output of the high voltage port A becomes L.
S4 The semiconductor switch (semiconductor SW) is turned on. S5 The power of the system logic of the D-D converter is turned on.

S6 The microcomputer starts operation. S7
The control port 3 of the microcomputer is maintained at H (high withstand voltage control port B output L).

S8 Check the remaining battery power. S9
It is determined whether the battery (main battery or the main battery and the backup battery) is in an overdischarged state. If it is in the overdischarge state, the process proceeds to S10. If not in the overdischarge state, the process proceeds to S13.

S10 Since the battery is over-discharged, the microcomputer warns that there is no remaining battery power. S11 The microcomputer sets the control port 3 to L (output H of the high withstand voltage port A) and turns off the semiconductor switch.

S12 The microcomputer stops operating. S1
3. Since the battery is not in an overdischarged state, it is determined whether or not the battery has an operable capacity. If operable, the process proceeds to S14. If not, the process proceeds to S15.

S14 Since the operation is possible, the system operation is started. S15 Since the microcomputer is not in the operable state, the microcomputer enters the pseudo standby mode.

Although the operation of restarting after battery replacement is not described in detail in the flowchart of FIG. 8, the operation is as described above. FIG. 9 is a flowchart of the embodiment (4) of the present invention.

S1 The battery is replaced. S2 Battery replacement is detected. S3 The power switch (SW1) is set to the ON / OFF detection permission state.

S4 The power switch (SW1) is turned on. S5 An interrupt is generated to instruct the microcomputer to start operation. Or issue a reset.

S6 The microcomputer starts operation. S7
The control port 3 of the microcomputer is set to H (output L of the high withstand voltage port 21 '). S8 Check the remaining battery power.

S9 It is determined whether the battery is in an overdischarged state.
If it is in the overdischarge state, the process proceeds to S10. S10 Since the battery is over-discharged, a warning is given that there is no remaining battery power.

S11 The control port 3 of the microcomputer is set to L (the output H of the high withstand voltage port 21 '). S12 The microcomputer performs stop mode transition processing.

S13 The microcomputer stops its operation (the microcomputer stops its own clock and shifts to ultra-low power consumption). S14 Since the battery is not in the overdischarged state, it is determined whether there is an operable capacity.

S15 Since the battery has an operable capacity, the system operation is started. S16 Since the battery has no operable capacity, the pseudo standby mode is set. In addition,
In the flowchart of FIG. 9, the operation of restarting after battery replacement is not described in detail, but the operation is as described above.

[0081]

According to the present invention, the power of the main battery is used for the restart such as the replacement of the main battery, and the normal operation power switch is turned on to change the operation from the battery over-discharge prevention mode to the normal operation. Can return to mode. For this reason, a commercial power supply source such as an AC adapter is not required for restarting the main battery replacement or the like, so that the normal operation mode can be resumed even when the commercial power cannot be taken.

Further, it is possible to resume the operation after replacing the battery or the like with only the power switch for normal operation without providing a special switch exclusively for returning to the normal mode.

[Brief description of the drawings]

FIG. 1 is a diagram showing a basic configuration of the present invention.

FIG. 2 is a view showing an embodiment (1) of the present invention.

FIG. 3 is a diagram illustrating an embodiment of a switch control unit and a wraparound prevention buffer;

FIG. 4 is a view showing an embodiment (2) of the present invention.

FIG. 5 is a diagram illustrating an embodiment of a buffer detachment detection unit.

FIG. 6 is a view showing an embodiment (3) of the present invention.

FIG. 7 is a view showing an embodiment (4) of the present invention.

FIG. 8 is a diagram showing a flowchart of embodiments (1), (2) and (3) of the present invention.

FIG. 9 is a view showing a flowchart of the embodiment (4) of the present invention.

FIG. 10 is a diagram showing a conventional power supply device.

[Explanation of symbols]

 1: main battery 2: connection switch section 3: voltage conversion section 4: switch control section 7: main control section (microcomputer) 9: switch (power switch) 10: backup battery 11: AC adapter 14: main circuit 17: wraparound prevention buffer

Claims (7)

(57) [Claims] A main battery (1) and a main battery
A voltage converter (3) that converts the voltage of (1), a connection switch (2) that connects or disconnects the main battery (1) and the voltage converter (3), and a connection switch (2). A switch control unit (4) that controls on or off, and a power supply
Main control unit (7) that controls (1 ') and main battery (1)
A backup battery (10) for supplying a backup voltage for retaining data in a memory or the like in place of the main battery (1) and the voltage of the backup battery (10). If the voltage of (10) falls below a certain value, the power supply (1 ') equipped with a battery over-discharge prevention mode that operates with low power consumption, Main control unit (7) and switch control unit (4)
The switch controller (4) operates with low power consumption, and when the switch controller (4) detects that the switch (9) is pressed down, the connection switch (2)
A power supply device, characterized in that the power supply is turned on and the normal operation of the main control unit (7) is started. 2. A control signal according to claim 1, wherein said main control section has a battery voltage detecting section, and starts operation by depressing a switch, and then turns off a connection switch section. A power supply unit that outputs a signal indicating whether the voltage of the main battery (1) is at a normal value, and shifts to a normal operation mode if the voltage is normal. 3. The main battery (1) according to claim 1, wherein
A power supply device comprising a battery detachment detecting section (18) for detecting the detachment of the main battery (1), and performing recovery processing from the overdischarge prevention mode after detecting replacement of the main battery (1). 4. A switch pressing signal is transmitted to the main control unit (7) according to claim 1, 2, or 3,
A power supply device comprising a sneak-prevention buffer (17) that does not transmit the voltage of a backup battery (10). 5. The switch control unit (4) and / or the battery detachment detection unit (18) according to claim 1, 3, or 4.
And / or a wraparound prevention buffer (17) integrated into an integrated circuit. 6. The main control unit (7) according to claim 5, wherein:
Main battery (1) or backup battery (10)
Supply the output voltage of the three-terminal regulator that inputs the voltage of the microcomputer. In the battery overdischarge prevention mode, the microcomputer operates in the stop mode that operates with low power consumption.
After detecting the battery removal by the battery removal detector (18), the interrupt from the switch (9) is permitted, and the main controller (7)
A power supply device for performing a return process by an interrupt process. 7. The main control unit according to claim 5, further comprising a reset IC capable of generating a one-shot pulse having an external reset terminal for receiving a reset signal from the outside, without being interrupted by the main control unit. Characterized by returning from a reset state.