JP2979455B2 - Digital transmission equipment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital transmission apparatus for expanding a service range by hierarchizing a compressed signal in digital video transmission and the like.

[0002]

2. Description of the Related Art Conventionally, television broadcasting and the like have used analog modulation, but with the recent improvement in digital signal processing technology, broadcasting, including television transmission, has also been performed by digital modulation.

[0003] However, unlike analog broadcasting, digital broadcasting has a cliff effect in which a demodulated signal cannot be obtained abruptly when the noise limit is exceeded, and transmitters and receivers must take measures such as providing a large margin to prevent this. Was needed.

[0004] In recent years, a method called degradation has been proposed in which the Cliff effect of digital modulation is set in several stages.

Hereinafter, a conventional example will be described with reference to the drawings.

FIG. 17 is a block diagram showing the configuration of a transmitter of a conventional digital transmission apparatus. In this figure, the coding is made hierarchical and the power of the modulated wave is changed by weighting to change the Cliff point and the gradation is degraded. It is intended.

A video signal, an audio signal A, and the like are divided and compressed by the high-efficiency hierarchical encoder 1 according to features in the signal, for example, frequency components. This compressed signal is controlled by the layer information signal of the layer information generator 12, the power value is weighted by the weight encoder 50 for each layer, and quadrature amplitude phase modulation is performed by the multi-level modulation vector generator 51. Convert to a modulation vector signal. This modulation vector signal is input to the fast inverse Fourier transformer 7 with the number of carriers determined according to the amount of information (for example, bit rate), and is converted from the frequency domain to the time domain. The real time signal and the imaginary time signal are converted by the adder 8, the vector is synthesized by the adder 9, and the modulated signal is transmitted from the antenna 10.

The transmitted signal is received by the receiver shown in FIG. FIG. 18 is a block diagram showing a configuration of a receiver of a conventional digital transmission apparatus. A signal input from an antenna 13 is controlled by a tuning signal generator 16 so that an oscillator 15 converts a predetermined oscillation signal into a frequency converter. 14 to convert it to an intermediate frequency signal. This intermediate frequency signal is selected by a band-pass filter 17, converted from a time domain to a frequency domain by a fast Fourier transformer 18, and each modulated wave signal is decoded from a multi-level modulation vector decoder 52 to a multi-level modulation vector decoding. To each of the gasifiers 53. This multi-level modulation vector decoder requires as many carriers as are output from the fast Fourier transformer 18.
Since these demodulated outputs are hierarchical signals, each error rate is obtained, and a hierarchical error rate detector 23 selects a signal of a hierarchical layer with few errors by a hierarchical code selector 24, and performs high-efficiency decoding. The information is obtained from the display 26 by decoding by the display 25.

[0009]

However, in the method shown here, since the cliff point is set by the power ratio of the digital modulation signal, a difference of several decibels is required to obtain the difference. Considering several levels of hierarchy, the setting is expected to be difficult.

The characteristic of the band-pass filter of the receiver is represented by a characteristic curve 100 shown in FIG.
It is not flat from a to + fa) and attenuated at the band edge to eliminate adjacent interference. FIG. 20 is a diagram illustrating the power that has been lost as a result. In the transmitted signal 99, the signal in the areas 101a and 101b is lost due to the influence of the band characteristic 100 by the receiver.

[0011] These problems are problems that the influence of the change in the electric field strength of the digital broadcast signal and the change in the characteristics of the receiver cannot be ignored. For this purpose, error correction is strengthened or the occupied band of the modulated wave spectrum is narrowed. However, this method cannot solve the problem in consideration of mobile reception.

An object of the present invention is to provide a digital transmission apparatus which solves the above-mentioned drawbacks and has a greatly improved cliff effect.

[0013]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems and to achieve the object, the present invention adjusts the multi-valued number or error correction capability of a modulated signal vertically and symmetrically on the frequency axis from the center of the occupied band. The cliff points of the modulated wave are hierarchized by the following.

[0014]

According to the present invention, the cliff point is set up and down symmetrically on the frequency axis from the center frequency of the occupied band, so that the influence of the degradation of the receiver and the band limitation of the reception bandpass filter can be suppressed.

Further, by limiting the band of the receiving filter in accordance with the received electric field strength, the carrier-to-noise ratio (C / N) is improved, and the cliff point of the modulated wave signal at the center of the band can be changed. Stable reception in an electric field is possible.

[0016]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, specific embodiments of the present invention will be described with reference to the drawings.

(Embodiment 1) FIG. 1 is a block diagram showing a configuration of a transmitter of a digital transmission apparatus according to a first embodiment of the present invention. In FIG. 1, 2 and 3 are 2 bits... M
Bit / symbolizer, 4 is a carrier distributor,

[0018]

[Outside 1]

In addition, the same components as those of the conventional example are denoted by the same reference numerals, and detailed description thereof will be omitted.

Next, the transmission operation will be described. The video signal and the audio signal A are compressed by the high-efficiency hierarchical encoder 1. The compressed signal for each layer is converted by the converter from the 2-bit / symbolizer 2 to the m-bit / symbolizer 3 and is set to have the same symbol rate.

Thereafter, codes having the same symbol rate and different multilevel levels in the hierarchical information signal of the hierarchical information generator 12 are sequentially transmitted from the code group of m bits / symbol by the carrier distributor 4 from the center of the occupied band. Place them above and below the frequency.

From these signals, modulation vectors are generated by a 2m-level modulation vector generator 6 to a 4-level modulation vector generator 5, and input to a fast inverse Fourier transformer 7;
After conversion from the frequency domain to the time domain, the real-time signal and the imaginary-time signal are converted by the complex frequency oscillator 11 and the complex frequency converter 8, and the vector
More modulated signals are transmitted.

FIG. 7 is a block diagram showing the configuration of the high-efficiency hierarchical encoder 1 in FIG. 1. As shown in FIG. 7, a discrete-value conversion circuit 54, a high-frequency component extraction circuit 55, a middle-frequency component Extraction circuit 56, low-frequency component extraction circuit 57, interlayer information generation circuit 59,
It comprises a synchronization signal generation circuit 60, a packet header generation circuit 61, compression encoders 62, 63, 64, packet generators 65, 66, 67, buffers 68, 69, 70, and an adder 71.

Next, the operation of the high-efficiency hierarchical encoder 1 will be described. An image signal or the like is once discretized by a discrete-value conversion circuit 54, which is then subjected to a high-frequency component extraction circuit 55 and a middle-frequency component extraction circuit.
56, separated by a low-frequency component extraction circuit 57. These signals are information-compressed by the compression encoders 62, 63 and 64.

On the other hand, the adder 71 adds the control signal of the interlayer information generating circuit 59 for finding information between the layers from the high-, middle-, and low-frequency components and the synchronizing signal of the synchronizing signal generating circuit 60, and the packet is added. Via a header generation circuit 61, the compression encoders 62, 6
The signals information-compressed by 3 and 64 and the respective signals are input to packet generators 65, 66 and 67, and supplied to the next stage (symbolizer) via buffers 68, 69 and 70.

FIG. 8 is a block diagram showing the configuration of the multi-level modulation vector generators 5 and 6 in FIG. 1, in which the multi-level number is m = 6 and quadrature amplitude phase modulation is used. That is, the 2-bit / symbol converter 72,
The signals are converted into symbols by a 4-bit / symbol converter 73, a 5-bit / symbol converter 74, and a 6-bit / symbol converter 75, and are respectively converted into a 4-level modulation vector generator 76, a 16-level modulation vector generator 77, and a 32-level modulation. The signal is supplied to the fast inverse Fourier transformer 7 via the vector generator 78 and the 64-level modulation vector generator 79.

FIG. 9 shows, as an example, the code point arrangement of 16-ary quadrature amplitude phase modulation in FIG. 8, and FIG. 9 shows the carrier in vector coordinates of the in-phase axis I and the carrier in quadrature axis Q.
The code point 87 can simultaneously represent 4-bit information. This may be a code point arrangement of phase modulation as shown in FIG. In this case, code point 80 represents 3-bit information.
FIG. 11 shows an example of the frequency division arrangement in the channel in FIG. 8, in which the carrier group 83 has 64 values,
32 values are set for the carrier groups 84a and 84b, and 16 values are set for the carrier groups 85a and 85b.
Four values can be assigned to the carrier groups 86a and 86b.

At this time, since the symbol speeds (here, symbol speeds Ts) are the same, the power characteristics 97 and 98 show the first null point (fs s) of each other in the fast Fourier transform as shown in FIG.
(= 1 / Ts), another adjacent carrier is generated and arranged.

FIG. 13 shows the power spectrum in the occupied band, and the spectrum 99 within the occupied bandwidth ± fa is flat in the band even if the modulated signals have different multilevel numbers.

FIG. 14 shows the limit noise amount of the frequency group in the channel at this time, that is, the Cliff point. Since the multi-level number is arranged so as to decrease from the center of the occupied bandwidth, the carrier wave is in the area 93 at the 64-level value, and the limit noise amount is in the area 93c. Similarly, 32 values, 16 values, and 4 values are respectively 94a, 94b, 94c, 94d, 95a, 95b, 95c, 95d,
Represented by 96a, 96b, 96c, 96d.

Conversely, if multi-leveling is performed, the critical noise amount of the frequency group in the channel, ie, the cliff point, is arranged so that the multi-level number increases from the center of the occupied bandwidth as shown in FIG. In the case of quaternary values, the carrier is in the region 89, and the limit noise amount is in the region 89c. Similarly, 16 values, 32 values, and 64 values are 90a, 90b, 90c, 90d, 91a, 91b, 91c, 91d, and 92, respectively.
a, 92b, 92c, and 92d.

As shown in these figures, the cliff point is different in each carrier group, and a characteristic such as a characteristic 104 shown in FIG. The characteristic 103 is a case where such a hierarchy is not performed, and the reception limit, that is, the carrier-to-noise ratio (C / N) is used.
Was p point in the past, but was expanded to q point by hierarchization.

(Embodiment 2) FIG. 2 is a block diagram showing a configuration of a receiver of a digital transmission apparatus according to a second embodiment of the present invention. In FIG. 2, 13 is an antenna, 14 is a frequency converter, 15 is an oscillator, 16 is a tuning signal generator, 17 is a band-pass filter, 18 is a fast Fourier transformer, 19 ... 20 are 4-level ... 2-m value modulation vectors. Decoders, 21 ... 22 are rate converters, 2
3 is an error rate detector for each layer, 24 is a code selector for each layer, 25 is a high-efficiency decoder, and 26 is a display.

Next, the receiving operation will be described.
Under the control of the tuning signal generator 16, the oscillator 15 supplies a predetermined oscillation signal to the frequency converter 14 to convert the signal into an intermediate frequency signal. The intermediate frequency signal is selected by a band-pass filter 17, converted from a time domain to a frequency domain by a fast Fourier transformer 18, and each modulated wave signal is
It is sequentially supplied from the value modulation vector decoder 19 to the 2m value modulation vector decoder 20. The four-level modulation vector decoder 19 to the 2m-level modulation vector decoder 20 need the number of carriers output from the fast Fourier transformer 18 as many as the number of carriers.

Since these demodulated outputs have the same symbol rate but different bit rates, they are converted into the same rate by the rate converters 21 to 22, and are signals for each layer. An error rate detector 23 selects a signal of a layer having a small number of errors by a layer-based code selector 24, decodes the signal by a high-efficiency decoder 25, and obtains information from a display 26.

With this configuration, as described in the first embodiment, hierarchies can be formed in the channels according to the codes, so that the gradation shown in FIG. 16 can be realized.

(Embodiment 3) FIG. 3 is a block diagram showing a configuration of a transmitter of a digital transmission apparatus according to a third embodiment of the present invention. In FIG. 3, 27 ... 28 are K ... K + a for each hierarchy.
Error correction encoder, 29 ... 30 is m bit / symbolizer, 31
Is a carrier distribution unit, and 32 is a 2m-level modulation vector generator. In addition, the same components as those in FIG. 1 are denoted by the same reference numerals, and description thereof will be omitted.

Next, the transmission operation will be described. The video signal and the audio signal A are compressed by the high-efficiency hierarchical encoder 1. The compressed signal for each layer is encoded so as to provide K error correction capability in order from K error correction capability according to the layer. This a is set to a value proportional to the number of layers. The error correction capability is set according to the hierarchy from the K error correction encoder 27 for each layer to the K + a error correction encoder 28 for each layer.
These output signals are set by the m-bit / symbolizers 29 and 30 so that both have the same symbol rate. After that, the carrier information allocator 31 arranges the hierarchical information signal of the hierarchical information generator 12 in the order of the error correction capability from the center frequency of the occupied band to the upper and lower frequencies. These signals placed are 2m
After being input from the value modulation vector generator 32 to the fast inverse Fourier transformer 7 and converted from the frequency domain to the time domain, the complex frequency oscillator 11 and the complex frequency converter 8 convert the real time signal and the imaginary time signal, and add The modulation signal is transmitted from the antenna 10 after the vector synthesis by the device 9.

In this configuration, as described in the first embodiment, hierarchies can be formed in the channels as shown in FIGS. 14 and 15 by the error correction capability, so that the gradation as shown in FIG. 16 can be realized. .

(Embodiment 4) FIG. 4 is a block diagram showing a configuration of a receiver of a digital transmission apparatus according to a fourth embodiment of the present invention. In FIG. 4, 33 is a 2m-level modulation vector decoder, 34 ... 35 are K ... K + a error correction decoders, and 36 ... 37 are speed converters. In addition, the same components as those in FIG. 2 are denoted by the same reference numerals, and description thereof will be omitted.

Next, the reception operation will be described. The signal input from the antenna 13 is controlled by the channel selection signal generator 16 and controlled by the oscillator.
15 supplies a predetermined oscillation signal to the frequency converter 14 and converts it into an intermediate frequency signal. The intermediate frequency signal is selected by the band-pass filter 17, converted from the time domain to the frequency domain by the fast Fourier transformer 18, and each modulated wave signal is sequentially supplied to the 2m-level modulation vector decoder 33. The 2m-valued modulation vector decoders 33 need the number of carriers output by the fast Fourier transformer 18.

Since these demodulated outputs differentiate the error correction capability for each layer, they are supplied from the K error correction decoder 34 for each layer to the K + a error correction decoder 35 for each layer to perform error correction. Thereafter, it is supplied to the next stage via the speed converters 36 to 37 in order to adjust the bit speed.

At this time, the error rate of each layer is obtained, and the signal of the layer having few errors is selected by the layer-by-layer error rate detector 23 by the layer-based code selector 24 and decoded by the high-efficiency decoder 25. Information from the display 26.

In this configuration, as described in the first embodiment, since the layers can be hierarchized in the channels as shown in FIGS. 14 and 15 by the error correction capability, the gradation as shown in FIG. 16 can be realized. .

(Embodiment 5) FIG. 5 is a block diagram showing a configuration of a receiver of a digital transmission apparatus according to a fifth embodiment of the present invention. In FIG. 5, reference numeral 38 denotes a passband variable device, 39
Is the bandwidth controller, 40 ... 41 is the multi-level modulation vector decoder,
And 42 ... 43 are speed converters. In addition, the same components as those in FIG. 2 are denoted by the same reference numerals, and description thereof will be omitted.

Next, the receiving operation will be described. The signal input from the antenna 13 is controlled by the channel selection signal generator 16 and controlled by the oscillator.
15 supplies a predetermined oscillation signal to the frequency converter 14 and converts it into an intermediate frequency signal. This intermediate frequency signal is selected by the band-pass filter 17 and further passed through a filter that can be narrowed by the pass-bandwidth variable unit 38 to a width smaller than the occupied bandwidth. After that, the time domain is converted from the time domain to the frequency domain by the fast Fourier transformer 18, and each modulated wave signal is converted into a multilevel modulation vector decoder.
Supply to 40 and 41 sequentially. This multi-level modulation vector decoder
40 to 41 are required as many as the number of carriers output by the fast Fourier transformer 18.

Since these demodulated outputs differentiate the multi-level numbers for each layer, they are supplied to the next stage via the speed converters 42 to 43 in order to adjust the bit speed. At this time, the error rate of each layer is obtained, the signal of the layer with few errors is selected by the layer-by-layer error rate detector 23 by the layer-based code selector 24, and the signal is decoded and displayed by the high-efficiency decoder 25. Information is obtained from the container 26.

Further, if the error rate is always bad at this time, the C / N at the time of demodulation is improved by setting the pass bandwidth narrower than the occupied bandwidth by the pass bandwidth variable unit 38 via the bandwidth controller 39. To improve the overall error rate.

In this configuration, as described in the first embodiment, by changing the multi-valued number for each layer, FIGS.
16 can be hierarchized in channels as shown in Fig. 16.
The following gradation can be realized.

Further, the error rate is improved by limiting the band according to the magnitude of the error rate.

(Embodiment 6) FIG. 6 is a block diagram showing a configuration of a receiver of a digital transmission apparatus according to a sixth embodiment of the present invention. In FIG. 6, 44... 45 are multi-level modulation vector decoders, 46.
49 is a speed converter. In addition, the same components as those in FIGS. 2 and 5 are denoted by the same reference numerals, and description thereof will be omitted.

Next, the reception operation will be described. The signal input from the antenna 13 is controlled by the channel selection signal generator 16 and controlled by the oscillator.
15 supplies a predetermined oscillation signal to the frequency converter 14 and converts it into an intermediate frequency signal. This intermediate frequency signal is selected by the band-pass filter 17 and further passed through a filter that can be narrowed by the pass-bandwidth variable unit 38 to a width smaller than the occupied bandwidth. After that, the time domain is converted from the time domain to the frequency domain by the fast Fourier transformer 18, and each modulated wave signal is converted into a multilevel modulation vector decoder.
Supply sequentially from 44 to 45. The number of the multi-level modulation vector decoders 44 to 45 required is the same as the number of carriers output from the fast Fourier transformer 18.

Since these demodulated outputs differentiate the error correction capability for each layer, the error correction encoders for each layer are different.
The error is corrected by supplying the signal from 46 to 47. Thereafter, the data is supplied to the next stage via the speed converters 48 to 49 in order to adjust the bit speed.

At this time, the error rate of each layer is obtained, and the signal of the layer having few errors is selected by the error rate detector 23 for each layer by the code selector 24 for each layer, and is decoded by the high efficiency decoder 25. Information from the display 26.

Furthermore, if the error rate is always bad at this time, the C / N at the time of demodulation is improved by setting the pass bandwidth narrower than the occupied bandwidth by the pass bandwidth variable unit 38 via the bandwidth controller 39. To improve the overall error rate.

In this configuration, as described in the first embodiment, by changing the multi-valued number for each layer, FIGS.
16 can be hierarchized in channels as shown in Fig. 16.
The following gradation can be realized.

Further, the error rate is improved by limiting the band according to the magnitude of the error rate.

[0058]

As described above, the digital transmission apparatus of the present invention has a modulated wave group having the same number of multi-level numbers as the number of signal layers and an error correction capability of the same number as the number of layers. By having the modulated wave group in the same channel, a gradation effect can be exhibited. Also, there is an effect that information transmission can be performed while transmission / reception transmission / reception of a mobile object is avoided.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a transmitter of a digital transmission device according to a first embodiment of the present invention.

FIG. 2 is a block diagram illustrating a configuration of a receiver of a digital transmission device according to a second embodiment of the present invention.

FIG. 3 is a block diagram illustrating a configuration of a transmitter of a digital transmission device according to a third embodiment of the present invention.

FIG. 4 is a block diagram illustrating a configuration of a receiver of a digital transmission device according to a fourth embodiment of the present invention.

FIG. 5 is a block diagram illustrating a configuration of a receiver of a digital transmission device according to a fifth embodiment of the present invention.

FIG. 6 is a block diagram illustrating a configuration of a receiver of a digital transmission device according to a sixth embodiment of the present invention.

FIG. 7 is a block diagram illustrating a configuration of a high-efficiency hierarchical encoder in FIG. 1;

FIG. 8 is a block diagram showing a configuration of a multi-level modulation vector generator in FIG.

9 is a diagram illustrating a code point arrangement of 16-ary quadrature amplitude phase modulation in FIG. 8;

FIG. 10 is a diagram illustrating another code point arrangement of 16-level quadrature amplitude phase modulation in FIG. 8;

11 is a diagram illustrating an example of a frequency division arrangement in a channel in FIG.

FIG. 12 is a diagram illustrating a generation arrangement of frequency-multiplexed carrier waves in FIG. 11;

FIG. 13 is a diagram illustrating a power spectrum in an occupied band.

FIG. 14 is a diagram illustrating a limit noise amount of a frequency group in a channel.

FIG. 15 is a diagram illustrating another limit noise amount of a frequency group in a channel.

FIG. 16 is a diagram showing the present invention and the conventional gradation.

FIG. 17 is a block diagram showing a configuration of a transmitter of a conventional digital transmission device.

FIG. 18 is a block diagram showing a configuration of a receiver of a conventional digital transmission device.

FIG. 19 is a diagram illustrating bandpass filter characteristics of a receiver.

FIG. 20 is a diagram illustrating power that is lost.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... High-efficiency hierarchical encoder, 2, 3 ... 2-bit, m bit / symbolizer, 4, 31 ... Carrier allocator, 5, 6
... 4 value, 2m value modulation vector generator, 7 ... Fast inverse Fourier transformer, 8 ... Complex frequency converter, 9 ... Adder,
11 ... complex frequency oscillator, 12 ... hierarchical information generator, 14
... Frequency converter, 15 ... Oscillator, 16 ... Tuning signal generator, 17 ... Bandpass filter, 18 ... Fast Fourier transformer, 19,20 ... 4 value, 2m value modulation vector decoder,
21… 22, 36… 37, 42… 43, 48… 49… Speed converter, 23
… Hierarchical error rate detector, 24… Hierarchical code selector, 25
… High efficiency decoder, 26… display, 27… 28, 34… 35…
K, k + a error correction encoder for each layer, 29 ... 30 ... m bit / symbolizer, 32 ... 2 m-valued modulation vector generator, 33
… 2m-level modulation vector decoder, 38… pass-bandwidth variable device, 39… bandwidth controller, 40… 41, 44… 45… multi-level modulation vector decoder, 46… 47… hierarchical error correction decoder .

──────────────────────────────────────────────────の Continued on the front page (72) Inventor Daisuke Hayashi 1006 Kadoma Kadoma, Osaka Prefecture Matsushita Electric Industrial Co., Ltd. (72) Inventor Hisaya Kato 1006 Odakadoma Kadoma, Osaka Pref. Matsushita Electric Industrial Co., Ltd. (72) Inventor Tad Bowser 1006, Kazuma, Kadoma, Osaka Pref. Matsushita Electric Industrial Co., Ltd. (58) Field surveyed (Int.Cl. ⁶ , DB name) H04B 14/00-14/06 H04N 7 / 24 H04L 1/00

Claims (16)

(57) [Claims] 1. High-efficiency hierarchical compression means for performing high-efficiency compression into a hierarchical structure based on information of an input signal, and converts a signal compressed according to a hierarchy into a multi-level modulation signal group in which a multi-level number is changed for each hierarchy. Multi-level modulation vector generating means, fast inverse Fourier transform means for performing inverse Fourier transform of the plurality of multi-level modulated signal groups to convert from the frequency domain to the time domain, and multi-level modulated wave groups as many as the number of layers. A digital transmission device comprising frequency conversion means for transmitting. 2. The digital signal according to claim 1, wherein the multi-level modulation vector generating means arranges the modulation vectors such that the number of multi-levels decreases or increases from the center of the transmission band to the upper and lower frequencies. Transmission equipment. 3. The digital transmission apparatus according to claim 1, wherein said multi-level modulation vector generation means generates a quadrature amplitude phase modulation modulation vector signal. 4. The digital transmission apparatus according to claim 1, wherein said multi-level modulation vector generation means generates a modulation vector signal of phase modulation. 5. A fast Fourier transform means for performing a Fourier transform from a time domain to a frequency domain on a modulated wave signal transmitted by a multi-level modulated wave group having the number of hierarchies of high efficiency hierarchical compression, and an output signal of the fast Fourier transform means Multi-level modulation vector decoding means for extracting a demodulated signal from a multi-level modulation vector group of several hierarchies, hierarchical error rate detecting means for detecting an error rate of a decoded signal for each hierarchy, and hierarchical error rate detecting means A digital transmission apparatus comprising: a layer-by-layer code selecting means for selecting a hierarchized compressed signal based on the result of the above; and a high-efficiency decoding means for decoding the selected signal. 6. High-efficiency hierarchical compression means for performing high-efficiency compression into a hierarchical structure based on information of an input signal, and hierarchical error-correction encoding means for converting a signal compressed in accordance with the hierarchy into an error correction capability for each hierarchy. Carrier distribution means for allocating a code having a different error correction capability for each layer to a plurality of carrier groups,
A multi-level modulation vector generating means for converting the code group divided by the carrier distribution means into a multi-level modulation vector, and a high-speed inverse Fourier transform means for performing an inverse Fourier transform on the multi-level modulation signal vector and converting the frequency domain into a time domain And a frequency conversion means for transmitting an output signal of the fast inverse Fourier transform means. 7. A signal to which a correction code has been added by the hierarchical error correction coding means, wherein the carrier group is arranged such that the correction capability decreases or increases from the center of the transmission band upward or downward in frequency from the center of the transmission band by the carrier distribution means. 7. The digital transmission device according to claim 6, wherein the digital transmission device is arranged. 8. The digital transmission apparatus according to claim 6, wherein said multi-level modulation vector generation means generates a quadrature amplitude phase modulation modulation vector signal. 9. The digital transmission apparatus according to claim 6, wherein said multi-level modulation vector generating means generates a modulation vector signal of phase modulation. 10. A high-speed Fourier transform means for performing a Fourier transform from a time domain to a frequency domain on a modulated wave signal transmitted by a multi-level modulated wave having a different error correction capability for each layer of high-efficiency hierarchical compression; Multi-level modulation vector decoding means for extracting a demodulated signal from the multi-level modulation vector group of the output signal of the Fourier transform means, error correction means for performing correction according to error correction capability for each layer, and error of the decoded signal for each layer A hierarchical error rate detecting means for detecting a rate, a hierarchical code selecting means for selecting a hierarchized compressed signal based on the result of the hierarchical error rate detecting means, and a high efficiency decoding means for decoding the selected signal. A digital transmission device characterized by the following. 11. A pass band limiting means for band limiting a modulated wave signal transmitted by a multi-level modulated wave group of the number of hierarchies of high efficiency hierarchical compression, and an output signal of said pass band limiting means from a time domain to a frequency domain. Fast Fourier transform means for performing a Fourier transform to the signal, multi-level modulation vector decoding means for extracting a demodulated signal from a multi-level modulation vector group of several layers of the output signal of the fast Fourier transform means, and an error rate of a decoded signal for each layer A layer-based error rate detecting means for detecting, a layer-based code selecting means for selecting a layered compressed signal based on the result of the layer-based error rate detecting means, a high-efficiency decoding means for decoding the selected signal, A digital transmission apparatus, comprising: a bandwidth control unit that controls a bandwidth of the band limiting unit based on a result of the error rate detection unit for each layer. 12. The digital transmission apparatus according to claim 11, wherein a pass bandwidth of said pass band limiting means becomes narrower than an occupied bandwidth when a received electric field intensity decreases. 13. The digital transmission apparatus according to claim 11, wherein a pass bandwidth of said pass band limiting means becomes narrower than an occupied bandwidth as the bit error rate increases. 14. A pass band limiting means for band limiting a modulated wave signal transmitted by a multi-level modulated wave group having an error correction capability of a number equal to the number of layers of the high efficiency hierarchical compression, and said pass band limiting means. Fast Fourier transform means for Fourier transforming the output signal from the time domain to the frequency domain; multi-level modulation vector decoding means for extracting a demodulated signal from a multi-level modulation vector group of the output signal of the fast Fourier transform means; Layer-based error rate detection means for detecting a signal error rate;
A layer-based code selection unit that selects a compressed signal for each layer based on the result of the layer-based error rate detection unit; a high-efficiency decoding unit that decodes the selected signal; A digital transmission device comprising a bandwidth control unit for controlling a bandwidth of a passband limiting unit. 15. The digital transmission apparatus according to claim 14, wherein a pass bandwidth of said pass band limiting means becomes narrower than an occupied bandwidth when a received electric field intensity decreases. 16. The digital transmission apparatus according to claim 14, wherein the pass bandwidth of said pass band limiting means becomes narrower than the occupied bandwidth as the bit error rate increases.