JP2968035B2 - LCD panel - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix type liquid crystal in which a liquid crystal panel, in particular, an IC for driving a liquid crystal (driver IC) is mounted on a glass substrate by a COG (Chip On Glass) method or the like. It is about panels.

Conventional technology When trying to drive a liquid crystal panel without using the COG method, only the output terminal of the driving IC is connected to the electrode on the glass substrate using a film carrier, etc., and the input terminal is directly or It is connected to a pattern on a printed circuit board via a carrier. Therefore, since the input terminal of the driving IC is not directly connected to the electrode on the glass substrate,
It was not necessary to consider the effects of the contact resistance between the electrodes on the glass substrate and the IC terminals.

However, the number of electrodes drawn from the panel increases as the number of pixels on the panel increases, and mounting multiple liquid crystal driving LSIs outside the panel using a film carrier or the like was a factor that hindered the miniaturization of liquid crystal panels. . Therefore, in order to connect compactly, at high reliability and at low cost, an LS for driving liquid crystal is mounted on the glass substrate of the panel.
The COG mounting method that directly mounts I is becoming mainstream today.

Problems to be Solved by the Invention However, by using the COG method, a signal for driving an IC is given to a panel, that is, a glass substrate.
The wiring resistance before being supplied to the IC input terminal (usually, AI wiring is used on the glass substrate) and the contact resistance between the IC terminal and the electrode on the glass substrate become nonnegligible values. In particular, in mass production, variations due to operating environment such as temperature and humidity of wiring resistance and contact resistance and factors of variation in the manufacturing process are considered, and it is necessary to design with sufficient margin. In addition, the ground terminal through which the most current flows is greatly affected by the wiring resistance.
Above all, digital signal terminals have a large current flowing at the rise and fall of the pulse, so analog signal S / S
This is a factor that lowers the N ratio. Further, high-frequency analog signals cause a reduction in noise margin of digital signals.

Normally, in a circuit on a printed circuit board, spike noise and high frequency components generated in the ground line can be removed using a bypass capacitor or the like. Especially digital
It is common sense to insert a bypass capacitor between the IC ground lines. However, mounting the capacitor on a glass substrate is costly and difficult to construct. Further, when a capacitor is formed using a multilayer wiring pattern on a glass substrate, the probability of interlayer short-circuit increases as the capacitance is increased, and the panel yield decreases.

An object of the present invention is to solve such a problem, and it is an object of the present invention to improve the S / N ratio in an analog signal system and prevent a reduction in a noise margin in a digital signal system.

Means for Solving the Problems In order to solve this problem, the present invention uses two types of ground lines for an analog signal system and a ground line for a digital signal system on a glass substrate, and completely electrically connects them. To be independent.

Function This configuration reduces the mutual interference between analog and digital signals, improves the S / N ratio in analog signal systems, and prevents the reduction of noise margin in digital signal systems. It is possible.

Embodiment Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a circuit diagram of an active matrix type liquid crystal panel in which a liquid crystal driving LSI is mounted by using a COG mounting method according to an embodiment of the present invention. In the figure, 1 is a gate signal output IC of a thin film transistor, 2 is a source signal output IC of the thin film transistor, and 3 and 4 are a gate output signal line and a source output signal line, respectively connected to a gate wiring and a source wiring. I have. Reference numeral 5 denotes a bus line for supplying an input signal to each IC, which includes a clock signal, a power supply, various timing signals, and the like necessary for driving each IC. These signals are generated by the signal generation unit 6 and transmitted to the bus line 5 from the electrode unit 7. Here, the electrode portions 7 and the bus lines 5 are wirings formed on the glass substrate 8. Of the bus lines 5, 9 is a ground line for analog signals, 10 is a ground line for digital signals, and each of the ICs 1 and 2 and the electrode unit 7 are also divided into two types, one for analog signals and one for digital signals. The analog signal ground line 9 and the digital signal ground line 10 are short-circuited between the panel and the signal generator 6. This is because a copper wire or the like having a low wiring resistance is used in this portion, and there is no need to make two types of ground lines independent. Reference numeral 11 denotes a power supply line for digital signals, reference numeral 12 denotes a power supply line for analog signals, and similarly to the ground lines 9 and 10, each of the ICs 1, 2 and the electrode unit 7 has two types, one for analog signals and one for digital signals. And a short circuit is made between the panel and the signal generator 6.

The present invention is as described above. In the wiring on the glass substrate where it is difficult to reduce the resistance, the ground line for the analog signal and the ground line for the digital signal are made independent, so that the S / N By improving the ratio and preventing a reduction in the noise margin in the digital signal system, a liquid crystal panel with a high operating margin can be realized.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of an active matrix type liquid crystal panel in which a liquid crystal driving LSI is mounted by using a COG mounting method according to an embodiment of the present invention. 1 ... Gate signal output IC, 2 ... Source signal output I
C, 3 ... gate output signal line, 4 ... source output signal line, 5 ... bus line, 6 ... signal generation unit, 7 ... electrode unit, 8 ... glass substrate, 9 ... ground for analog signal Line, 10 ... Digital signal ground line, 11 ...
... Power supply line for digital signals, 12 ... Power supply line for analog signals.

Continuation of front page (58) Fields investigated (Int.Cl. ⁶ , DB name) G02F 1/133 G02F 1/1345 G09F 9/00-9/46 G09G 3/18 G09G 3/36

Claims (1)

(57) [Claims] 1. A liquid crystal panel having a display element driving IC mounted by a method of mounting chip components on a glass substrate, and the input / output signals of the IC having both digital signals and analog signals. A liquid crystal panel characterized in that a signal ground line and an analog signal ground line are completely independent on a glass substrate.