JP2953972B2 - Semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a semiconductor device for high frequency and high output.

[0002]

2. Description of the Related Art With the development of communication equipment, the demand for semiconductor devices for high frequency and high output has been greatly increased. In particular, in information terminal portable devices such as a car phone and a cellular phone, a high-output semiconductor device that operates with high efficiency is required in order to perform high-output operation and talk for a long time by driving a battery. That is, there is a demand for a high-output semiconductor device that minimizes power loss inside the semiconductor device and efficiently converts applied DC power to high-frequency power.

A field effect transistor using a GaAs semiconductor has been put into practical use and mass-produced as a high-output semiconductor device satisfying such demand. In recent years, a bipolar transistor using a heterojunction of a compound semiconductor has been developed. HBT) has also attracted attention as a high-output semiconductor device because of its excellent high-frequency characteristics and high current driving capability.

FIGS. 2A and 2B are a plan view and a schematic sectional view showing an example of a conventional semiconductor device.

As shown in FIGS. 2A and 2B, GaAs
A plurality of HBTs are arranged side by side in a transistor region 5 formed on the upper surface of the s-substrate 1, and a base electrode 6, a collector electrode 7, and an emitter electrode 8 formed on each of the HBTs are connected to each other to form a transistor. A semiconductor chip is configured by being connected to each of the base electrode pad 2, the collector electrode pad 3, and the emitter electrode pad 4 arranged around the region 5. On the bottom and side surfaces of the semiconductor chip, a heat radiation layer 10 made of a metal having good thermal conductivity with a thickness of 10 to several tens μm is formed, and surrounds the periphery including each electrode pad.

Here, the base electrode pad 2 is connected to an external circuit as an input terminal and the collector electrode pad 3 is used as an output terminal, and the emitter electrode pad 4 is connected to the heat radiation layer 10 for operation.

[0007]

In this conventional semiconductor device, the base electrode pad 2 and the collector electrode pad 3 for electrically connecting the base electrode 6 and the collector electrode 7 of the transistor region 5 to the outside are connected to the heat radiation layer 10. Therefore, the distance between the transistor region 5 for heat generation and the heat radiation layer 10 on the side surface is separated by the region of each of the electrode pads 2 and 3. For this reason, the heat generated from the transistor region 5 is radiated substantially only from the lower surface of the chip, and the thermal resistance cannot be sufficiently reduced. Therefore, the heat from the transistor region 5 is not sufficiently released, leading to deterioration of the characteristics of the high-output semiconductor device, or even damage to the high-output semiconductor device, thereby causing a reduction in reliability.

SUMMARY OF THE INVENTION An object of the present invention is to provide a high-output semiconductor device which realizes low heat resistance and high heat dissipation efficiency, thereby improving performance such as power efficiency and reliability.

[0009]

According to the present invention, there is provided a semiconductor device comprising:
The transistor region formed on the upper surface of the semiconductor substrate and this
An electrode pad connected to a transistor arranged in the transistor region and arranged around the transistor region;
Filled in a groove formed on the lower surface of the semiconductor substrate inside the electrode pad and surrounding the transistor region.
Is either One said is characterized in that a metal heat sink layer formed on the lower surface of the semiconductor substrate.

[0010]

Next, the present invention will be described with reference to the drawings.

FIGS. 1A and 1B are a plan view and a schematic sectional view showing an embodiment of the present invention.

As shown in FIGS. 1A and 1B, GaAs
Al is contained in the transistor region 5 formed on the upper surface of the s substrate 1.
A plurality of HBTs having a heterojunction made of GaAs / GaAs are arranged and formed, and a base electrode 6, a collector electrode 7, and an emitter electrode 8 formed on each of these HBTs are connected to each other. Connected to a base electrode pad 2, a collector electrode pad 3, and an emitter electrode pad 4 arranged around the transistor region 5,
A groove surrounding the periphery of the transistor region 5 is formed on the lower surface of the GaAs substrate 1 inside the base electrode pad 2 and the collector electrode pad 3 connected to the external circuit, and the inside of the groove is filled and formed on the lower surface of the GaAs substrate 1. A heat radiation layer 9 made of a metal having good thermal conductivity such as Au is formed with a thickness of 10 to several tens μm, and the base electrode pad 2 is connected to an external circuit as an input terminal and the collector electrode pad 3 is used as an output terminal. The emitter electrode pad 4 is connected to the heat radiation layer 9 and grounded. In addition,
Similar effects can be obtained in the case of a field effect transistor other than the HBT.

[0013]

As described above, according to the present invention, the heat generated in the transistor region is efficiently radiated out of the chip by grounding the transistor region and the heat radiation layer embedded in the trench. This makes it possible to alleviate a rise in temperature of a specific transistor in the transistor region, thereby enabling uniform operation of all the transistors, thereby improving gain and power efficiency.

In addition, by preventing current concentration and heat concentration of a specific transistor, deterioration and destruction of characteristics of the transistor due to this can be avoided, and reliability can be improved.

[Brief description of the drawings]

FIG. 1 is a plan view and a schematic cross-sectional view showing one embodiment of the present invention.

FIG. 2 is a plan view and a schematic cross-sectional view illustrating an example of a conventional semiconductor device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 GaAs substrate 2 Base electrode pad 3 Collector electrode pad 4 Emitter electrode pad 5 Transistor area 6 Base electrode 7 Collector electrode 8 Emitter electrode 9,10 Heat dissipation layer

Claims (1)

(57) [Claims] And 1. A transistor region formed on the upper surface of the semiconductor substrate, and <br/> electrode pad disposed around the connection with transistors arranged in the transistor region said transistor region, the electrode pads inside the Formed on the lower surface of the semiconductor substrate and surrounding the transistor region
The semiconductor device is characterized in that a filled in the groove, or One the metal heat dissipating layer formed on the lower surface of the semiconductor substrate.