JP2951057B2 - Photovoltaic device and manufacturing method thereof - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a photovoltaic device using a high-purity silicon layer formed on a low-purity silicon substrate as a photoactive layer, and a method of manufacturing the same.

[0002]

2. Description of the Related Art A conventional photovoltaic device has a 99.999%
Since the pn junction is formed on the surface of the high purity silicon wafer by the diffusion method or the like, the material cost in the manufacturing cost is very large.

In addition, the portion exhibiting the photovoltaic effect is usually only in the vicinity of the wafer surface, and most of the wafer is merely used as a so-called support substrate, and waste of material is large. Regarding the solar cell using this wafer, see the Electrotechnical Laboratory, Vol. 51, No. 5, p.
8, 1987. 1

[0004]

It is necessary to obtain an inexpensive photovoltaic device without deteriorating the characteristics of the photovoltaic device.

[0005]

The feature of the photovoltaic device of the present invention is that a high-purity silicon layer formed on a low-purity silicon substrate is used as a photoactive layer, and the surface of the high-purity silicon layer is One-conductivity-type amorphous silicon and another-conductivity-type amorphous silicon are formed in an island shape, and the feature of the method for manufacturing a photovoltaic device of the present invention is that light is deposited on a low-purity silicon substrate. Forming a high-purity silicon layer to be an active layer, forming island-shaped amorphous silicon of different conductivity types formed on the high-purity silicon layer at a temperature lower than the temperature at which the high-purity silicon layer is formed; Therefore, each is formed.

[0006]

In the photovoltaic device of the present invention, when light enters, most of photogenerated carriers are generated in the high-purity silicon layer, and the n-type amorphous silicon and the p-type non- Photogenerated carriers are extracted to the outside through the crystalline silicon.

Further, according to the manufacturing method of the present invention, the temperature for forming the conductive amorphous silicon is lower than the temperature for forming the high-purity silicon layer. Impurities do not diffuse into the high-purity silicon layer, and a photovoltaic device having good characteristics can be obtained.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is an element structure diagram of a photovoltaic device according to the present invention in each manufacturing process.

FIG. 1A shows a state in which a high-purity silicon layer (2) is formed on a low-purity silicon substrate (1) by an epitaxial growth method. This low-purity silicon substrate
As (1), a 300 μm thick substrate made of 98% pure metal silicon was used in the examples. As the epitaxial growth method, a photo CVD method, a chemical deposition method, a plasma CVD method, or the like is used. In this example, the plasma CVD method was used.

As a typical forming condition, the metal silicon substrate (1) is placed in a plasma CVD apparatus, and SiH ₄
5 sccm of gas, 5 sccm of SiH ₂ F ₂ gas, 100 sccm of H ₂ gas as a diluting gas, a substrate temperature of 300 ° C., a high frequency power of 10 W, and a degree of vacuum of 100 mTorr.
Under the condition of r, a plasma reaction was performed, thereby obtaining a high-purity silicon layer (2) composed of a polycrystalline silicon layer.

Next, in the step shown in FIG. 1B, an n ⁺ -type amorphous silicon film (3) is formed on the surface of the high-purity silicon layer (2) by a known plasma CVD method to a thickness of about 500 °. Then, this is patterned into an island shape. The n ⁺ -type amorphous silicon film (3) is doped with a high concentration of impurity in order to reduce the resistance since the device needs to have a function of extracting photo-generated carriers to the outside.

In the step shown in FIG. 1C, the p ⁺ -type amorphous silicon film having a thickness of about 500 ° is covered so as to cover the n ⁺ -type amorphous silicon film (3) patterned in an island shape. Membrane (4)
To form In the case of the p ⁺ -type amorphous silicon film (4), high-concentration impurity doping is performed by a conventionally well-known plasma CVD method for the same reason as that of the n ⁺ -type amorphous silicon film (3).

The n ⁺ type amorphous silicon film (3) and p ⁺
Table 1 shows typical forming conditions for the type amorphous silicon film (4).

[0014]

[Table 1]

As shown in the table, the formation of the n ⁺ -type amorphous silicon film (3) and the p ⁺ -type amorphous silicon film (4) is based on the above-described high-purity silicon layer (2). Is performed at a temperature lower than the formation temperature of the high-purity silicon layer (2).

This is because if the temperature is increased, impurities diffuse from the low-purity silicon substrate (1) to the high-purity silicon layer (2).

In the step shown in FIG. 1D, patterning is performed so that the resist (5) remains in the strait region of the plurality of n ⁺ -type amorphous silicon films (3) formed in an island shape.

Then, in the step of FIG.
Using the mask (5) as a mask, the p ⁺ type amorphous silicon film (4) is removed by etching. In this case, the n ⁺ -type amorphous silicon film (3) is also exposed during the etching process, so that the p ⁺ -type amorphous silicon film (4) and the n ⁺ -type amorphous silicon film (3) Was performed by controlling the etching time.

In the step shown in FIG.
After removing (5), an electrical connection is made. Electrical connection (6) in the figure
FIG. 2 schematically shows a circuit state, and FIG. 2 shows a pattern viewed from the amorphous silicon film forming surface side of the device. The reference numerals in the drawing are the same as those in FIG. As can be seen from the figure, in this device, the electrical extraction of the n ⁺ -type amorphous silicon film (3) and the p ⁺ -type amorphous silicon film (4) was performed from the surface of each amorphous silicon respectively. It becomes a point contact type of taking out.

Therefore, in this photovoltaic device, the high-purity silicon layer (2) is used as the photoactive layer, and the n ⁺ -type amorphous silicon film (3) and the p ⁺ -type A semiconductor junction is constituted by the crystalline silicon film (4).

For this reason, this embodiment also has a feature that short-wavelength light absorbed on the surface of the high-purity silicon layer (2) can be efficiently absorbed.

In another embodiment of the present invention, the pattern of the n ⁺ -type amorphous silicon film and the p ⁺ -type amorphous silicon film is comb-shaped. FIG. 3 shows a shape of the photovoltaic device in the case where the present device is viewed from the front surface side when the device is comb-shaped. According to such a pattern, the electrical connection is simplified as compared with the embodiment described above.

The same reference numerals in FIG. 3 denote the same parts as in FIG.

Further, the high-purity silicon layer used in the present invention may be formed not only by the epitaxial growth method but also by a hydrogen treatment under a high temperature and a high pressure.

[0025]

According to the photovoltaic device of the present invention, most of the photogenerated carriers due to the incidence of light are generated in the high-purity silicon layer,
The n ⁺ type amorphous silicon film formed on the surface of this layer and p
Carriers are efficiently extracted to the outside from the ⁺ type amorphous silicon film.

For this reason, although low-purity silicon is used as the substrate, an element with high conversion efficiency can be obtained.

Further, in the photovoltaic device of the present invention, since a high-purity silicon layer formed on a low-purity silicon substrate is used as a photoactive layer, the amount of high-quality materials used is extremely small. Cost reduction can be realized.

In the method for manufacturing a photovoltaic device according to the present invention, the temperature of forming the conductive amorphous silicon is lower than the temperature of forming the high-purity silicon layer. Impurities from the substrate do not diffuse into the high-purity silicon layer, and a photovoltaic device having good characteristics can be obtained.

[Brief description of the drawings]

FIG. 1 is a sectional view of an element structure according to a manufacturing process of a photovoltaic device of the present invention.

FIG. 2 is a view showing a pattern of amorphous silicon of the photovoltaic device.

FIG. 3 is a view showing a pattern of amorphous silicon of another photovoltaic device.

[Explanation of symbols]

(1) Low-purity silicon substrate (2) High-purity silicon layer (3) n ⁺ type amorphous silicon film (4) p ⁺ type amorphous silicon film

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-61-65484 (JP, A) JP-A-58-61680 (JP, A) JP-A-56-77818 (JP, A) (58) Field (Int.Cl. ⁶ , DB name) H01L 31/04

Claims (2)

(57) [Claims] A high-purity silicon layer formed on a low-purity silicon substrate is used as a photoactive layer, and one-conductivity-type amorphous silicon and another-conductivity-type amorphous silicon are formed on the surface of the high-purity silicon layer. Is formed in the shape of an island. 2. A step of forming a high-purity silicon layer serving as a photoactive layer on a low-purity silicon substrate, and forming, on the high-purity silicon layer, island-shaped amorphous silicon having different conductivity types. Forming a high-purity silicon layer at a temperature lower than the temperature at which the high-purity silicon layer is formed.