JP2931998B2 - Controller system - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a controller system, and more particularly to a controller system suitable for transmitting signals between an upper controller and a lower controller.

[Conventional technology]

In a conventional controller system, control has been performed to capture a common signal for each lower-level controller. In this case, in order to pass a common signal to the common controller and each lower-level controller, the common signal is relay-amplified, each contact is input, and each controller outputs an output to a common portion. In this case, since a relayless and cableless system of a common part cannot be constructed, complicated control is performed.

That is, as shown in FIG. 3, a common signal is transmitted from the host computer 1 to the common controller 3 via the transmission line 2, and the common controller 3
A signal is transmitted from a remote I / O interface 33 in the I / O unit 6 to a remote I / O interface 49 in the station module 48 of the I / O unit 6 via the transmission line 19, and input / output through the remote I / O interface 49 Input / output is performed by the module 43.

Further, the common controller 3 transmits the I / O loop interface 31 via the transmission line 4 to the lower controller I / O.
The signal is transmitted through the O-loop interface 51.
In this case, when the common controller 3 goes down, input / output signals of the common part cannot be obtained, so that all the common signals (not shown) must be taken into the lower controller 7, and a relayless and cableless system cannot be constructed. Was.

As a known example, there is a device protection unit in a control device described in Japanese Patent Application No. 58-195901.In this known example, an external signal is taken in parallel to the sequencer and the device protection unit, and when the sequencer goes down, A command is issued from the device protection unit.

A known example of Japanese Patent Application No. 63-283680 discloses that a forced mode + off operation is added to a device protection unit in a control device. In this known example, when the sequencer goes down, the device is stopped by the device protection unit. Is what you can do.

[Problems to be solved by the invention]

In a conventional controller system, a common signal is taken in each controller unit and controlled. That is, in order to pass a signal to the common controller and each controller, the common signal is relay-amplified, contacts are input to each controller unit, and outputs are output from the controllers to a common portion. In this case, a relayless and cableless system of a common part cannot be constructed, and complicated control is performed.

An object of the present invention is to provide a controller system capable of transmitting a signal between normal lower controllers when an upper controller goes down.

[Means for solving the problem]

In order to achieve the above object, the present invention comprises a common controller connected to a higher-level computer via a transmission path, and a plurality of lower-level controllers connected to the common controller via a plurality of transmission paths, A common controller and a lower-order controller are connected to one of the plurality of transmission paths, and an I / O loop interface for transmitting a common signal through the one transmission path, and are connected to the plurality of transmission paths. To transmit a signal to the other transmission line when an error occurs
A controller system having a CPU link interface and transmitting a signal between the normal CPU link interfaces among the CPU link interfaces via the other transmission path when the common controller goes down.

Further, the present invention includes: a common controller connected to a higher-level computer via a plurality of transmission paths; and a plurality of lower-level controllers connected to the common controller via the plurality of transmission paths. Common controller,
An I / O loop interface connected to one of the plurality of transmission paths and transmitting a common signal through the one of the plurality of transmission paths; and an abnormal controller connected to the plurality of transmission paths. A CPU link interface for transmitting a signal to the other transmission line at times, and transmitting a signal via the other transmission line between the normal CPU link interfaces among the CPU link interfaces when the host computer goes down. This is a configuration of the controller system.

[Action]

According to the above-described means, signal transmission by each I / O loop interface is executed at normal times, and when the common controller or the host computer goes down, signal transmission by each I / O loop interface is changed to signal transmission by the normal CPU link interface. , It is not necessary for the lower-level controller to take in the signal of the common part, so that a relay-less and cable-less system can be constructed, and a flexible control can be performed.

〔Example〕

 One embodiment of the present invention will be described with reference to FIG.

As shown in FIG. 1, the signal of the common controller 3 is transmitted from the central computer 1 through the transmission line 2, and the common controller 3 transmits the common signal from the common controller 3 to the I / O unit 6 and the lower-order controller 7. . In this case, the transmission path is divided into two. For example, the signal transmission path
A transmission line (I / O loop) 4 for performing normal control, and a CPU link transmission line 5 for transmitting to the respective lower controllers when the common controller 3 and the lower controller 7 are down.
And divided into Then, the common controller 3, the I / O unit 6, and the lower-order controller 7 are provided with I / O loop interfaces 31, 41, 51 and CPU link interfaces 32, 42, 52 corresponding to the transmission paths 4, 5, respectively. At the same time, the I / O loop interfaces 31, 41, 51 are connected to the transmission path 4, and the CPU link interfaces 32, 4
2 and 52 are connected to transmission lines 4 and 5.

In the system having the above configuration, when performing normal control, that is, when transmitting a signal based on a signal from the central computer to each controller, for example, a master / slave having a common controller as a master and other controllers as slaves. Depending on the method, I / O of common controller 3
I / O loop interface 31 in O interface 30
And a signal is transmitted to the I / O loop interface 41 in the station module 40 of the I / O unit 6 via the transmission path (I / O loop) 4 and the I / O interface 50 of the lower-order controller 7. A signal is transmitted to the next lower-level controller (not shown) through the I / O loop interface 51 in the inside. At this time, each of the CPU link interfaces 32, 42, and 52 usually monitors the signal transmission state on the transmission path 4. Then, for example, when the common controller 3 goes down, transmission of a signal using the common controller 3 as a master becomes impossible, so that the transmission is switched to signal transmission by a normal controller or the like. That is, a normal CP
The transmission path 5 is selected as a signal transmission path under the control of the U link interfaces 42 and 52. Specifically, a signal under the control of the CPU link interface 52 in the I / O interface 50 of the lower controller 7 is transmitted to the CPU link transmission line 5.
Via I / O unit 6 via station module 40
To the next lower controller (not shown) through the CPU link interface 42 (not shown) and through the CPU link interface (not shown) in the I / O interface (not shown) of the lower controller (not shown). .
As a result, even if the common controller 3 goes down, signals can be transmitted by a normal controller or the like.

Another embodiment of the present invention will be described with reference to FIG.

This embodiment is different from the above-described embodiment in that the host computer 1, the I / O interface 101, the I / O loop interface 102 for normally transmitting a signal, and the backup when the I / O loop interface 102 goes down. And the lower controller 7 transmits a signal to each of the plurality of lower controllers via the CPU link transmission line 5 through the CPU link interface 52 of the lower controller 7 when the upper computer 1 goes down. , The control can be continued.

The present invention can build a relayless and cableless system. That is, the common controller 3
, I / O unit 6 and I
I / O interface 30, 50 and station module 4
By providing the I / O loop interfaces 31, 41, 51 and the CPU link interfaces 32, 42, 52 in 0, when the common controller 3 goes down,
By transmitting the signal from the U-link interface 52 via the CPU link transmission line 5, control becomes possible, a vertically divided self-contained distributed system can be constructed, and a relayless and cableless system can be constructed.

〔The invention's effect〕

According to the controller system of the present invention, an I / O interface is provided for a common controller and a lower controller, and an I / O loop interface and a CPU link interface are provided respectively, and a station module of an I / O unit of a host computer is provided. The I / O loop interface and the CPU link interface are installed in the I / O loop interface, and the transmission path is connected to each I / O loop interface and the CPU link interface. When the common controller or the host computer goes down, the signal transmission by each I / O loop interface Switching to signal transmission by the normal CPU link interface eliminates the need for the lower-level controller to take in the common part of the signal.This makes it possible to build a relayless and cableless system and achieve flexible control. Kill.

[Brief description of the drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention, FIG. 2 is a block diagram showing another embodiment of the present invention, and FIG. 3 is a diagram showing a conventional technique. 1 Upper computer, 2 Transmission line, 4 Transmission line (I / O loop), 5 CPU link transmission line, 6 I / O unit, 3 Common controller, 7 Lower order Controller, 30,50 …… I / O interface, 40 …… Station module, 31,41,51 …… I / O loop interface, 32,42,52…
… CPU link interface.

──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Fujio Sato 5-2-1 Omikacho, Hitachi City, Ibaraki Prefecture Inside the Omika Plant, Hitachi, Ltd. (72) Inventor Yoshio Tachi 5-2-2 Omikacho, Hitachi City, Ibaraki Prefecture No. 1 Inside the Omika Plant of Hitachi, Ltd. (56) References JP-A-58-68104 (JP, A) (58) Fields investigated (Int. Cl. ⁶ , DB name) G05B 9/02 G05B 23/02

Claims (2)

(57) [Claims] A common controller connected to a host computer via a transmission path; and a plurality of lower controllers connected to the common controller via a plurality of transmission paths.
The common controller and the lower controller are connected to one of the plurality of transmission paths, and an I / O loop interface for transmitting a common signal through the one of the plurality of transmission paths, and are connected to the plurality of transmission paths. And a CPU link interface for transmitting a signal to the other transmission path when an abnormality occurs, and the CPU is connected when the common controller goes down.
A controller system configured to transmit a signal between a normal CPU link interface among the link interfaces via the other transmission path. 2. A computer comprising: a common controller connected to the computer via a plurality of transmission paths; and a plurality of lower controllers connected to the common controller via the plurality of transmission paths. The controller and the lower-level controller are connected to one of the plurality of transmission paths, and an I / O loop interface that transmits a common signal through the one of the transmission paths, and are connected to the plurality of transmission paths. To transmit a signal to the other transmission line when an error occurs
A controller system having a CPU link interface and transmitting a signal between the normal CPU link interfaces among the CPU link interfaces via the other transmission path when the host computer goes down.