JP2930045B2 - Semiconductor integrated circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit having a plurality of analog circuits and a circuit for supplying the analog circuits with a reference voltage via a buffer amplifier.

[0002]

2. Description of the Related Art FIG. 3 shows a conventional semiconductor integrated circuit having a circuit for supplying a reference voltage generated by a reference voltage generating circuit to each analog circuit in order to operate a plurality of analog circuits. Circuits are used. In this circuit, n analog circuits A1 to An, a reference voltage generating circuit R for generating a reference voltage, and a reference voltage generated by the reference voltage generating circuit R are applied to each of the analog circuits A1 to An.
BUFF1 to BUFF
n. The plurality of analog circuits A1 to An
Is configured as, for example, an input / output unit for analog signals such as audio, and includes a gain amplifier, an active filter, a switched capacitor filter, an A / D converter, a D / A converter, and the like.

In this example, for example, regarding the analog circuit A1, the analog circuit A1 performs analog signal processing on an analog signal input from an analog input 1 by a circuit provided therein, and outputs the processed analog signal. 1 is output. Further, when an A / D converter is provided, it is converted into a digital signal and output to the output 1 as a digital signal. Similarly, the signal input to the input 1 is subjected to signal processing by a circuit provided therein and output to the analog output 2 as an analog signal.
These analog signals are all buffer amplifiers BUF
It is a signal based on the reference voltage supplied by Fl. The buffer amplifier BUFF1 is used for determining a reference potential of an analog signal in each analog circuit, a dynamic range of an A / D converter, a D / A converter, and the like. Then, in order to prevent the characteristic deterioration due to mutual interference between analog circuits via the reference potential, buffer amplifiers are provided one-to-one with respect to a plurality of analog circuits.

Further, the semiconductor integrated circuit has a power down control function. That is, the analog circuit A1
To a standby state for power down signal PDl
To PDn are selectively buffer amplifiers BUFF1 to BUFF
Fn and the corresponding analog circuits A1 to An, these buffer amplifiers BUFF1 to BUFF
n and the analog circuits A1 to An are controlled to one of the standby states. For example, power down signals PDl to PD
When n is at a high level, the buffer amplifiers BUFF1-BFF
UFFn and analog circuits A1 to An enter a normal operation state, and buffer amplifiers BUFFBUFFl to BUFF
n supplies a reference voltage for the analog signal. This reference voltage is required to be stable, and a signal component is not included in the reference voltage itself even when a signal is superimposed. Therefore, the buffer amplifier is required to have a wide band and low output impedance, and the power consumption is inevitably increased.

On the other hand, when the power-down signals PD1 to PDn go low, the buffer amplifiers BUFF1 to BUFF1
The FFn and the analog circuits A1 to An enter a standby state. In this state, the analog circuits A1 to An do not perform a signal processing operation, but operate only to output a reference voltage serving as a reference of an analog signal from an analog output. This is because it is necessary to supply a reference potential to another device connected to the analog output to stabilize the entire system. At this time, the buffer amplifiers BUFF1 to BUFF1 to BU
FFn operates in a low power consumption state. This is intended to reduce power consumption in the standby state because analog signals are not superimposed on the reference potential unlike the normal operation state, and the requirements for wideband and low output impedance are relaxed. is there.

[0006]

This conventional semiconductor integrated circuit has a problem that the power consumption is large in the standby state, that is, in the low power consumption state. That is, even when the entire semiconductor integrated circuit is in a standby state, it is necessary to always output the reference voltage to the analog output. Therefore, the buffer amplifier supplying the reference voltage to each analog circuit is in the low power consumption state. No, it always has to work. Therefore, power consumption increases in proportion to the number of the buffer amplifiers. For example, when the number of analog circuits and buffer amplifiers is ten (n = 10), even if the power consumption of the buffer amplifier in the low power consumption state is set to 1 mW, the power consumption of the buffer amplifier at that time is the same as that of the entire semiconductor integrated circuit. so,
1 mW × 10 = 10 mW, which is a value that cannot be ignored.

An object of the present invention is to provide a semiconductor integrated circuit in which power consumption by a buffer amplifier in a low power consumption state is reduced.

[0008]

According to the present invention, a plurality of analog circuits and a plurality of analog circuits corresponding to the respective analog circuits for supplying a first reference voltage to each of the analog circuits, each of which can operate normally. One buffer amplifier, a second buffer amplifier that unitarily supplies a second reference voltage to each of the analog circuits, the first reference voltage being required for the analog circuits. Switching means for switching each analog circuit between the first buffer amplifier and the second buffer amplifier based on a state and a second state is provided. The switching unit switches each of the analog circuits to a state in which the analog circuit is connected to the first buffer amplifier in the first state, which is a normal operation state, and switches each of the analog circuits in the second state, which is a standby state. The configuration is such that the state is switched to a state in which the analog circuit is connected to the second buffer amplifier. Further, the second buffer amplifier is configured as a low power consumption circuit required when each of the analog circuits is in a standby state. Further, the first
Can be switched between a normal power state and a non-power consumption state required for normal operation of each of the analog circuits. When the first state is set, the buffer amplifier is set to the normal power state. Sometimes, the power consumption state is set.

[0009]

Next, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a block circuit diagram of one embodiment of the present invention. In this figure, the same parts as those of the conventional configuration shown in FIG. 3 are denoted by the same reference numerals. That is, n
Analog circuits A1 to An, a reference voltage generation circuit R for generating a reference voltage, and a plurality of analog circuits A1 to An for supplying a reference voltage generated by the reference voltage generation circuit R to each of the analog circuits A1 to An. The same number of buffer amplifiers BUFF1-BUFF corresponding to the analog circuit on a one-to-one basis.
Fn. The plurality of analog circuits A1 to A
n is configured, for example, as an input / output unit for analog signals such as audio, and includes a gain amplifier, an active filter, a switched capacitor filter, an A / D converter, a D / A converter, and the like. It is assumed that the function of each analog circuit is the same as the configuration example of FIG.

On the other hand, each of the buffer amplifiers BUFF1-BUFF1-
BUFFn is configured to be switchable between two states as in the conventional configuration. Here, a normal state having sufficient capacity as a buffer and a function as a buffer are stopped, and the BUFFn is generated from a reference voltage generation circuit. It is configured to be able to switch to a power-saving state in which a reference voltage is not supplied.

Furthermore, a power-down buffer amplifier PD dedicated to power-down which is operated only in the standby state.
BUFF and this power-down buffer amplifier PDB
UFF is connected to each of the buffer amplifiers BUFF1-BUFFn.
And the same number of switches SW1 to SWn as the number of analog circuits and buffer amplifiers for switching to the analog circuits A1 to An. The output of the reference voltage generating circuit R is input to the power-down buffer amplifier PDBUFF. When the power-down buffer amplifier PDBUFF is operated, the analog circuits A1 to An are always in a standby state. It is configured with low power consumption, which is the required minimum output state.

Each of the changeover switches SW1 to SWn is composed of two N-channel transistors, and the first N-channel transistors NT11 to NT1n.
The power-down signal PD is input to the gate of the second N-channel transistors NT21 to NT2n.
Is entered via The outputs of the buffer amplifiers BUFF1-BUFFn, which are the first inputs, are input to the sources of the first N-channel transistors NT11-NT1n.
The output of the power-down buffer amplifier PDBUFF, which is the second input, is input to the source of NT2n. Further, the drains of the first and second N-channel transistors are connected in common, and the respective analog circuits A1
To An.

Here, each of the buffer amplifiers BUFFF1
To BUFFn have their respective inverting input terminals and output terminals connected to each other, and their outputs are connected to the respective changeover switches SW.
1 to SWn. The output of the power-down buffer amplifier PDBUFF is combined with each of the plurality of changeover switches SWl to SWn as a second input.

Next, the operation of the semiconductor integrated circuit will be described. Referring to FIG. 2, power down signals PD1 to PD1
When n is at the high level, it is in the normal operation state, and in the change-over switches SWl to SWn, the first N-channel transistors NT11 to NT1n are turned on, and the second N-channel transistors NT21 to NT2n are turned off. For this reason,
A plurality of buffer amplifiers BUFFl to BUFFn are connected to corresponding analog circuits A1 to An, respectively, and a reference voltage from a reference voltage generating circuit R is applied to each buffer amplifier BU.
Each analog circuit A1 to An via FF1 to BUFFn
Supplied to Each buffer amplifier BUFF1-BUFF
As for n, the normal operation in each analog circuit is ensured in order to output in a state having sufficient capacity as described above.

On the other hand, when the power-down signals PD1 to PDn become low level, the apparatus enters a standby state, and the changeover switch SW
1 to SWn, the second N-channel transistor NT2
1 to NT2n are turned on, and the first N-channel transistors NT11 to NT1n are turned off. For this reason, the reference potential generated by the reference voltage generating circuit R is changed from the power-down buffer amplifier PDBUFF to the changeover switches SW1 to SW1.
n, and is unitarily supplied to each of the analog circuits A1 to An. At this time, a plurality of buffer amplifiers BUFFl to
BUFFn is in a power-saving state, and the power consumption of these buffer amplifiers BUFF1 to BUFFn becomes zero.

Therefore, in this semiconductor integrated circuit, in the standby state, power down buffer amplifier PD
The power consumption of the BUFF is the power consumption of the entire circuit. For example, it is assumed that there are ten buffer amplifiers BUFFl to BUFFn (n = 10), a reference voltage is supplied to 10 blocks of analog circuits, and the power consumption of the power-down buffer amplifier PDBUFF is 1 mW. At this time,
The power consumption in the standby state, that is, at the time of power down, is one of the power consumption of the power down buffer amplifier PDBUFF.
mW, and this value is constant regardless of the number of buffer amplifiers. Therefore, in this circuit, the power consumption at the time of low power consumption in the standby state is 1/10 as compared with the conventional circuit of FIG.

[0017]

As described above, according to the present invention, the second buffer amplifier is provided as a dedicated power-down buffer amplifier for supplying a reference voltage for bringing a plurality of analog circuits into a standby state. , The second to enter the standby state
In this state, the reference voltage is supplied to each analog circuit via the second buffer amplifier, so that the power consumption of the circuit during standby can be significantly reduced.

[Brief description of the drawings]

FIG. 1 is a block circuit diagram of one embodiment of a semiconductor integrated circuit of the present invention.

FIG. 2 is a timing waveform chart for explaining the operation of the circuit of FIG. 1;

FIG. 3 is a block circuit diagram of an example of a conventional semiconductor integrated circuit.

[Explanation of symbols]

 A1 to An Analog circuit R Reference voltage generation circuit BUFF1 to BUFFn Buffer amplifier PDBUFF Buffer amplifier for power down SW1 to SWn Changeover switches NT11 to NT1n First N-channel transistors NT21 to NT2n Second N-channel transistors I1 to In Inverter

Claims (4)

(57) [Claims] A plurality of analog circuits; a plurality of first buffer amplifiers corresponding to the respective analog circuits for supplying a first reference voltage each of which can normally operate to the respective analog circuits; A second buffer amplifier that unitarily supplies a second reference voltage to which the analog circuit is placed in a standby state to each of the analog circuits, based on a first state and a second state required for the analog circuit; And a switching means for switching each of the analog circuits between the first buffer amplifier and the second buffer amplifier. 2. The switching means switches the analog circuits to a state in which the analog circuits are connected to the first buffer amplifier in the first state in a normal operation state, and the second state in a standby state. At the time of the above,
And switching to a state in which the buffer amplifier is connected to the buffer amplifier.
Semiconductor integrated circuit. 3. The semiconductor integrated circuit according to claim 2, wherein said second buffer amplifier is configured as a low power consumption circuit required when each of said analog circuits is in a standby state. 4. The first buffer amplifier is switchable between a normal power state and a non-power consumption state required for normal operation of each of the analog circuits, and operates in a normal power state in the first state. 4. The semiconductor integrated circuit according to claim 3, wherein said semiconductor integrated circuit is in a power-saving state in said second state.