JP2924482B2 - Semiconductor integrated circuit device - Google Patents
Semiconductor integrated circuit deviceInfo
- Publication number
- JP2924482B2 JP2924482B2 JP4221126A JP22112692A JP2924482B2 JP 2924482 B2 JP2924482 B2 JP 2924482B2 JP 4221126 A JP4221126 A JP 4221126A JP 22112692 A JP22112692 A JP 22112692A JP 2924482 B2 JP2924482 B2 JP 2924482B2
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- semiconductor integrated
- circuit device
- fuse element
- conductive film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Landscapes
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Semiconductor Memories (AREA)
Description
【0001】[0001]
【産業上の利用分野】本発明は冗長回路を有する半導体
集積回路装置に関し、特に冗長回路の使用の切り換えを
行うPROM素子としてレーザ照射で溶断するヒューズ
素子を用いた半導体集積回路装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit device having a redundant circuit, and more particularly to a semiconductor integrated circuit device using a fuse element which is blown by laser irradiation as a PROM element for switching use of the redundant circuit.
【0002】[0002]
【従来の技術】半導体集積回路装置において、冗長回路
を有して不良のメモリセルを冗長メモリセルに置き換え
るためにレーザ照射により溶断するヒューズ素子を設け
ることが一般的に行われている。このようなヒューズ素
子は、半導体チップの所定の層間絶縁膜を、図3に示す
ように、選択的に被覆するポリシリコン膜1などの両端
に一対の電極(金属配線層4−1,4−2)を設けたも
のであり、半導体集積回路装置をテストして、不良メモ
リセルの位置、不良メモリセル数を調査した後に、冗長
メモリセルを使用すれば全メモリセルが良品となる場合
に適当なヒューズ素子にレーザビームを照射して溶断
し、不良のアドレス番地を冗長アドレス番地に置き換え
冗長メモリセルにデータ書き込み、読み出し可能にする
という様にして用いられる。2. Description of the Related Art In a semiconductor integrated circuit device, a fuse element which has a redundant circuit and is blown by laser irradiation to replace a defective memory cell with a redundant memory cell is generally provided. As shown in FIG. 3, such a fuse element has a pair of electrodes (metal wiring layers 4-1 and 4-) on both ends of a polysilicon film 1 or the like that selectively covers a predetermined interlayer insulating film of a semiconductor chip. 2) is provided, and after testing the semiconductor integrated circuit device and investigating the position of the defective memory cell and the number of defective memory cells, if redundant memory cells are used, it is suitable when all the memory cells become non-defective. Such a fuse element is irradiated with a laser beam and blown, and a defective address is replaced with a redundant address, and data can be written to and read from a redundant memory cell.
【0003】このように、半導体集積回路装置のテスト
を行い不良のメモリセルを冗長メモリセルに置き換える
手法を用いて、製造上の歩留を上げる方法が一般的に行
われている。特にメモリセルの大容量化に伴い全メモリ
セルが不良なく出来る確率が低くなり、製造ラインの微
細なゴミの問題も考慮すると冗長メモリセルを半導体集
積回路装置に設ける方法が一般的になってきた。As described above, a method of increasing the production yield by using a method of testing a semiconductor integrated circuit device and replacing a defective memory cell with a redundant memory cell is generally performed. In particular, with the increase in the capacity of the memory cells, the probability that all the memory cells can be formed without a defect decreases, and the method of providing redundant memory cells in a semiconductor integrated circuit device has become common in view of the problem of minute dust on a manufacturing line. .
【0004】[0004]
【発明が解決しようとする課題】この従来の冗長回路の
使用のためのヒューズ素子は半導体集積回路装置に設け
られているだけで、もし、ヒューズ素子を切断するため
のレーザ・ビームの照射位置がずれて、本来切断すべき
ヒューズ素子が切断されなくても確認する方法がなく、
正しくヒューズ素子が切断されていれば良品となる半導
体集積回路装置が不良となってしまうという問題点があ
った。The fuse element for use of the conventional redundant circuit is provided only in the semiconductor integrated circuit device. If the irradiation position of the laser beam for cutting the fuse element is changed. deviation, there is no way to check even without the original cutting all-out fuse element is disconnected,
If the fuse element is cut correctly, there is a problem that a non-defective semiconductor integrated circuit device becomes defective.
【0005】[0005]
【課題を解決するための手段】本発明は、半導体チップ
の所定の層間絶縁膜に選択的に被着された第1の導電膜
の両端に一対の電極を設け、前記第1の導電膜の部分に
レーザビームを照射するための開口を有する保護膜で被
覆したヒューズ素子を有する冗長回路を備えた半導体集
積回路装置において、前記ヒューズ素子の第1の導電膜
に隣接して設けられた第2の導電膜と、前記第2の導電
膜の両端に設けられた一対のプロービングパッドとを有
するというものである。According to the present invention, a pair of electrodes are provided at both ends of a first conductive film selectively deposited on a predetermined interlayer insulating film of a semiconductor chip . Part
Cover with a protective film with an opening for laser beam irradiation
In a semiconductor integrated circuit device provided with a redundant circuit having a covered fuse element, a second conductive film provided adjacent to a first conductive film of the fuse element and both ends of the second conductive film are provided. And a pair of provided probing pads.
【0006】[0006]
【実施例】図1を参照すると本発明の第1の実施例で
は、複数のヒューズ素子(厚さ0.3μm,幅1.0μ
m,長さ4.0μmのストライプ状のポリシリコン膜
1,その両端に接続された金属配線層4−1,4−2か
らできている。)が4.0μmのピッチで設けられ、厚
さ0.3μm,幅1.0μmのポリシコン膜5がポリシ
リコン膜1の間を通って蛇行して設けられている。ポリ
シリコン膜5の両端にはプロービングパッド6,7が接
続されている。Referring to FIG. 1, in a first embodiment of the present invention, a plurality of fuse elements (thickness 0.3 μm, width 1.0 μm) are used.
It is made up of a stripe-shaped polysilicon film m, 4.0 μm long, and metal wiring layers 4-1 and 4-2 connected to both ends thereof. ) Are provided at a pitch of 4.0 μm, and a polysilicon film 5 having a thickness of 0.3 μm and a width of 1.0 μm is provided meandering between the polysilicon films 1. Probing pads 6 and 7 are connected to both ends of the polysilicon film 5.
【0007】半導体集積回路装置を電気的にテストを行
い不良メモリセルの数とその位置を調査し、不良アドレ
スを冗長回路に切り換えるめに適当なヒューズ素子のポ
リシリコン膜1をレーザ照射して溶断させることによっ
て不良メモリセルを冗長メモリセルに置き換える。2
は、ポリシリコン膜1を設けたのちに堆積される層間絶
縁膜、金属接続層4−1,4−2を覆う保護膜に設けら
れた開口でレーザ照射によってポリシリコン膜1を溶断
しやすくするために設けられている。3は、スルーホー
ルでポリシリコン膜1と金属配線層4−1,4−2を接
続するために開けてある。金属配線層4−1,4−2は
図示しない冗長回路へと接続されている。この時レーザ
ビームの照射位置がずれて、たとえば隣接する2つのヒ
ューズ素子のポリシリコン膜1の間にレーザビームが照
射されて本来切断すべきヒューズ素子が溶断されないこ
とがあってもポリシリコン膜5が溶断されるので、プロ
ービングパッド6と7と間に電気的に電圧を印加するこ
とによってレーザ・ビーム照射の位置ずれの有無を調べ
ることが可能となる。もしプロービングパッド6と7と
の間が開放であればレーザビームがずれてポリシリコン
膜5を溶断したのであるから再度レーザビームの位置合
わせを行い、再度レーザビームを照射しヒューズ素子の
切断を行えばよい。なおプロービングパッド6,7部に
は保護膜にそれぞれ開口8−6,8−7が設けられてい
る。The semiconductor integrated circuit device is electrically tested to investigate the number of defective memory cells and their locations, and to fuse the polysilicon film 1 of a suitable fuse element with a laser to switch a defective address to a redundant circuit. By doing so, the defective memory cells are replaced with redundant memory cells. 2
Means that the polysilicon film 1 is easily blown by laser irradiation at an opening provided in an interlayer insulating film deposited after providing the polysilicon film 1 and a protective film covering the metal connection layers 4-1 and 4-2. It is provided for. Reference numeral 3 denotes a through hole which is opened to connect the polysilicon film 1 to the metal wiring layers 4-1 and 4-2. The metal wiring layers 4-1 and 4-2 are connected to a redundant circuit (not shown). At this time, even if the irradiation position of the laser beam is shifted, for example, the laser beam is irradiated between the polysilicon films 1 of the two adjacent fuse elements and the fuse element which should be cut is not blown, the polysilicon film 5 may be cut. Is blown, it is possible to examine the presence / absence of the displacement of the laser beam irradiation by applying a voltage between the probing pads 6 and 7 electrically. If the space between the probing pads 6 and 7 is open, the laser beam is misaligned and the polysilicon film 5 is blown. Therefore, the laser beam is again positioned, and the fuse is cut by irradiating the laser beam again. Just do it. The probing pads 6 and 7 are provided with openings 8-6 and 8-7 in the protective film, respectively.
【0008】図2は本発明の第2の実施例を示す平面図
で、ヒューズ素子それぞれの両側にポリシリコン膜5と
プロービングパッド6,7からなる検知素子が設けられ
ている。1本のヒューズ素子の両側の検知素子のいずれ
か1組のプロービングパッドが開放であれば、その両側
のヒューズ素子のいずれかが溶断されていないことにな
るので、溶断されていないヒューズ素子の特定の精度が
良いという利点がある。FIG. 2 is a plan view showing a second embodiment of the present invention, in which a sensing element comprising a polysilicon film 5 and probing pads 6 and 7 is provided on both sides of each fuse element. If any one of the probing pads of the sensing elements on both sides of one fuse element is open, it means that one of the fuse elements on both sides is not blown. There is an advantage that the accuracy is good.
【0009】[0009]
【発明の効果】以上説明したように本発明は、不良メモ
リセルを冗長メモリセルに置き換えるプログラミング用
のヒューズ素子に隣接して第2の導電膜を配置し、その
両側の電気的導通をチェックすることによってヒューズ
素子溶断時のレーザビームの位置ずれによる置き換え不
良を発見し、再度レーザビームを照射することによって
正しく置き換えることを可能にし、冗長回路付きの半導
体集積回路装置の歩留りを改善できるという効果を有す
る。As described above, according to the present invention, the second conductive film is disposed adjacent to the programming fuse element for replacing a defective memory cell with a redundant memory cell, and the electrical conduction on both sides thereof is checked. In this way, it is possible to find a replacement failure due to a displacement of the laser beam when the fuse element is blown, and to perform the replacement correctly by irradiating the laser beam again, thereby improving the yield of the semiconductor integrated circuit device with the redundant circuit. Have.
【図1】本発明の第1の実施例を概略的に示す平面図で
ある。FIG. 1 is a plan view schematically showing a first embodiment of the present invention.
【図2】本発明の第2の実施例を概略的に示す平面図で
ある。FIG. 2 is a plan view schematically showing a second embodiment of the present invention.
【図3】従来例を概略的に示す平面図である。FIG. 3 is a plan view schematically showing a conventional example.
1 ポリシリコン膜 2 開口 3 スルーホール 4−1,4−2 金属配線層 5 ポリシリコン膜 6,7 プロービングパッド 8−6,8−7 開口 DESCRIPTION OF SYMBOLS 1 Polysilicon film 2 Opening 3 Through hole 4-1 and 4-2 Metal wiring layer 5 Polysilicon film 6,7 Probing pad 8-6,8-7 Opening
───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.6,DB名) H01L 27/102 H01L 21/66 H01L 21/82 H01L 27/10 ──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. 6 , DB name) H01L 27/102 H01L 21/66 H01L 21/82 H01L 27/10
Claims (1)
的に被着された第1の導電膜の両端に一対の電極を設
け、前記第1の導電膜の部分にレーザビームを照射する
ための開口を有する保護膜で被覆したヒューズ素子を有
する冗長回路を備えた半導体集積回路装置において、 前記ヒューズ素子の第1の導電膜に隣接して設けられた
第2の導電膜と、前記第2の導電膜の両端に設けられた
一対のプロービングパッドとを有することを特徴とする
半導体集積回路装置。1. A pair of electrodes are provided at both ends of a first conductive film selectively applied to a predetermined interlayer insulating film of a semiconductor chip, and a portion of the first conductive film is irradiated with a laser beam.
In the semiconductor integrated circuit device having a redundant circuit having a fuse element which is covered with a protective film having an opening for the second conductive film provided adjacent to the first conductive film of said fuse element, said first 2. A semiconductor integrated circuit device comprising: a pair of probing pads provided at both ends of two conductive films.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4221126A JP2924482B2 (en) | 1992-08-20 | 1992-08-20 | Semiconductor integrated circuit device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4221126A JP2924482B2 (en) | 1992-08-20 | 1992-08-20 | Semiconductor integrated circuit device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH0669444A JPH0669444A (en) | 1994-03-11 |
JP2924482B2 true JP2924482B2 (en) | 1999-07-26 |
Family
ID=16761873
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4221126A Expired - Lifetime JP2924482B2 (en) | 1992-08-20 | 1992-08-20 | Semiconductor integrated circuit device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2924482B2 (en) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3150113B2 (en) * | 1998-11-11 | 2001-03-26 | 日本電気アイシーマイコンシステム株式会社 | Semiconductor storage device |
KR100316716B1 (en) * | 1999-09-30 | 2001-12-12 | 윤종용 | Semiconductor memory device having a plurality of laser fuses |
KR20050011082A (en) * | 2003-07-21 | 2005-01-29 | 매그나칩 반도체 유한회사 | Semiconductor device with extension internal probing pad |
KR100545711B1 (en) | 2003-07-29 | 2006-01-24 | 주식회사 하이닉스반도체 | Reference voltage generator that can output various levels of reference voltage using fuse trimming |
-
1992
- 1992-08-20 JP JP4221126A patent/JP2924482B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH0669444A (en) | 1994-03-11 |
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