JP2921296B2 - Data compression recording device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data compression recording apparatus, and more particularly to a data compression recording apparatus using solid-state elements.

[0002]

2. Description of the Related Art A conventional recording apparatus records data by sequentially writing input data to an internal memory and reading the data as it is. The compression is performed before input to the recording device by a predetermined method, and is performed separately from recording.

[0003]

In this conventional recording apparatus, an external data compression and decompression apparatus is required for each type of input data, which makes the apparatus complicated and large, and it is difficult to secure reliability. There was a problem. Further, if an external compression device is not used, there is a problem that a large amount of input data can be handled only by limiting the amount of data that can be recorded or by limiting the size of the recording device. The present invention has been made to solve such a problem, and when recording a large amount of data on a recording device using a solid-state element, a general-purpose compression function is incorporated without adding a dedicated compression device to the outside. It is an object of the present invention to obtain a data compression and recording device for simplifying and reducing the size of the device.

[0004]

According to the present invention, there is provided a data compression and recording apparatus for recording transmission data such as PCM data or digital image data of the IRIG system, comprising: a ring buffer for temporarily recording input data; A compression information memory for storing a pattern obtained from an externally set pattern and a past learning result, a learning memory for storing a pattern obtained as a result of statistical processing of data being acquired, a pattern discriminating process, A determination circuit that performs a compression process; an arithmetic control circuit that arithmetically controls the compression information memory, the learning memory, and the determination circuit;
Comprising a memory for recording the determination result and the compressed data, the upper
The discrimination circuit applies the external setting to the data to be recorded.
It is set in advance according to the fixed pattern and the past learning result
Data and the statistical processing of the data being acquired.
Patterning discrimination using the extracted pattern,
The result of the discrimination and the compressed data patterned by the discrimination
The data is separately recorded in the memory to compress the recording data.

[0005]

According to the present invention, the data to be recorded, such as PCM data and digital image data of the IRIG system, is discriminated in a compressed pattern using a known setting pattern and a learning pattern obtained from input data, and the discrimination result is obtained. And the data compressed by the determination is recorded independently.

[0006]

FIG. 1 is a block diagram showing an embodiment of the present invention. In FIG. 1, 1 is a ring buffer for temporarily recording input data, 2 is a compressed information memory for storing a pattern set from the outside and a pattern obtained based on past learning results, and 3 is a currently obtained compression information memory. A learning memory for storing a pattern obtained as a result of the statistical processing of the data; 4 a discriminating circuit for discriminating and compressing the pattern; 5 a computation for controlling the compressed information memory 2 and the learning memory 3 and the discriminating circuit 4 control circuit, the 6 ₁ to 6 _n is a memory for recording the determination result and the compressed data.

[0007] Patterning discrimination is performed on the data to be recorded by using a pattern preset by an external input of a set pattern or a past learning result and a pattern obtained by statistically processing the data being acquired. The discrimination result and the patterned compressed data are recorded at respective set addresses to compress the recorded data.

Next, the operation of the embodiment shown in FIG. 1 will be described. First, input data is written into the ring buffer 1 in the order of input. The amount of data written in the ring buffer 1 is monitored by the arithmetic and control circuit 5, and when the amount reaches the specified amount, statistical processing or the like is performed, and a characteristic pattern is detected and stored in the learning memory 3. Also, the contents of which the characteristics of the input data are known in advance are written in the compression information memory 2 by external setting. Next, the data written in the ring buffer 1
Judge whether compression is possible using the patterns of the compression information memory 2 and the learning memory 3, and write the compressed recording data and the compression determination result separately to the memory 6. Then, the decompression of the compressed data is performed by performing the reverse process in the arithmetic and control circuit 5 and then output.

[0009]

As described above, the present invention provides an IRIG
The data to be recorded, such as PCM data and digital image data, is discriminated in a compressed pattern using a known setting pattern and a learning pattern obtained from the input data. Since it is recorded independently, it has the effect of reducing the amount of recorded data by compressing the recorded data,
Further, there is an effect that a general-purpose compression function is built in without adding a dedicated compression device to the outside, and the device can be simplified and reduced in size.

[Brief description of the drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention.

[Explanation of symbols]

1 ring buffer 2 compressed information memory 3 learning memory 4 discriminating circuit 5 arithmetic control circuit 6 ₁ to 6 _n memory

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁶ , DB name) H03M 7/30 H04N 5/92 H04N 7/24 G11B 20/10 301

Claims (1)

(57) [Claims] An apparatus for recording transmission data such as PCM data or digital image data of the IRIG system,
A ring buffer for temporarily recording input data, a compression information memory for storing a pattern obtained from an externally set pattern and a past learning result,
A learning memory for storing a pattern obtained as a result of the statistical processing of the data being acquired; a discriminating circuit for performing discrimination processing and compression processing; and arithmetically controlling the compression information memory, the learning memory, and the discrimination circuit. a calculation control circuit, comprising a memory for recording the determination result and the compressed data, the determination circuit preconfigured pattern as well as the acquisition of the setting pattern N'ya the past learning result from the external to the data to be recorded The patterning discrimination is performed using the pattern extracted by the statistical processing of the data , and the discrimination result and the compressed data patterned by the discrimination are separately recorded in the memory so that the recording data is compressed. A data compression recording device characterized in that: