JP2915234B2 - Power steering control device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power steering control device for assisting a steering device of a vehicle with the rotational force of an electric motor.

[0002]

2. Description of the Related Art Conventionally, for example, Japanese Patent Application Laid-Open
Japanese Unexamined Patent Publication No. Hei 2-249762 ". This
According to the prior art , the conventional electric power steering system controls the driving direction of an electric motor (hereinafter, referred to as a motor) that controls a steering force based on a steering torque input to a steering system or a signal after the phase compensation of the steering torque. And the output torque are calculated and determined by a calculation unit using a microcomputer constituting the system.

However, even in a system using a microcomputer as an arithmetic unit, if a failure of an output unit of the arithmetic unit, a runaway of arithmetic software, or a steady failure of an arithmetic output occurs, the system is provided in the arithmetic unit. With the failure detection function provided by a single microcomputer, it is difficult to reliably detect failures due to the load on software, and there is a difficulty in ensuring system safety.

For this reason, the conventional system comprises a first arithmetic unit for calculating the motor driving direction based on the steering torque signal or the signal after the phase compensation of the steering torque signal, and a similar arithmetic operation to the first arithmetic unit to perform the motor operation. A second arithmetic unit for determining the driving direction is provided, and when the motor driving directions determined by the first and second arithmetic units match, driving of the motor in the calculated driving direction is permitted. Was.

[0005]

As described above, the conventional electric power steering system permits the driving of the motor in the driving direction when the driving directions of the motors calculated by the respective arithmetic units coincide with each other. Was. However, if there is a difference in the operation time between the operation units, the response in the motor drive control is hindered. That is, for example, when the driving direction of the motor is switched at the time of switching and steering of the vehicle, the output of the motor is lost and the steering feeling is adversely affected.

[0006] Therefore, in order to eliminate the above-mentioned adverse effects, the performance of each arithmetic unit for calculating the motor driving direction,
It is necessary to make the operation speed and the output period of the operation result equal. However, when it is necessary to use two arithmetic units, if an expensive arithmetic unit is used to maintain the performance of the arithmetic unit or the like, the two units must use expensive arithmetic units, so that the entire system is expensive. There was a problem that it became something.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problems, and it is possible to reduce the reliability even when the driving control of a steering force control motor is performed using two arithmetic units having different performances. It is an object to obtain an inexpensive power steering control device capable of performing steering force control without any problem.

[0008]

A power steering control device according to the present invention calculates and outputs drive control information of an electric motor for controlling a steering force of a steering wheel based on drive information of a vehicle input from outside. And a main processing unit and a sub-processing unit for performing mutual failure diagnosis and device failure diagnosis based on the calculation result, and outputting a drive signal to the electric motor based on the drive control information output from the main processing unit and the sub-processing unit. Motor drive, and the drive of the motor drive
And a blocking means for blocking the control information, the sub calculation section
Receives the drive control information output from the main processing unit.
Based on the reception cycle and the drive control information.
If a failure is determined by determining
Stops the level inversion operation of the periodic signal output to the main arithmetic unit.
While the main processing unit outputs to the motor drive unit.
The cut-off means to cut off the drive control information
Operate, the main processing unit is input from the sub-processing unit
Judgment of failure based on the presence or absence of level switching of the periodic signal
If it is determined that a failure has occurred, the sub-operation unit
And stopping the output of the drive control information to the motor drive unit.
While the sub-operation unit outputs to the motor drive unit.
The cut-off means to cut off the drive control information
To make it work .

[0009]

In the power steering control device according to the present invention, the main processing unit and the sub-processing unit calculate the drive control information of the electric motor that controls the steering force of the steering wheel, monitor the operation of the other processing unit, and perform the operation of the other processing unit. reliability of the control operation can be improved since it is possible to thus stop the self-calculating section <br/> the steering control by mating arithmetic unit when an abnormality is detected in the operation parts

[0010]

[Embodiment 1] An embodiment of the present invention will be described below with reference to the drawings. FIG.
FIG. 1 is a block diagram illustrating an overall configuration of a power steering control device according to the present embodiment. In the figure, 1 is a CPU
And a control unit composed of a peripheral circuit, the control unit 1 is a steering torque signal S _T inputted Te <br/> through Louis interface circuit to be described later from the torque sensor 2 installed on a vehicle, a vehicle speed sensor vehicle speed signal S _V inputted through later <br/> be Louis interface circuit than 3
To control the driving current and the driving direction (right or left rotation) of the motor 4 for controlling the steering force of the steering wheel (not shown).

[0011] The control unit 1, the power of the motor 4 based on the steering torque signal _{S T} and the vehicle speed signal _{S V} O
A power command signal S _{C for} N / OFF command, a driving direction and a driving current value of the motor 4 are calculated, and a right driving direction signal S _R ,
Left drive direction signal _{S L,} the right drive current signal _{S IR} by the pulse width modulated signal, a main CPU100 as a main arithmetic unit which outputs the left driving current signal _{S IL,} the main CPU
Output from 100 the right driving direction signal _{S R,} and input via the left drive direction signal _{S L} and the power command signal _{S C} data bus 104A, right drive start signal _{S KR,} left drive start signal _{S KL,} power control a sub CPU101 as sub calculation unit for converting the signal _{S S,} to convert the sensor output which is input from the torque sensor 2 to the steering torque signal _{S T,} the main CPU through the data bus 104 and sub CP
An interface circuit 102 for outputting to the U101, to convert the sensor output which is input from the vehicle speed sensor 3 to the vehicle speed signal _{S V,} the main CPU100 through the data bus 104
And interface circuit 1 for outputting to sub CPU 101
03 and each CPU 1 after stabilizing a DC voltage supplied from a battery (not shown) through a fuse to a constant voltage.
And a constant voltage circuit 105 for supplying the voltage to the constant voltage circuit 101 and the constant voltage circuit 101.
The sub CPU101 situ main CPU 100 right drive direction signal outputted from the _{S R,} the left drive direction signal _{S L} and the power command signal _{S C} is input via the data bus 104A,
Since the right drive start signal S _KR , the left drive start signal S _KL , and the power control signal S _S are converted, a signal having lower processing performance than the main CPU 100 may be used.

Further, the control unit 1 includes a motor power supply circuit 105 for supplying power to the motor 4 through an H-type bridge circuit, which will be described later, and a motor power supply circuit 10.
5 whose drains are commonly connected to the power supply voltage output terminal
ET (Q1), (Q2) and each FET (Q1), (Q2)
The drains are respectively connected to the sources of the FETs, and the FETs (Q3) and (Q4) are grounded.
And a type bridge circuit 106. In addition, FET (Q1)
Between the source of the FET and the drain of the FET (Q3) and the FE
Each armature terminal (not shown) of the motor 4 is connected between a connection portion between a source of T (Q2) and a drain of the FET (Q4). Furthermore, the control unit 1 is FE
Each of the gates of T (Q1) and (Q2) has a main C
A right driving current signal S _IR and a left driving current signal S _IL output from the PU 100 through an AND circuit described later are output, and the right driving direction output from the main CPU 100 to each gate of the FETs (Q3) and (Q4). signal S _R, a motor drive circuit 107 for outputting a leftward drive direction signal S _L,
Right drive current signal S _IR output from main CPU 100
Is input to one input terminal, and the other input terminal
PU101 right driving current signal S _IR from the motor driving circuit 107 when the high level of the right drive start signal S _KR is input
And a left drive current signal S _IL output from the main CPU 100 is input to one input terminal, and a high-level left drive start signal S _KL is input from the sub CPU 101 to the other input terminal. sometimes the motor driving circuit 107 and aND circuit 109 which outputs a left drive current signal S _IL, motor power when the power control signal S _S at the high level is input from the power command signal S _C and sub CPU101 of high level from the main CPU100 Supply circuit 105
And an AND circuit 110 for outputting a power supply signal _SD . Here, the motor drive circuit 107, the AND circuits 108, 109, 110, and the FETs (Q1) to (Q4) constitute a motor drive unit and also constitute a part of a peripheral circuit.

The main CPU 100 and the sub CPU 10
1, mutual fault diagnosis, the steering torque signal inputted through an interface circuit 102 and 103 S _T, the torque sensor 2 and processes the vehicle speed signal S _V, the fault diagnosis of the vehicle speed sensor 3 performs through processing. Sub CPU 1 described here
The mutual diagnosis of 01 means that the driving direction signal of the motor 4 calculated by the sub CPU 101 itself is compared with the driving direction signal output from the main CPU 100, and the difference between both driving signals continues for 0.1 second or more. First, a failure of the main CPU 100 is determined.

If the main CPU 100 does not find any abnormality as a result of the failure diagnosis, the transmission trigger signal T
To the sub CPU 101 as a signal for data transmission,
Then the transmission through the power command signal S _C, and the right driving direction signal S _R or left drive direction signal S _L data bus 104A as motor output data to the sub CPU 101. However, if the abnormality in the fault diagnosis result was observed to stop sending motor output data, together to recognize the abnormality in the sub-CPU 101, the power command signal S _C to a low level, and the right drive to the motor drive circuit 107 current signal S _IR or left drive current signal S _IL, stops the output of the right driving direction signal S _R or left drive direction signal S _L.

[0015] The sub CPU101 is the fault diagnosis result, when the abnormality is observed for example 1 calculation cycle per
A periodic signal P repeating high and low levels is transmitted to the main CPU100, the power control signal S _S to the input terminal of the AND circuit 110, also one of the right drive start signal S _KR or left drive start signal S _KL and The signal is output to the input terminal of the circuit 108 or the AND circuit 109. Further, when an abnormality is found as a result of the failure diagnosis, the transmission of the periodic signal P to the main CPU 100 is stopped, and the main CPU 100 is made aware of the occurrence of the abnormality. Main CPU 100 and sub CPU
Have transmission / reception means and signal blocking means.

[0016] Next, the operation of the embodiment according to the flowchart of FIGS. First, the main CPU 1
00, it is assumed that the sub CPU 101 has not detected any failure or abnormality. The main CPU100 is a steering torque signal S _T from the torque sensor 2 as an input unit through an interface circuit 102 and 103, also a vehicle speed sensor 3
To enter more speed signal S _V (step S200, S2
01).

The current value becomes a pulse width modulation signal based on the steering torque signal inputted S _T and the vehicle speed signal S _V for example right driving current signal S _{IR (signal} of the pulse width signal Deyute
Right drive direction signal I depend ratio) and the motor 4 S _R
Is calculated as a motor output value (step S202).
Next, an operation cycle signal P indicating whether or not there is a failure is read from the storage unit (not shown) from the sub CPU 101 (step S203), and failure diagnosis processing is performed (step S20).
4). Then, the result of the failure diagnosis is determined and the sub CPU 10
1 determines whether or not any failure has occurred (S2).
05). If it is determined that fault-free than the fault diagnosis result, in the sub-power command signal through the data bus 104A after transmitting the transmission trigger signal T to CPU 101 S _C, based on the driving direction operation result right drive direction signal S _R Motor The output data is transmitted to the sub CPU 101 (step S206).

After transmitting the motor output data, the main CPU 100 executes an AND circuit 110 based on the determination that there is no failure.
A high-level power supply command signal S _C is output to one of the input terminals (step S207), and a motor drive signal including a right drive current signal S _IR and a drive direction signal S _R is output (step S208). At this time, FET for controlling the rotation of the motor 4 to the right (Q1), it is necessary to operate ON the (Q4). Therefore, it outputs a right driving current signal S _IR to one input terminal of the AND circuit 108, and further outputs a right drive direction signal S _R to the motor drive circuit 107 (step S208).

On the other hand, the sub CPU 101 is also the main CPU 1
00 process and the steering torque signal S _T through the interface circuit 102 from the torque sensor 2 in parallel, and also inputs the vehicle speed signal S _V through an interface circuit 103 from the vehicle speed sensor 3 (step S300, S301).

[0020] calculates a driving direction of the motor based on the input steering torque signal _{S T} and the vehicle speed signal _{S V} (step S302). Next, the motor output data transmitted from the main CPU 100 is read from a storage unit (not shown) (step S303). The transmission cycle of the received motor output data, that is, whether the data is transmitted in accordance with the calculation cycle of the main CPU 100, is checked.
00 with diagnoses whether a fault is not in, the transmitted right came driving direction signal S _R and the right driving direction signal calculated in the self
Then, a failure diagnosis of both arithmetic processings is also performed (step S304). It is determined whether an abnormality has occurred based on the result of the failure diagnosis (step S305). In this case, if normal is determined (to a low level when high level, for example) inverts the output level of the computation cycle signal P to the main CPU100 continues until the next calculation cycle of self (step S306).

When the operation cycle signal P is transmitted, a high-level power control signal S _S for permitting power supply to the motor by the motor power supply circuit 105 is supplied, and the power command signal S _C is supplied to one input terminal. Is output to the other input terminal of the AND circuit 110 which is input to the input terminal (step S30).
7). AND circuit 110 the power supply signal S _D of the high level output to the motor power supply circuit 105 in the power control signal S _S is input, and starts its operation. Furthermore,
The sub CPU 101 sends a signal from the main CPU 100 to allow the main CPU 100 to output a motor drive current.
Based on the received motor output data, and outputs it to the other input terminal of the AND circuit 108 right driving current S _IR is inputted to one input terminal of the right drive start signal S _KR for rotating the motor in the right direction ( Step S308).

The output result, the motor drive circuit 107 on the right drive current signal S _IR having a predetermined duty ratio which is output from the AND circuit 108 to the gate of the FET (Q1),
And outputs the right driving direction signal S _R which is outputted from the main CPU100 to the gate of the FET (Q4). FET (Q
1) repeats ON, the OFF operation at a cycle corresponding to the duty ratio of the right driving current signal S _IR. Further FET (Q4) is maintained between the ON state where the right drive direction signal S _R is input. Therefore, the current from the motor power supply circuit 105 is F
ET (Q1) flows from the drain through the source to the other armature terminal from one armature terminal of the motor 4 through the source.
The current flows from the drain of the FET (Q4) to the ground through the source.

The greater the duty ratio of the right driving current signal S _IR input to the gate of the FET (Q1), ON period of the pulse signal becomes long. Therefore, the operation time of the FET (Q1) becomes longer, and a large amount of current flows into the motor 4. Thus it is possible to control the torque of the motor by varying the duty ratio of the right driving current signal S _IR. As is apparent from the above operation, the main CPU 100 and the sub CP
When no failure is determined as a result of the failure diagnosis by U101, the motor 4
Since the operation of the steering wheel is permitted, the reliability of the steering force control is improved.

Next, a description will be given of a processing method of the sub CPU 101 when the main CPU 100 determines that some failure has occurred. Now, the main CPU10
0 in the failure determination process of step S205
If a failure is determined based on the result of the failure diagnosis S204 and the occurrence of an abnormality is recognized, transmission of the motor output data calculated in step S202 to the sub CPU 101 is stopped (step S209). The main CPU100 is the transmission of the motor output data is continued for more than a calculation cycle of self-stops transmitting the failure to the sub CPU101 by.

After the data transmission stop processing, the main CPU
100 stops the power command signal S _C which has been output to the AND circuit 110 in order to maintain the reliability of the steering force control, to stop the power supply to the motor 4 (step S210).
Further, the main CPU 100 stops the right drive direction signal S _R output to the motor drive circuit 107 following the stop of the right drive current signal S _IR output to the AND circuit 108, and outputs the drive current to the motor 4. Stop (step S21)
1).

On the other hand, the sub CPU 101 determines in step S30
In the motor output data receiving process of No. 3, the motor output data is read from a storage unit (not shown) in order to confirm the contents of the motor output data (step S303), and is sent to a failure diagnosis process (step S304). As a result of the failure diagnosis, if it is detected that the motor output data is not transmitted, it is determined that a failure has occurred and that some abnormality has occurred on the main CPU 100 side (step S30).
5).

Next, the sub CPU 101 changes the level of the operation cycle signal P to a low level or a high level in order to inform the main CPU 100 that the control of the steering force is stopped by itself.
And sends it to the main CPU 100. afterwards,
To the motor power supply stop and the motor drive output stop processing by the main CPU100 made more reliable, perform motor power supply stop process to stop the power supply control signal S _S which has been output to the AND circuit 110 (step S31
0) and the right drive start signal _SKR output to the AND circuit 108 is stopped to prohibit the output of the drive current to the motor 4 (step S311).

Next, a description will be given of a processing method for dealing with the main CPU 100 when the sub CPU 101 determines any failure. Now, the sub CPU 101
Determines any failure in the failure determination processing in step S305 and recognizes the occurrence of an abnormality,
Main CPU 1 fixed at low level or high level
Then, transmission to 00 is stopped (step S309). By stopping the transmission of the calculation cycle signal P, the main CPU 101
To the sub CPU 101 side.

[0029] After the transmission stop process of the computation cycle signal P, sub CPU101 stops the power control signal S _S which has been output to the AND circuit 110 in order to maintain the reliability of the steering force control, power supply to the motor 4 Stop supply (Step S3)
10). Further, the sub CPU 101 stops the right drive start signal _SKR output to the AND circuit 108, and
Prohibit motor drive output by U100 (step S
311).

On the other hand, the main CPU 100 determines in step S2
In the computation period signal P receiving process of 03, the computation period signal P is read from a storage unit (not shown) in order to confirm the contents of the computation period signal P (step S203), and is sent to a failure diagnosis process (step S204). As a result of this failure diagnosis,
If it is detected that the calculation cycle signal P has not been transmitted, it is determined that a failure has occurred and it is determined that some abnormality has occurred on the side of the sub CPU 101 (step S205).

Next, the main CPU 100 stops transmitting the motor output data in order to inform the sub CPU 101 that the control of the steering force is also stopped by itself (step S20).
9). Thereafter, in order to the motor power supply stop and the motor drive output stop processing by the sub CPU101 and more reliable, it stops the power supply to the motor 4 to stop the power command signal S _C which has been output to the AND circuit 110 (Step S210). Further, the main CPU 100 stops the right drive direction signal S _R output to the motor drive circuit 107 following the stop of the right drive current signal S _IR output to the AND circuit 108, and outputs the drive current to the motor 4. It stops (step S211).

As it is apparent from the above description, for example, even when the main CPU100 stops detecting the steering force control failure or the result many like the fault diagnosis, the sub CPU101 side conveyed to the fault detection However, by performing the steering force control stop processing, the main CPU 100
Stop processing up for it steering force control stopping processing even incomplete due can be perfected.

[0033]

As described above, according to the present invention, the drive control information of the electric motor for controlling the steering force of the steering wheel is calculated and output based on the drive information of the vehicle input from the outside, and the calculation result is obtained. A main operation unit and a sub-operation unit for performing mutual failure diagnosis and device failure diagnosis; and a motor drive unit for outputting a drive signal to the electric motor based on the drive control information output from the main operation unit and the sub-operation unit. And this
A blocking unit for blocking the drive control information of the motor drive unit , wherein the sub-calculation unit is output from the main calculation unit
Receiving the drive control information, the reception cycle and the
Failure is determined based on the drive control information and it is a failure
Is determined, the periodic signal output to the main arithmetic unit
Stops the level inversion operation of
The drive control information output to the motor drive unit is shut off.
Operating the shut-off means so that the main processing unit
Whether the level of the periodic signal input from the sub-operation unit is switched
If a failure is determined based on nothing and a failure is determined
In this case, the drive to the sub-operation unit and the motor drive unit is performed.
Output of dynamic control information is stopped, and
The drive control information output to the motor drive unit is shut off.
In order to operate the blocking means as much as possible, the main
As a result of the diagnosis, any failure is detected and the steering force control is stopped.
Sub-operation unit that was notified of the failure detection even if
However, a failure was caused by performing the steering force control stop processing.
Even if the steering force control stop processing by the main processing unit is incomplete
There is an effect that the stop processing can be completed to compensate for this.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of an embodiment of a power steering control device according to the present invention.

FIG. 2 is a flowchart illustrating an operation of a main CPU according to the present embodiment.

FIG. 3 is a flowchart illustrating an operation of a sub CPU according to the present embodiment.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Control unit 2 Torque sensor 3 Vehicle speed sensor 4 Motor 100 Main CPU 101 Sub CPU 108-109 AND circuit 105 Motor power supply circuit Q1-Q4 FET

Continuation of the front page (56) References JP-A-4-41960 (JP, A) JP-A-5-97042 (JP, A) JP-A-2-249762 (JP, A) JP-A-1-267767 (JP) , A) (58) Field surveyed (Int.Cl. ⁶ , DB name) B62D 5/04

Claims (1)

(57) [Claims] The present invention calculates and outputs drive control information of a motor for controlling a steering force of a steering wheel based on drive information of a vehicle input from the outside, and performs mutual failure diagnosis and device failure diagnosis based on the calculation result. A main operation unit and a sub operation unit for performing the above-mentioned operations, a motor drive unit for outputting a drive signal to the electric motor based on the drive control information output from the main operation unit and the sub operation unit, and the drive control of the electric motor drive unit information
Interception means for intercepting the data , and the sub-operation unit
Upon receiving the drive control information output from the arithmetic unit,
A failure is determined based on the reception cycle of the
The main operation
Stops the level inversion operation of the periodic signal output to the
Before the main processing unit outputs to the motor driving unit.
Operating the blocking means to block the drive control information,
The main operation unit is configured to perform the cycle input from the sub-operation unit.
Failure is determined by the presence or absence of signal level switching.
If it is determined that the sub-operation unit and the
Stopping the output of the drive control information to the motivation drive unit
Before the sub-operation unit outputs to the motor drive unit.
A power steering control device for operating the shutoff means to shut off the drive control information .