JP2894270B2 - Flicker reduction circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a flicker reduction circuit, and more particularly to a flicker reduction circuit of a terminal device for superimposing character data and graphic data on a display unit.

[0002]

2. Description of the Related Art FIG. 11 is a block diagram showing an example of a terminal device to which an example of a conventional flicker reduction circuit is applied. In the figure, character data and graphic data which are transmitted from a higher-level device (not shown) in an interactive manner with an interactive device 61 are encoded by a predetermined encoding method.
Is supplied to the data processing unit 60 via the. And decrypted here, and then supplied to the display processing unit 63. The display processing unit 63 performs a process for displaying the input decoded data, and inputs the decoded data to the interlace conversion unit 65 via the non-interlace vertical low-pass filter 64. The vertical low-pass filter 64 is a filter that passes low-frequency components of the spatial frequency in the vertical direction of the screen.

[0003] An interlace conversion unit 65 converts non-interlaced decoded data into data displayed in 2: 1 interlace and supplies the data to an NTSC encoder 66. The NTSC encoder 66 performs balanced modulation of the chrominance signal in the decoded data of the input character data and graphic data, and performs band sharing multiplexing on the high frequency region of the luminance signal to perform N modulation.
The signal is converted into a composite signal conforming to the TSC system and supplied to the display unit 67 to be displayed in color on the screen.

Here, in the display section 67 which performs display by the 2: 1 interlace display method, as is well known, each scanning line is refreshed every frame period (for example, 30 seconds). Bright spots flicker
Is generated. However, the adjacent scanning lines actually overlap each other, and in the NTSC television system, when the luminance of the scanning line of one of the two adjacent scanning lines becomes the lowest, the scanning of the other field is performed. Since the frequency relationship is set so that the luminance of the line is the highest, the mutual luminance is interpolated, and the occurrence of flicker is not so noticeable. However, in the case of a single horizontal line, there is no bright spot on an adjacent scanning line, so that flicker is noticeable. The horizontal single line is particularly large in the character, and the character often has little correlation with the adjacent scanning line, so that the character is noticeably flickered.
Therefore, in the terminal device shown in FIG. 11, a vertical low-pass filter 64 is provided in order to reduce flicker generated at the time of displaying a character, and a high-frequency component in the vertical direction is removed.

[0005]

In the above conventional circuit,
All data to be displayed, such as graphic data other than character data, are input to the vertical low-pass filter 64, and high-frequency components of the spatial frequency in the vertical direction are removed. But,
Since graphic data other than characters and the like generally have a correlation with adjacent scanning lines, as described above, luminances of bright points of adjacent scanning lines mutually interpolate, and the occurrence of flicker is not so noticeable. Rather, in the case of graphic data other than characters, the vertical low-pass filter 64 removes the high-frequency components in the vertical direction, so that the resolution of the vertical image deteriorates more.

[0006] The present invention has been made in view of the above points,
An object of the present invention is to provide a flicker reduction circuit capable of reducing flicker in a character display area and improving resolution of an area other than the character display area.

[0007]

In order to achieve the above object, the present invention decodes input data, and superimposes character data and graphic data to generate data to be displayed on a display screen. A data processing unit that detects a character area in which character data is displayed, a display processing unit that outputs output data of the data processing unit as data of a non-interlaced display method, and a space in the screen vertical direction of output data of the display processing unit. A vertical low-pass filter that passes low-frequency components, and is detected by the data processing unit.
Descriptor that stores character area information and display processing
Whether the data output from the section is in the character area
Judge from the output character area information of the descriptor,
Character area judgment to set a flag when the data is within the area
Based on the output flag of the character area determination unit, the output data of the vertical low-pass filter is selected for the data of the area determined as the character area, and the data of the area determined as the area other than the character area is displayed. Select output data
A configuration having a changeover switch , an interlace conversion unit that converts data selected by the changeover switch into data of a 2: 1 interlace display system, and an encoder that converts output data of the interlace conversion unit into a video signal of a predetermined television system It is what it was.

In the present invention, when input character data and graphic data are superimposed and displayed, the output data of the vertical low-pass filter is selected in the character data area, and the vertical low-pass filter is output in the area other than the character data. Since the output data of the display processing unit, which is the input data, is selected, data that has not passed through the vertical low-pass filter in a region other than the character region is converted into a video signal and then displayed on the display unit. .

[0009]

Next, an embodiment of the present invention will be described. FIG. 1 is a block diagram showing a configuration of a terminal device provided with an embodiment of a flicker reduction circuit according to the present invention. As shown in the figure, a data processing unit 10, a dialogue device 11, a line control unit 12, a display processing unit 13, a vertical low-pass filter 14, a delay unit 15, a changeover switch 16, a descriptor 17, a character area determination unit 18, an interlace It comprises a conversion unit 19, an NTSC decoder 20, and a display unit 21.

The line control unit 12 is connected to an information center (not shown) via the telephone line 22 and performs interactive data communication with the interactive device 11. Display unit 21 of this device
Then, as shown in FIG. 2, the character information frame 30 and the graphic information frame 31 are superimposed on the display screen 3.
2 is displayed.

Next, the operation of this embodiment will be described. In the figure, received data such as character data and graphic data, which are input to the data processing unit 10 through the telephone line 22 and the line control unit 12, respectively, and are encoded by different encoding systems, are decoded here. The data is superimposed as shown in FIG. 2 and input to the display processing unit 13 as data to be displayed on the display screen.

As shown in FIG. 3, the display processing unit 13 supplies the input data to the vertical low-pass filter 14 and the delay unit 15 as non-interlaced data that is sequentially scanned from the upper part to the lower part of the screen.

The vertical low-pass filter 14 is shown in FIG.
This is a known filter that passes low-frequency components equal to or lower than a predetermined frequency among spatial frequency components in the vertical direction of the screen, similarly to the low-pass filter 64 in the vertical direction. The delay unit 15 delays the input data by the same time as the delay time due to the processing operation by the vertical low-pass filter 14 and performs time alignment with the output data of the vertical low-pass filter 14.

On the other hand, in parallel with the decoding of the input data, the data processing unit 10
A rectangular area 40 in which character data is displayed is detected, and information on a start point 41 and an end point 42 of the rectangular area 40 is obtained. As shown in FIG. 5, the data processing unit 10 considers the display screen in a coordinate system in which the horizontal direction is the X axis and the vertical direction is the Y axis, and the coordinates of the start point 41 (X _s , Y _s ) and the coordinates of the end point 42 (X _e
, Y _e ) together (X _s , Y _s , X _e , Y
and outputs it to the descriptor 17 _e) in ascending order of _{X s.} The descriptor 17 stores the input coordinate data and supplies it to the character area determination unit 18.

FIG. 6 is a block diagram showing an example of the character area determining section 18. As shown in FIG. This character area determination unit 18
0, a selector 51, line memories 52, 53, 54 and a selector 55. The coordinate data input via the input terminal I is supplied to the sequencer 50. The sequencer 50 controls the selectors 51 and 55 based on the input coordinate data according to the flowchart shown in FIG.

[0016] That is, first, the coordinate data of the head that is input _{(X s, Y s, X} e, Y e) read (Step 6
1), of which the start point of the Y-coordinate value Y _s is determined whether larger than the screen size (step 62), if it is within the screen size, the current lines (scanning lines), the starting point of the rectangular area Y coordinate value Y either it is whether the decision is the line between the _s and the end point of the Y-coordinate value Y _e (step 63).

[0017] When the current line is a line between Y _s and Y _e, that is, when a line in the rectangular region, while the flag from the X-coordinate value X _s of the start point to the X-coordinate values X _e of the end point (Step 64). Subsequently, the following coordinate data _{(X s, Y s, X} e, Y e) reading (step 65),
The process returns to step 62. If it is determined in step 62 that the line is larger than the screen size, it cannot be displayed on the display screen. If it is determined in step 63 that the current line is not a line in the rectangular area, data other than characters is displayed. The process ends immediately.

The sequencer 5 of the character area determination section 18
0 is the selector 51 and 52 based on the above processing result.
And the first line memory 52 as shown in FIG.
Is written in the second line memory 53 through the selector 51, and the third line memory 5
The flag already written in No. 4 is read and output via the selector 55 (step 71).

Next, a flag is written into the first line memory 52 through the selector 51, and the second line memory 5
From 3, the previously written flag is read and output via the selector 55, and the third line memory 54 is cleared (step 72). Subsequently, the sequencer 50 reads the previously written flag from the first line memory 52 and outputs it through the selector 55, clears the second line memory 53, and stores the next line in the third line memory 54. The flag is written (step 73). Next, the process returns to step 71 again. In this way, the above operation is repeated cyclically for each line. The output flag of the selector 55 is applied to the changeover switch 16 of FIG. 1 as a changeover signal.

Returning to FIG. 1 again, the changeover switch 16 selects the output data of the vertical low-pass filter 14 during the period when the above-mentioned flag is output from the character area judging section 18, and selects the output data during the period when the flag is not output. The output data of the delay unit 15 is selected. That is, the changeover switch 16 selects the character data output from the vertical low-pass filter 14 in the character area, and selects the output data of the delay unit 15 not passing through the vertical low-pass filter 14 in the area other than the character area.

The interlace conversion unit 19 is a data in which character data or graphic data input from the changeover switch is displayed in the non-interlace display system shown in FIG. 3, but the display system of the display unit is shown in FIG.
In this case, the input data is converted into the data of the 2: 1 interlace display method because the 2: 1 interlace display method in which the scan of the first field shown in FIG. 10 and the scan of the second field shown in FIG. 10 are alternately repeated.

The output data of the interlace conversion unit 19 is supplied to an NTSC encoder 20. Among the input data of the character data and graphic data, the chrominance signal is balanced-modulated, and the band is shifted to the high frequency region of the luminance signal. The signal is shared and multiplexed, converted into a composite signal conforming to the NTSC system, supplied to the display unit 21, and displayed on the screen in color. In this display image, the character image in the character area has been subjected to flicker reduction by removing the high frequency component of the vertical spatial frequency by the vertical low-pass filter 14, and the image other than the character area has the above-mentioned spatial frequency in the vertical direction. Is displayed without being removed, so that the resolution is improved as compared with the related art.

The present invention is not limited to the above-described embodiment. For example, the present invention is not limited to the NTSC system, but may be encoded into a television system for displaying by another 2: 1 interlace display system such as a PAL system. Needless to say, the information may be displayed on a display unit adapted to this.

[0024]

As described above, according to the present invention,
When displaying input character data and graphic data in a superimposed manner, the output data of the vertical low-pass filter is selected in the character data area, and the display processing is the input data of the vertical low-pass filter in the area other than the character data. By selecting the output data of the section, the data that has not passed through the vertical low-pass filter in the area other than the character area is converted into a video signal and displayed on the display section. By passing through the filter, a character image with reduced flicker can be displayed, and in an area other than the character area, a graphic image with improved resolution can be displayed by not passing through the vertical low-pass filter.

[Brief description of the drawings]

FIG. 1 is a block diagram when an embodiment of the present invention is applied to a terminal device.

FIG. 2 is a diagram illustrating a method for displaying character information and graphic information.

FIG. 3 is an explanatory diagram of a non-interlaced display method.

FIG. 4 is an explanatory diagram of a character area.

FIG. 5 is a diagram illustrating a coordinate system on a display screen.

FIG. 6 is a block diagram illustrating an example of a character area determination unit in FIG. 1;

FIG. 7 is a flowchart for explaining the operation of FIG. 6;

FIG. 8 is an operation explanatory diagram of FIG. 6;

FIG. 9 is an explanatory diagram of scanning of a first field of the 2: 1 interlace method.

FIG. 10 is an explanatory diagram of scanning of a second field of the 2: 1 interlace method.

FIG. 11 is a block diagram in which an example of the related art is applied to a terminal device.

[Explanation of symbols]

 Reference Signs List 10 data processing unit 11 dialogue device 12 line control unit 13 display processing unit 14 vertical low-pass filter 15 delay unit 16 changeover switch 17 descriptor 18 character area judgment unit 19 interlace conversion unit 20 NTSC encoder 21 display unit 22 telephone line

Claims (2)

(57) [Claims] 1. A method of decoding input data and decoding character data
And graphic data are superimposed and displayed on the display surface
Data to display and display character data
A data processing unit for detecting a character area to be output, and a non-interlaced table of output data of the data processing unit.
A display processing unit that outputs as data of a display method, and a spatial frequency in a screen vertical direction of output data of the display processing unit.
Vertical low-pass filter that passes several low-pass components
When,Stores character area information detected by the data processing unit
A descriptor to The data output from the display processing unit is
Whether it is within the area or not.
And if the data is within the character area,
A character area determination unit that sets Based on the output flag of the character area determination unit, Character area and
The data of the determined area is the vertical low-pass fill
Select the output data of the
Select the output data of the display processing unit for the data of the selected area
DoSelector switchWhen,The changeover switch 2: 1 in the data selected by
Interlace to convert to data of tarlace display format
A conversion unit, and outputting the output data of the interlace conversion unit to a predetermined television.
And an encoder for converting to an
And a flicker reduction circuit. 2. A sequencer for judging whether display is possible on a screen based on output character area information of the descriptor and outputting a flag in accordance with the presence / absence of a character area, a first to third character areas, A line memory;
The third to third line memories are provided on the input side and the output side, respectively, and the first to third line memories are respectively cleared, the flag is written, and the written flag is read in a cyclic manner. flicker reduction circuit according to claim 1, characterized by comprising a first and a second selector for selecting based on the output of the sequencer.