JP2888999B2 - Inspection equipment for semiconductor integrated circuits - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an apparatus for inspecting a semiconductor integrated circuit, and more particularly, to an apparatus for measuring an operation waveform on a chip in a non-contact manner (for example, an EB tester) and a method for physically measuring a pattern on a chip in a non-contact manner. Processing equipment (eg FIB equipment)
The present invention relates to an inspection device intended to cooperate with the inspection device.

In general, a circuit that has been simulated in a design process is passed to a manufacturing process, and in this manufacturing process, a prototype IC is used as an engineering sample.
Is made. The circuit designer obtains the IC and tests and evaluates whether the function is correct (so-called prototype test).

In the prototype test, an input vector of a logic simulation of a workstation is applied to an IC under test (DUT: device under test), and a DU is generated.
While actually operating T, a malfunction DUT is determined by comparing an output signal vector obtained from the DUT with an output expected value vector.

[0004] In such a prototype test, not only a test using external terminals but also a test for observing a voltage signal of an internal circuit of a wafer or a chip is important. This is because the cause of failure often cannot be determined only by a test from an external terminal.

In this case, a metal probe is applied to a desired node on the wafer or chip of the DUT to take out an output vector from the internal circuit, and this output vector is compared with an expected value vector of a logic simulation in a workstation. Find errors in logic design and malfunctions in manufacturing.

In such a metal probe system, the insulating film on the wafer or chip surface must be removed by a solution or the like. Further, it is necessary to press strongly to reduce the contact resistance of the metal probe, and there is a disadvantage that the DUT is easily damaged such that the wafer or chip surface is easily damaged by the probe tip.

[0007]

2. Description of the Related Art As a measuring device which does not damage a DUT, for example, an electron beam tester (abbreviated as an EB tester) is known.

[0008] The EB tester irradiates the DUT with an electron beam, and based on the amount of secondary electrons reflected from the DUT, the DU.
It measures the potential of the wiring and electrodes of T, and allows the actual operation waveform inside the DUT to be observed without using a metal probe or the like.

By the way, from the results of such waveform observation,
For example, processing such as cutting or connecting wiring or electrodes at a specific portion of the DUT, or making a hole in an insulating film is performed.

For example, a focused ion beam apparatus (FIB apparatus for short) is known as an apparatus for performing such processing in a non-contact manner. Using the irradiation energy of the ion beam, physical processing is performed on a specific portion.

[0011]

However, in such a conventional semiconductor integrated circuit inspection apparatus, the EB tester and the FIB apparatus are configured to function independently of each other. When the part is searched on the FIB device side, there is a problem that the operation is very troublesome and the inspection efficiency is extremely low.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and includes an apparatus for measuring an internal voltage of a chip (for example, an EB tester) and an apparatus for processing a chip (for example, an FIB apparatus). To share data between
The purpose is to improve the coordination between the two devices.

[0013]

According to the present invention, there is provided a measuring means for measuring a potential of a wiring or an electrode on a chip, as shown in FIG. Specifying means for specifying a defective portion based on the measurement result and specifying the content of processing for the defective portion;
First holding means for holding position information and processing designation information of the defective portion; searching for a position on the chip according to the position information; and performing physical processing on wiring, electrodes, and the like at the position according to the processing designation information. Processing means; second holding means for holding the processed position information and processing content information; searching for a specific part on the chip according to the processed position information, measuring the potential of the specific part, and processing And verification means for verifying the chip operation accompanying the above.

[0014]

According to the present invention, the specifying means specifies the defective position on the chip and the processing content relating to the position in accordance with the measurement result of the measuring means, and the specified information is stored in the first storing means.

The information of the first holding means is referred to by the processing means, and the processing for the defective position on the chip is executed.

Next, after the information of the processing result is held in the second holding means, the verification means verifies the chip operation accompanying the processing based on this information. That is, the first holding unit and the second holding unit are provided between a predetermined device (for example, an EB tester) that functions as a measuring unit, a specifying unit, and a verification unit and a predetermined device (for example, an FIB device) that functions as a processing unit. The information is linked via the link, so that the cooperation between the two devices is enhanced.

[0017]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the drawings. FIG. 2 to FIG. 4 are views showing an embodiment of a semiconductor integrated circuit inspection apparatus according to the present invention, which is an example applied to an EB tester and an FIB apparatus.

First, the configuration will be described. In FIG. 2, 1
0 denotes an EB tester that functions as a measuring unit, a specifying unit, and a verifying unit, 30 denotes an FIB device that functions as a processing unit, 60a and 60b denote data transfer lines, and 61 denotes an external storage that functions as a first holding unit and a second holding unit. Device (for example, a fixed disk device).

The EB tester 10 includes an electron gun 12, a blanker 13, a condenser lens 14, a scanning deflector 15, an objective lens 16, an energy analyzer 17, a secondary electron detector 18, and the like in a lens barrel 11 in order. Arrange and electron gun 1
The electron beam 19 from 2 is deflected and scanned while being guided onto a DUT (for example, a semiconductor chip) 21 mounted on an XY stage 20, and irradiated to an arbitrary position.

Here, a driving signal is given to the DUT 21 from the driving circuit 22, and this driving signal is
21 includes various signals (that is, power supply, input / output signals, and the like) that can actually operate the power supply 21.

The EB tester controller 23 controls the operation of each part of the tester and executes an internal voltage measurement process based on the amount of electrons reflected from the DUT 21. Also EB
The tester control device 23 determines the defective portion of the DUT 21 by comparing the measured voltage and the expected voltage value, and processes the defective portion (for example, cutting unnecessary wiring, connecting non-connecting wiring, or forming an insulating film). A process for designating a hole or the like is executed, and the result of the determination is stored in the external storage device 61.

On the other hand, the FIB device 40 includes an ion gun 42, a blanker 43, and a condenser lens 4 inside a lens barrel 41.
4. DUT in which a scanning deflector 45, an objective lens 46, an electron detector 47 and the like are sequentially arranged, and a focused ion beam 48 from an ion gun 41 is mounted on an XY stage 49
(The same one used in the EB tester described above) is guided to a position on the DUT 21 and a physical processing is performed on a predetermined position of the DUT 21.

The FIB control device 50 controls the operation of each part of the FIB device and processes the contents (for example, cutting unnecessary wires, connecting non-connecting wires, or drilling holes in an insulating film) in accordance with the information held in the external storage device 61. ) Is determined and executed, and the contents of the processing and position information of the processing are stored in the external storage device 61.

FIG. 3 is a diagram showing a data format in the external storage device 61, which employs a so-called card type database. One card contains multiple items (# 1 to # 9)
, And each item is assigned to, for example, the following contents.

# 1: Processing content information (E #) specified by the EB tester E # = 1: Voltage waveform measurement wiring E # = 2: Wiring required cutting E # = 3: Wiring required connection # 2: FIB Processing information by device (F に よ る) F ＄ = 1: Cutting wiring F = 2: Connecting wiring F ＄ = 3: Drilling in insulating film # 3: Cutting, drilling, or connection source position Coordinate information (P
1 ＄) # 4: Cutting, drilling, or connection source net information (N1
＄) # 5: Cutting, drilling, or connection source layer number information (L1
＄) # 6: Location coordinate information of connection destination (P2 ＄) # 7: Net information of connection destination (N2 ＄) # 8: Layer number information of connection destination (L2 ＄) # 9: Comment column (C ＄) Here In the card type database, when a specific item is selected and its contents are specified, the corresponding card is searched. For example, generally, a name is specified as a search word and an address or a telephone number is searched. It is used for That is,
According to the above example, for example, item # 1 is selected and E ＄ = 2
When (wiring required) is specified, information (P1 ＄, N1) such as a wiring cutting position is obtained from the contents of the corresponding card.
{, L1}) can be found out.

FIG. 4 is an operation flowchart of the system. In this flowchart, first, the DUT 21 is set on the EB tester 10 and driven (step 70), and a data file (files of all cards) is read from the external storage device 61 (step 71). A card whose ＄> 0 (that is, a card whose F ＄ is 1, 2 or 3) is searched (step 72).

In the case of YES, it is determined that some processing has been performed in the process described later, and the information (P1 #, N1 #, L1 #, P2 #, N2 #, L2) in the search card is determined.
A voltage waveform measurement is executed by specifying a position, a net, and a layer while referring to ＄) (Step 73), and the circuit contents are verified from a change in the voltage waveform accompanying the processing (Step 74).

On the other hand, if step 72 is NO, that is, if no processing has been performed, first the DUT 2
The voltage waveform measurement is performed on the arbitrary position 1 (step 75), and a defective portion is specified from the measurement result (step 76). Next, the cause of the failure is estimated to form a hypothesis (step 77), and a method of verifying the hypothesis is examined (step 78). That is, a cause that may cause the voltage waveform to be defective is found, and a processing method (cutting or connection of wiring, etc.) for verifying the cause is determined (step 79).

After the determined processing method is stored in the item # 1 of the card (or a new card if not) at the processing position, the entire data file is written back to the external storage device 61 (step 80).

When the above processing is completed, the DUT 21 is
It is removed from the B tester 10 and set in the FIB device 40 (step 81), and then the external storage device 61 is accessed to read a data file (step 82). This data file is generated or updated on the EB tester 10 side, and holds information on contents to be processed and its processing position.

That is, the contents of E $ are checked for all the cards in the data file, and after searching for a card with E $ = 2 or 3 (that is, processing required) (step 8)
3) According to the processing contents (connection processing or cutting processing), a wiring connection processing by FIB (step 84) or a wiring disconnection processing by FIB (step 85) is executed. Then, 1 or 2 is set to F # for each processing content (steps 86 and 87), the data file is written back to the external storage device 61, and then step 70 is executed again.

As described above, according to the present embodiment, when a defective waveform is detected on the EB tester 10 side, information such as its position and contents to be processed is written to the external storage device 61. Can be used on the side. Therefore, the work of searching for the processing position can be facilitated.

Further, since the processing contents of the FIB device 40 are written out to the external storage device 61, this information is
It can be used on the B tester 10 side. Therefore, when re-measuring the voltage waveform, the positioning can be facilitated.

That is, the data file in the external storage device 61 can be shared between the EB tester 10 and the FIB device 40, and the search operation of the electron beam or ion beam irradiation position can be simplified to improve the inspection efficiency. it can.

[0035]

According to the present invention, data is shared between a device for measuring the internal voltage of a chip (for example, an EB tester) and a device for processing the chip (for example, an FIB device). And the coordination between the two devices can be improved.

[Brief description of the drawings]

FIG. 1 is a principle diagram of the present invention.

FIG. 2 is a system configuration diagram of an embodiment.

FIG. 3 is a conceptual diagram of a data file according to an embodiment.

FIG. 4 is an operation flowchart of one embodiment.

[Explanation of symbols]

 10: EB tester (measuring means, specifying means, verification means) 23: DUT (chip) 30: FIB device (processing means) 61: external storage device (first holding means, second holding means)

Claims (1)

(57) [Claims] 1. A measuring means for measuring a potential of a wiring or an electrode on a chip, a specifying means for specifying a defective part based on a measurement result of the measuring means and specifying contents of processing for the defective part, First holding means for holding position information and processing designation information of the defective portion; searching for a position on the chip according to the position information; and performing physical processing on wiring, electrodes, and the like at the position according to the processing designation information. Processing means; second holding means for holding the processed position information and processing content information; searching for a specific part on the chip according to the processed position information, measuring the potential of the specific part, and processing And a verification means for verifying a chip operation accompanying the inspection.