JP2877702B2 - VICS beacon radio wave receiver phase detector - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION The present invention relates to VICS (Vehicle Info).
More particularly, the present invention relates to a phase detection device of a VICS beacon radio wave receiver capable of improving the accuracy of directly detecting a beacon.

[0002]

2. Description of the Related Art The above-mentioned VICS radio beacon receiver uses FM (Frequency Modulation) modulation for various information such as road information and AM (Amlitude Modulation) for clarifying the current position and traveling direction of a vehicle. At the same time as modulation, it is transmitted as follows.

FIG. 9 is a diagram for explaining signals output from a conventional VICS radio beacon (road equipment). As shown in the figure, the beacon installed on the road transmits an FM modulated signal composed of data frames Fm and Fn having a frame synchronization signal FS to the head and an AM modulated signal composed of a 1 kHz sample clock signal. Where AM
The modulated signal is synchronized with the frame synchronization signal FS, and the phases of the signals output on the left and right sides of the beacon are different. For example,
On the right side of the beacon, the vehicle receives a signal in the in-phase region synchronized with the rising edge of the AM modulated signal, and on the left side of the beacon, receives a signal in the opposite phase region synchronized with the falling edge of the AM modulated signal.

FIG. 10 is a diagram showing a conventional phase detector of a VICS beacon radio wave receiver. As shown in this figure,
The vehicle is provided with an in-vehicle antenna 1 for receiving radio waves from beacons. The FM demodulation / AM demodulation unit 2 FM-demodulates and AM-demodulates the received signal received by the vehicle-mounted antenna 1. The data processing unit 3 performs processing of the FM demodulated data and simultaneously detects a frame synchronization signal. The phase detection unit 4 detects the phase of the AM-demodulated 1 kHz sample clock signal based on the frame synchronization signal as follows.

FIG. 11 is a diagram for explaining phase detection by the phase detector 4 of FIG. As shown in the figure, the sample timing generator 41 that inputs the frame synchronization signal synchronizes with the frame synchronization signal FS of the data frame and outputs
A sample clock signal of 1 kHz which is the same as the period of the sample clock signal used for amplitude modulation is formed. An n-stage register 42, for example, a five-stage register, inputs the signal demodulated by the FM demodulation / AM demodulation unit 2 for each sample clock signal. From the contents of the five-stage register, for example, if the pattern is “L (low)” for 4/5 or more, the pattern detection unit 43 determines that the pattern is in phase, and if 4/5 or more is “H”,
(High) ", it is determined that the phase is reversed. This judgment is realized by software. When the vehicle is traveling from the in-phase region to the opposite-phase region, it is determined that the vehicle is traveling in the forward direction. When the vehicle is traveling from the opposite phase region to the in-phase region, it is determined that the vehicle is traveling in the opposite direction. The transition point from the in-phase to the out-of-phase is the position directly below the beacon. The received data on the direction of the vehicle and the distance from immediately below the beacon thus obtained are displayed on the navigation.

[0006]

However, in the phase detection of the beacon receiver, it is necessary to control the number of stages of the shift register and the contents of pattern detection in order to control the accuracy of the detection of passing under the beacon and the suppression of the false detection rate. However, there is a problem that it is difficult to realize the function by software. Furthermore, there is a problem that it is difficult to incorporate the information of the reception level decrease into the phase detection.

[0007] Therefore, in view of the above problems, the present invention can easily control the phase detection by software,
It is another object of the present invention to provide a phase detection device of a beacon receiver that can incorporate information on a decrease in reception level.

[0008]

The present invention SUMMARY OF], in order to solve the above problems, to provide a phase detecting apparatus VICS beacon radio receiver having the following configuration. That is, a VICS beacon radio wave receiver which receives a signal which is FM-modulated by various road information and which receives a signal which is in synchronization with the FM modulated signal and which is AM-modulated in the same phase and the opposite phase based on the traveling direction information, is provided. A sample timing generator is provided for generating a sample clock signal for sampling the AM demodulated signal in synchronization with the signal. The up / down pulse generation circuit generates an up pulse and a down pulse according to the level of the received AM demodulated signal based on the sample clock signal. Initialized at the beginning of the data frame
The up / down counter increases the count value by the up pulse and decreases the count value by the down pulse. The squelch switching unit operates the up / down counter only when the reception level is higher than a certain threshold. The phase determination circuit determines in-phase if the count value exceeds a certain in-phase determination threshold within an arbitrary time within one data frame obtained from the FM demodulated signal, and if the count value exceeds a certain anti-phase determination threshold. Is determined to be the opposite phase.

The determination circuit may stop using the phase determination result when data obtained from the FM modulation signal has an error. The phase determination circuit may control the in-phase determination threshold and the anti-phase determination threshold according to the speed of the vehicle. The phase determination circuit may control an in-phase determination threshold and an anti-phase determination threshold in accordance with a mounting position of the antenna of the vehicle.

[0010]

According to the phase detecting device of the VICS beacon radio wave receiver of the present invention, when the count value exceeds a certain in-phase determination threshold value within an arbitrary time within one data frame obtained from the FM demodulated signal, By judging in-phase, and when exceeding a certain anti-phase judgment threshold, by judging as anti-phase,
Stable phase detection can be performed, and software can be easily implemented. If there is an error in the data obtained by the FM modulation signal, the use of the phase determination result is stopped, so that the phase determination can be linked to the correctness of the data, thereby preventing erroneous determination. By controlling the in-phase determination threshold value and the anti-phase determination threshold value according to the vehicle speed, it is possible to easily perform the determination in accordance with the vehicle speed only by changing the threshold value. By controlling the in-phase determination threshold value and the anti-phase determination threshold value in accordance with the mounting position of the antenna of the vehicle, it is possible to easily perform the determination suitable for the antenna mounting position only by changing the threshold value.

[0011]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a diagram showing a phase detection device of a VICS beacon radio wave receiver according to an embodiment of the present invention. In this figure, the difference from the configuration of FIG. 10 is the phase detector 5, which will be described below.

FIG. 2 is a diagram showing an example in which the data processing unit 3 and the phase detection unit 5 of FIG. 1 are realized by software. As shown in the figure, the gate array 56 receives demodulated data, detects frame synchronization, and performs demodulated data processing such as serial / parallel conversion of data. The comparator 57 receives the reception level and determines the reception level based on a certain threshold.
Here, the determination result is called squelch. The 8-bit microcomputer 58 inputs a frame synchronization signal and parallel data from the gate array 56, inputs an AM demodulation signal from the FM demodulation / AM demodulation unit 2, inputs a squelch signal from the comparator 57, and outputs a signal of a predetermined distance. A running pulse is input from a sensor that generates a pulse for each running. Further, an 8-bit microcomputer 58 is an EEPROM for storing information such as the position of an antenna mounted on the vehicle.
(Electrically Erasable Programmable ROM).
This is to make the threshold value of the counter value variable based on information such as the antenna position.

FIG. 3 is a diagram showing the configuration of the phase detector 5 in the 8-bit microcomputer 58 of FIG. 2, and FIG. 4 is a timing chart for explaining the phase detection. As shown in FIG. 3, the sample timing generator 51 that inputs the frame synchronization signal receives the data frame (FIG. 4A).
1) clock 1 (FIG. 4 (c)) whose rising edge is synchronized with the frame synchronization signal (see FIG. 4 (b)) and which has the same period as the clock used for AM amplitude modulation.
Clock 1), and clock 2 in which the phase of clock 1 is inverted.
(See FIG. 4D). The up / down pulse generating circuit 52 receives the 1 kHz AM demodulated signal, generates an up signal when the AM demodulated signal is “L” at the rising of the clock 1 from the sample timing generating unit 51, and generates the rising of the clock 2. Sometimes, when the AM demodulation signal is "H", an up signal is generated (see FIG. 4 (f)). Further, the up / down pulse generation circuit 52
A down signal is generated when the AM demodulated signal is "H" at the rising edge of the clock 1, and a down signal is generated when the AM demodulated signal is "L" at the rising edge of the clock 2 (see FIG. 4 (g)). ). The output side of the up / down pulse generating circuit 52 is provided with a switch 53 for blocking the output of the up signal and the down signal. The switch 53 is turned on when the level of the received signal is higher than the squelch level, and turned off when the level is lower than the squelch level. An up / down counter 54 is provided downstream of the switch 53. The up / down counter 54 counts up by an up signal, counts down by a down signal, and is preset by a frame synchronization signal. The phase determination circuit 55 determines the in-phase region or the out-of-phase region based on the output of the up / down counter 5 as follows.

FIG. 5 is a diagram for explaining the temporary determination operation of the phase determination circuit 55 of FIG. As shown in the figure, an in-phase determination threshold value and an in-phase determination threshold value are provided for the count value of the up / down counter 5, and when the count value exceeds the in-phase determination threshold value, it is provisionally determined that the phase is the same, and the count value is determined. Is less than the threshold for determining the reverse phase, it is tentatively determined that the phase is reversed, and if it is between these thresholds, it is determined to be indefinite.

At the end of a data frame, it is checked whether the data frame has been correctly received based on the data obtained from the FM demodulated signal (CRC (Cyclic Redundancy CRS).
heck), etc.), if the data is correctly received, the provisional determination is regarded as a formal determination. If incorrect, use of the provisional judgment result is stopped. 6 and 7 are flowcharts (parts 1 and 2) for explaining the operation of an example of the phase detector 5, and FIG. 8 is a timing chart for explaining in-phase / out-of-phase determination.

In step S1, the EEPROM 59
, And sets the corresponding phase determination threshold in a threshold memory (in-phase, out-of-phase) (not shown). The determination suitable for the antenna mounting position can be easily performed only by changing the threshold value. In step S2, detection of frame synchronization is waited. When this detection is made, the process proceeds to step S3.

In step S3, the detection timing of the AM modulated signal is adjusted (clocks 1 and 2). In step S4, 8OH is put into an 8-bit counter (not shown) (preset). In step S5, the timing of the rising edge of the clock 1 is waited. If there is this timing, the process proceeds to step S6.

In step S6, the squelch is "H".
It is determined whether or not. If this determination is "YES", the flow proceeds to step S7, and if "NO", the flow proceeds to step S10. In step S7, it is determined whether or not the AM demodulated signal = "H" holds. If this judgment is "YES", step S
The process proceeds to step S8, and if "NO", the process proceeds to step S9.

In step S8, the 8-bit counter is decreased by "-1". In step S9, 8
The bit counter is incremented by “+1”. Step S
At 10, the timing of the rising edge of the clock 2 is waited. If there is this timing, the process proceeds to step S11. In step S11, it is determined whether the squelch is “H”. If this determination is "YES", step S12 is performed.
The process proceeds to step S15 if “NO”.

In step S12, the AM demodulated signal =
It is determined whether “H” is established. This judgment is "YE
If "S", the process proceeds to step S13, and if "NO", the process proceeds to step S14. In step S13, the 8-bit counter is incremented by "+1". In step S14, the 8-bit counter is decreased by "-1".

In step S15, it is determined whether there is a phase determination timing. If this determination is "YES", the flow proceeds to step S16, and if "NO", the flow returns to step S5.
In step S16, the speed of the vehicle is detected, and the corresponding phase determination threshold is set in the threshold memory (in-phase, out-of-phase). The determination suitable for the speed of the vehicle can be made only by changing the threshold value.

In step S17, it is determined whether the count value of the 8-bit counter ≧ the in-phase determination threshold value memory threshold is satisfied. If this determination is "YES", step S1 is performed.
The process proceeds to step S9, and if "NO", the process proceeds to step S18. In step S18, it is determined whether or not the count value of the 8-bit counter ≦ the negative phase determination threshold value memory is satisfied. If this determination is "YES", the flow proceeds to step S20 and "NO"
If so, the process proceeds to step S21.

In step S19, it is determined that the phases are the same (temporary determination), and the process proceeds to step S21. In step S20, it is determined that the phase is reversed (temporary determination), and the process proceeds to step S21. In step S21, it is determined whether there is an error in the received data (CRC). This judgment is "YES"
If so, proceed to step S22; if “NO”, step S2
Proceed to 3.

In step S22, the use of the temporary determination result is stopped. In step S23, the provisional determination is determined. For this reason, the phase determination is linked to the correctness of the data, and erroneous determination can be prevented. Step S24
In, the process returns to step S2 using the phase determination result.
Therefore, according to the present embodiment, stable phase detection can be performed. Furthermore, it becomes simple and easy to understand when it is made into software.

[0025]

As described above, according to the present invention, F
Within an arbitrary time within one data frame obtained from the M demodulated signal, if the count value exceeds a certain in-phase determination threshold, it is determined to be in-phase. Since the determination is made, stable phase detection can be performed and software can be easily implemented. If there is an error in the data obtained by the FM modulation signal, the use of the phase determination result is stopped. Therefore, it is possible to link the phase determination to the correctness of the data and prevent erroneous determination. Since the in-phase determination threshold value and the anti-phase determination threshold value are controlled according to the vehicle speed, it is possible to easily perform the determination in accordance with the vehicle speed only by changing the threshold value. Since the in-phase determination threshold value and the anti-phase determination threshold value are controlled in accordance with the mounting position of the antenna of the vehicle, it is possible to easily determine the matching of the antenna mounting position only by changing the threshold value.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating a phase detection device of a VICS beacon radio wave receiver according to an embodiment of the present invention.

FIG. 2 is a diagram showing an example in which a data processing unit 3 and a phase detection unit 5 of FIG. 1 are realized by software.

FIG. 3 is a diagram showing a configuration of a phase detection unit 5 in the 8-bit microcomputer 58 of FIG.

FIG. 4 is a timing chart illustrating phase detection.

FIG. 5 is a diagram illustrating a provisional determination operation of a phase determination circuit 55 in FIG. 3;

FIG. 6 is a flowchart (part 1) for explaining an example of the operation of the phase detector 5;

FIG. 7 is a flowchart (part 2) for explaining an example of the operation of the phase detection unit 5;

FIG. 8 is a timing chart for explaining in-phase and out-of-phase determination.

FIG. 9 is a diagram illustrating a signal output from a conventional VICS radio beacon (road device).

FIG. 10 is a diagram showing a conventional phase detection device of a VICS beacon radio wave receiver.

11 is a diagram illustrating phase detection by the phase detection unit 4 in FIG.

[Explanation of symbols]

 5: Phase detection unit 51: Sample / timing generation unit 52: Up / down pulse generation circuit 53: Squelch switching unit 54: Up / down counter 55: Phase determination circuit

────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-5-26997 (JP, A) JP-A-6-243388 (JP, A) JP-A-6-68378 (JP, A) JP-A-5-68378 314394 (JP, A) JP-A-5-100003 (JP, A) JP-A-5-290295 (JP, A) JP-A-5-40898 (JP, A) JP-A-5-81596 (JP, A) JP-A-6-82541 (JP, A) JP-A-6-266995 (JP, A) JP-A-6-28599 (JP, A) (58) Fields investigated (Int. Cl. ⁶ , DB name) G01S 1/00-1/68 G01S 3/00-3/72 G08G 1/09

Claims (4)

(57) [Claims] 1. A VICS which receives a signal which is FM-modulated by various road information and which is synchronized with the FM-modulated signal and whose phase is AM-modulated to be in-phase and out-of-phase based on information on a traveling direction.
A beacon radio receiver, comprising: a sample timing generator (51) for generating a sample clock signal for sampling an AM demodulated signal in synchronization with an FM modulated signal; and an AM demodulated signal captured based on the sample clock signal. An up / down pulse generating circuit (52) for generating an up pulse and a down pulse in accordance with the level of the data pulse; and a data frame for increasing the count value by the up pulse and decreasing the count value by the down pulse.
An up / down counter (54) initialized at the beginning of a frame, and a squelch switching unit (53) for operating the up / down counter (54) only when the reception level is greater than a certain threshold. In any time within one data frame obtained from the FM demodulated signal, if the count value exceeds a certain in-phase determination threshold, it is determined to be in-phase. A phase detecting device for a VICS beacon radio wave receiver, comprising: 2. The method according to claim 1, wherein the phase determining circuit (55) is configured to:
2. The phase detection device for a VICS beacon radio wave receiver according to claim 1, wherein when there is an error in data obtained by the modulation signal, use of the phase determination result is stopped. 3. The phase detection device for a VICS beacon radio wave receiver according to claim 1, wherein said phase determination circuit (55) controls an in-phase determination threshold value and an anti-phase determination threshold value according to a speed of the vehicle. 4. The phase detection device for a VICS beacon radio wave receiver according to claim 1, wherein said phase determination circuit (55) controls an in-phase determination threshold and an anti-phase determination threshold according to a mounting position of an antenna of a vehicle. .