JP2871759B2 - Inverter device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an inverter device, and is suitable for, for example, an application for lighting a discharge lamp at a high frequency.

[Prior Art] Conventional Example 1 FIG. 4 is a circuit diagram of a conventional example. Hereinafter, the circuit configuration will be described. The DC power supply V _1, the switching element
The series circuits of Q ₁ and Q ₂ are connected in parallel. Each switching element Q ₁ , Q ₂ is composed of a power MOSFET and has a parasitic anti-parallel diode. At both ends of the switching element Q _2, via the capacitor C ₂ for cutting direct current and inductor L of current limiting, the load R _L is connected Do you like the discharge lamp. Capacitor C ₁ for resonance is connected in parallel to the load R _L. The switching elements Q ₁ and Q ₂ are alternately turned on and off by drive circuits DR ₁ and DR ₂ . Thus, the resonant circuit composed of inductor L and capacitor C _1, flows an alternating current of substantially sinusoidal AC voltage generated across the capacitor C ₁ is applied to the load R _L. DC cut capacitor
Capacity C ₂ is set sufficiently larger than the capacitance of the capacitor C ₁ for resonance, it does not contribute to the resonance. In the steady state, when the on-periods of the switching elements Q ₁ and Q ₂ are equal, half the voltage of the DC power supply V ₁ is charged in the DC cut capacitor C ₂ .

Reverse current I _D1 flowing through the switching element Q ₁ is detected by the detector ZD1 via a current transformer CT _1. Detector
Output voltage V _Z1 of ZD1 is reverse current to the switching element Q ₁
It goes low only when _ID1 flows. Similarly,
Reverse current I _D2 flowing through the switching element Q ₂ is detected by the detector ZD2 through the current transformer CT _2. Detector ZD
The output voltage V _Z2 of ₂ is applied to the switching element Q ₂ by the reverse current I.
It becomes “Low” level only when _D2 flows.

The oscillation output of the oscillator OSC is frequency-divided by the frequency divider DIV, the first frequency-divided output V _D1 is one input of the AND circuit AND1, and the second frequency-divided output V _D2 is one input of the AND circuit AND2. Becomes The output voltages V _Z1 and V _Z2 of the detectors ZD1 and ZD2 are used as the other inputs of the AND circuits AND2 and AND1, respectively.
Output V _A1, V _A2 of the AND circuit AND1, AND2, respectively through the drive circuit DR1, DR2 is supplied between the control electrode of the switching element Q _1, Q _2.

When reverse current I _D1 to the switching element Q ₁ is flowing, the output voltage V _Z1 detectors ZD1 becomes "Low" level, the output V _A2 of the AND circuit AND2 becomes "Low" level, the switching element Q ₂ does not turn on. Similarly, when the reverse current I _D2 is flowing to the switching element Q ₂ is,
Since the output voltage V _Z2 detectors ZD2 becomes "Low" level, the output V _A1 of the AND circuit AND1 becomes the "Low" level, the switching element Q ₁ is not turned on. Suppose switching element Q ₁
(Or Q ₂₎ when reverse current I _D1 (or I _D2) is flowing, the other switching element Q ₂ (or Q ₁₎ is once turned on, the switching element to Q ₁ (or Q ₂₎ Until the reverse recovery time of the reverse diode expires, both switching elements
Q ₁ and Q ₂ are simultaneously turned on in the forward direction.
V ₁ is short-circuited excessive current flows. In the circuit shown in FIG. 4, the simultaneous ON phenomenon described above is prevented by providing a simultaneous ON prevention circuit including current transformers CT ₁ and CT ₂ , detectors ZD 1 and ZD ₂ and AND circuits AND 1 and AND 2. I have.

FIG. 5 shows the oscillation frequency f and load R _{L of the} inverter device.
FIG. 4 is a diagram showing a relationship between output voltages _VRL applied to the multiplexed circuit. Load R
_{In a} no-load state where _L is not connected, at a frequency higher than the resonance frequency f ₀ , the output voltage V _RL decreases as the resonance frequency f increases, and at a frequency higher than the resonance frequency f ₀ , the resonance frequency f _At a frequency lower than ₀ , the output voltage _VRL increases as the frequency f increases. Also, the load R
_{In the} state where _L is connected, the resonance frequency becomes lower than the no-load resonance frequency f ₀ , and the slope of the resonance curve becomes gentle. When the load _RL is a discharge lamp, the impedance of the load _RL is different before the start of the discharge lamp, at the start, and at the time of stable lighting, so that the resonance characteristics also change according to the state of the discharge lamp.

However, at frequencies higher than the resonant frequency, the excitation voltage of the resonant circuit, i.e. with respect to the voltage across the switching element Q _2, operating in slow mode resonance current flowing in the resonant circuit is delayed in phase, Li O resonance frequency Even at lower frequencies,
It operates in the advanced phase mode in which the resonance current is in the advanced phase. In this phase advance mode, just before the switching element Q ₁ (or Q ₂ ) is turned off, the reverse current I _D1
(Or I _D2 ) flows. Therefore, in the lead mode,
The above simultaneous ON prevention circuit operates.

FIG. 6 is an operation waveform diagram of the circuit shown in FIG. 4, in which the divided outputs V _D1 and V _{D2 of the} divider DIV, the resonance current I _L flowing through the inductor L, and the output voltages V of the detectors ZD1 and ZD2. _Z1, V _Z2, and shows the relationship of the aND circuit AND1, the output of AND2 voltage V _A1, V _A2. The left half of FIG. 6 is an operation waveform diagram when the simultaneous ON prevention circuit is not operating, and the right half is an operation waveform diagram when the simultaneous ON prevention circuit is operating.

As described above, the simultaneous ON prevention circuit operates at the oscillation frequency in the phase advance mode, so that the period during which the forward currents I _Q1 and I _Q2 flow through the switching elements Q ₁ and Q ₂ is shorter than the period determined by the oscillator OSC. Become. For this reason, sufficient energy cannot be supplied to the resonance circuit.

Conventional Example 2 FIG. 7 is a circuit diagram of another conventional example. In this circuit, the output voltage V of the first monostable multivibrator MV1 is
With the _D1 is supplied to the first control electrode of the switching element Q ₁ via a drive circuit DR1, the output voltage V _D2 of the second monostable multivibrator MV2 via the drive circuit DR2 second switching element Q ₂ Are supplied to the control electrodes. Then, the output voltage V _{D1 of} the first monostable multivibrator MV1
At the falling edge of the second monostable multivibrator MV2
While triggering, at the falling edge of the output voltage V _D2 of the second monostable multivibrator MV2, which triggers the first monostable multivibrator MV1.

FIG. 8 is an operation waveform diagram of the above circuit. The pulse width of the voltage V _D1 for determining the ON period of the switching element Q ₁ is determined by the monostable multivibrator MV1, the pulse width of the voltage V _D2 for determining the ON period of the switching element Q ₂ is being determined by the monostable multivibrator MV2 I have. The pulse widths of the monostable multivibrators MV1 and MV2 are controlled so as to be unbalanced as necessary. This allows
DC voltage is shared in the capacitor C ₂ for cutting direct current is changed, it is possible to control the power supplied to the load R _L. When the load _RL is a discharge lamp, dimming control can be performed.

However, this in the conventional example, the oscillation frequency is determined by the pulse width of the monostable multivibrator MV1 and MV2, when the state of the load R _L becomes changed fast mode, the switching element It is not possible to prevent simultaneous turning on of Q ₁ and Q ₂ .

Conventional Example 3 FIG. 9 is a circuit diagram of another conventional example. In the this circuit, divided by the output voltage V ₃ of the oscillator OSC divider DIV, a first control electrode of the switching element Q ₁ and the first divided output V _D1 through the driving circuit DR1 And the second divided output V _D2 is supplied to the second switching element via the drive circuit DR2.
It is supplied to the control electrode of Q _2. The oscillator OSC includes a timer circuit TM including a general-purpose timer IC (for example, NE555 manufactured by Signatures Inc.). This timer circuit TM
Operates the resistor R ₁ and R _2, and square-wave output voltage V ₃ which is determined by the time constant of the capacitor C ₃ as astable multivibrator oscillates. The resistors R ₁ and R ₂ are variable resistors, and can freely set a period during which the rectangular wave output voltage V ₃ is at “High” level and a period during which the rectangular wave output voltage V ₃ is at “Low” level. This oscillator OSC
The output voltage V ₃ of the AND circuit AND1 and AN in the frequency divider DIV
One input of D2 and D flip-flop FF
Clock input C. D flip-flop FF
Is connected to the data input D. Therefore, the output Q of the D flip-flop FF is the clock input C
Is a rectangular wave voltage obtained by dividing the frequency of the signal into a half frequency. The output Q and the negative output of the D flip-flop FF are used as the other inputs of the AND circuits AND1 and AND2, respectively. The outputs of the AND circuits AND1 and AND2 are the first and second divided outputs V _D1 and V _D2 of the divider DIV.

FIG. 10 is an operation waveform diagram of the above circuit. V _T is the oscillator OS
C is the voltage at the connection point of the resistors R ₁ and R ₂ , V ₃ is the output voltage of the oscillator OSC, and V _D1 and V _D2 are the first and second dividers DIV.
Is the divided output of As shown in the left half of FIG. 10, the output voltage V ₃ of the oscillator OSC "Low" when a is period is short levels, first and second divided output V _D1, V _D2 are both "Low "
The level period, that is, the period during which both the switching elements Q ₁ and Q ₂ are off (dead-off time) is short. Therefore, sufficient energy can be supplied to the resonance circuit. Incidentally, in the phase advance mode, it is necessary to lengthen the dead-off time as shown in the right half of FIG. 10 in order to prevent the switching elements Q ₁ and Q ₂ from being simultaneously turned on. Therefore, in the phase advance mode, sufficient energy cannot be supplied to the resonance circuit.

[Problems to be Solved by the Invention] As described above, in the conventional example, when the oscillation frequency is lower than the resonance frequency of the resonance circuit in the resonance-type inverter device, the resonance voltage is lower than the excitation voltage of the resonance circuit. The resonance current operates in a phase advance mode in which the phase is advanced, and there is a problem that the switching elements are simultaneously turned on in this phase advance mode. In order to prevent the switching elements from being simultaneously turned on, a long dead-off time is set as in Conventional Example 3, or until the reverse current of one of the switching elements stops flowing as in Conventional Example 1. If a countermeasure is taken to prohibit the ON of the other switching element, the ON period of the switching element becomes short, and there is a problem that sufficient energy cannot be supplied to the resonance circuit.

The present invention has been made in view of the above, and an object of the present invention is to supply sufficient energy to a resonance circuit while reliably preventing simultaneous ON of switching elements in a resonance type inverter device. And to realize a stable operation.

[Means for Solving the Problems] In the present invention, in order to solve the above-mentioned problems, as shown in FIG. 1, first and second switching elements Q ₁ , a series circuit Q ₂ 'in parallel connected to the DC power supply V _1, first and second switching elements Q _1,
A drive circuit DR _1, DR ₂ for driving on and off Q ₂ alternately, first comprises an inductor L and a capacitor C ₁ and the load R _L 1
And an inverter device including a resonance circuit excited by a voltage obtained at a connection point between the second switching elements Q ₁ and Q ₂ , when one of the switching elements Q ₁ is in a state of blocking a forward current, in the other switching element Q ₂ is a state in which reverse current to the switching element Q ₁ one of the from the resonant circuit is flowing to the state to block the forward current, reverse current from the resonance circuit to the other switching element Q ₂ And a control circuit for controlling the two switching elements Q ₁ and Q ₂ so that the other switching element Q ₂ is in a state of passing the forward current for a certain period after the current flows. Is what you do.

In the above description, one switching element is Q ₁ and the other switching element is Q ₂ ,
In the opposite case also includes, when one switching element is Q ₂ are other switching element is Q _1.

In the [Operation] The present invention thus, in resonance type inverter device, when one of the switching element Q ₁ is a condition that has prevented the forward current, the resonant circuit one of the switching elements Q since the state in which the reverse current flows to _one other switching element Q ₂ and a state of blocking the forward current, the two switching elements Q _1, Q ₂ does not occur inconvenience such as to be turned on simultaneously. Further, a predetermined period from a state where a reverse current flows from the resonant circuit to the other of the switching element Q _2, because the other switching element Q ₂ is set to be a state of passing through the forward current, the resonant circuit Can supply enough energy.

The certain period may be started at a timing when the resonance current flowing through the resonance circuit is inverted, or may be started at a timing slightly delayed from the timing.

Embodiment 1 FIG. 1 is a circuit diagram of a first embodiment of the present invention. Less than,
The circuit configuration will be described. Since the DC power source V ₁ and the switching element Q _1, Q _2, the inductor L, and configuration of the main circuit including a capacitor C _1, C ₂ and the load R _L, which is similar to that in the conventional example shown in FIG. 4, overlaps Description is omitted. In this embodiment, it is detected by the detector Z _1, Z ₂ via a current transformer CT current I _L flowing in the resonant circuit. Switching element Q ₁
When a forward current is flowing, or when switching element Q ₂
To when a reverse current flows, the current I _L flows in the direction indicated by an arrow in Figure 1. At this time, the output voltage V _Z1 of the detector Z ₁ becomes “High” level. Switching element
When the Q ₂ forward current is flowing, or when the switching element Q ₁ is reverse current flows, the current I _L is first
It flows in the direction opposite to the direction indicated by the arrow in the figure. At this time, the output V _Z2 of the detector Z ₂ becomes “High” level. Detector Z _1, Z ₂
The outputs V _Z1 and V _Z2 are the first inputs of AND circuits AND4 and AND3, respectively. An output Q of a D flip-flop FF to be described later is used as a second input of the AND circuit AND4 and is also used as a second input of the AND circuit AND3 via the NOT circuit INV1. Further, the negative output of the D flip-flop FF is used as the third input of the AND circuit AND3, and is also used as the third input of the AND circuit AND4 via the negative circuit INV2. The outputs V _A1 and V _A2 of the AND circuits AND3 and AND4 are input to the OR circuit OR. Output V ₀ which OR circuit is the trigger input of the monostable multivibrator MM. Monostable multivibrator MM is the trigger input rises, generates an output V _M of a predetermined pulse width. This output V _M is
The input is one of the inputs of AND circuits AND1 and AND2, and the clock input C of the D flip-flop FF via the NOT circuit INV3. The negative output of the D flip-flop FF is connected to the data input D. As a result, outputs V _F2 and V _F1 obtained by dividing the clock input C to a half frequency are obtained as the output Q and the negative output of the D flip-flop FF. These outputs V _F1 and V _F2 are used as the other inputs of the AND circuits AND1 and AND2. And AND circuits AND1, AND2
The outputs V _D1 and V _D2 are supplied to the control electrodes of the switching elements Q ₁ and Q ₂ via the drive circuits DR1 and DR2, respectively.

Figure 2 is an operation waveform diagram of the present embodiment, a current I _L flowing in the resonant circuit, the detector Z1, Z2 output of V _Z1, V _Z2, AND circuit AND1, the output V _D1 of AND2, V _D2, D The outputs V _F1 and V _{F2 of} the flip-flop FF, the outputs V _A1 and V _{A2 of} the AND circuits AND3 and AND4,
Shows the relationship between the output V _M of the output V ₀ and the monostable multivibrator MM of the OR circuit OR. The left half of the figure is more current than outputs V _D1 and V _D2 for driving switching elements Q ₁ and Q _2.
Is an operation waveform diagram in the case where I _L is delayed inverted, the switching element is half right Q _1, the output V for driving the Q _{2 D1,} V _D2
FIG. 9 is an operation waveform diagram in a case where current _IL is reversed first.

As shown in FIG. 2, the monostable multivibrator MM
Is triggered by the rise of the output V ₀ which OR circuit OR. And the output V _M of this monostable multivibrator MM
Falls, the output of the NOT circuit INV3 rises, and the output of the D flip-flop FF is inverted. Now, the output V _F1 of the D flip-flop FF changes from “High” level to “Low”.
Inverted level, when inverted to "High" level from the output V _F2 is "Low" level, the output V _D of the AND circuit AND1,
In the timing of the fall of the output V _M of the monostable multivibrator MM, changes to "High" level to "Low" level. At this time, as shown in the operational waveform diagram of the left half of FIG. 2, when the current I _L flows in the forward direction (the direction indicated by the arrow in FIG. 1) is reverse current to the switching element Q ₂ it means that is flowing, a slow mode, the simultaneous oN does not occur can give an immediate on signal to the switching element Q _2. If the current I _L is flowing in the positive direction, the detector Z ₁
Since the output V _Z1 is at the “High” level, the AND circuit AND4
Becomes "High" level, and the monostable multivibrator MM is triggered via the OR circuit OR. Thereby, the output V _M is a fixed period of the monostable multivibrator MM becomes "High" level, while the output V _D2 of the AND circuit AND2 becomes a "High" level, the on signal is applied to the switching element Q ₂ .

On the other hand, as shown in the operational waveform diagram of the right half of FIG. 2, when the changed output V _D1 of the AND circuit AND1 is from "High" level to the "Low" level, current I _L in the negative direction (Fig. 1 If the flow is in the direction opposite to the arrow of
It means that the reverse current is flowing in the Q _1, a phase advance mode, given immediately on signal to the switching element Q _2, the phenomenon of co-on occurs. Because when the current I _L flows in the negative direction, the output V _Z1 of the detector Z ₁ is a "Low" level, the output of the AND circuit AND4 becomes "Low" level, the monostable multivibrator MM is triggered Not done.
Thereafter, when the direction of the current I _L is inverted from a negative direction to a positive direction, the detector output V _Z1 of Z ₁ becomes "High" level, the output of the AND circuit AND4 at this timing becomes "High" level, a single The stable multivibrator MM is triggered. This allows the output of the monostable multivibrator MM
V _M is a period of time becomes a "High" level, while the output V _D2 of the AND circuit AND2 becomes a "High" level, the on signal is applied to the switching element Q _2. This ON signal is
Since rises the moment the current I _L is reversed from a negative direction to a positive direction, substantially on-period of the switching element Q ₂ are intended to be secured sufficiently long, therefore, possible to supply sufficient energy to the resonant circuit Can be.

The above operation timing of the switching element Q ₂ is turned on, a case has been described in which the control by the AND circuit AND4 and detector Z1, the detector Z2 the timing of switching element Q ₁ is turned on and the AND circuit AND3 It goes without saying that the same holds when controlling.

As described above, in the present embodiment, when one switching element Q ₁ (or Q ₂ ) is turned off, a reverse current flows to the other switching element Q ₂ (or Q ₁ ). Therefore, an off signal for a certain period is given to the other switching element Q ₂ (or Q ₁ ), so that the two switching elements Q ₁ and Q ₂ do not turn on at the same time, and each switching element Q ₁ since the oN period of Q ₂ is can be secured sufficiently long, it is capable of supplying sufficient energy to the resonant circuit.

Embodiment 2 FIG. 3 is a circuit diagram of a second embodiment of the present invention. Less than,
The circuit configuration will be described. Since the DC power source V ₁ and the switching element Q _1, Q _2, the inductor L, and configuration of the main circuit including a capacitor C _1, C ₂ and the load R _L, which is similar to that in the conventional example shown in FIG. 4, overlaps Description is omitted. Also, the fourth
Similar to the conventional example shown in FIG reverse current flowing through the switching element Q ₁ is detected by the detector ZD1 through the current transformer CT1, the output of the detector ZD1 the switching elements Q
It becomes “Low” level only when a reverse current flows to ₁ . Similarly, the reverse current flowing through the switching element Q ₂ is detected by the detector ZD2 through the current transformer CT2, the output of the detector ZD2 only when a reverse current flows through the switching element Q ₂ "Low "Become a level.

In this embodiment, the conventional oscillator OS shown in FIG.
In place of C, a monostable multivibrator MM is used. The output of this monostable multivibrator MM is used as one input of AND circuits AND1 and AND2,
The clock input C of the D flip-flop FF is provided via the NV. The negative output of the D flip-flop FF is connected to the data input D. As a result, the clock input C is connected to the output Q and the negative output of the D flip-flop FF.
An output divided into 1/2 frequency is obtained. These outputs are used as one input of the AND circuits AND5 and AND6.
The outputs of the detectors ZD2 and ZD1 are supplied to the other inputs of the AND circuits AND5 and AND6, respectively. AND circuit AND5, AN
The output of D6 is used as the other input of the AND circuits AND1 and AND2, and is used as the trigger input of the monostable multivibrator MM via the OR circuit OR. The outputs of the AND circuits AND1 and AND2 are connected to the drive circuits DR1 and DR2, respectively.
Is supplied to the control electrodes of the switching elements Q ₁ , Q ₂ through the switch.

Hereinafter, the operation of the present embodiment will be described. The monostable multivibrator MM is triggered by the rising edge of the output of the OR circuit OR. When the output of the monostable multivibrator MM falls after a certain period of time, the output of the NOT circuit INV rises.
The output of F is inverted. Now, assuming that the negative output of the D flip-flop FF is inverted from “High” level to “Low” level and the output Q is inverted from “Low” level to “High” level, the output of the AND circuit AND1 becomes monostable. at the falling edge of the timing of the output V _M of the multivibrator MM, "High"
It changes from level to “Low” level. Therefore, the switching element Q ₁ is becomes a state to block forward current, this time, if the reverse current flows through the switching element Q _2, a slow mode, immediately on signal to the switching element Q ₂ Does not occur at the same time. In this case,
Since the output of detector ZD1 is at “High” level,
The output of AND6 becomes “High” level, and the monostable multivibrator MM is triggered via the OR circuit OR. Thus, the output is a certain period of the monostable multivibrator MM becomes "High" level, while the output of the AND circuit AND2 becomes a "High" level, the on signal is applied to the switching element Q _2.

On the other hand, as described above, the output of the AND circuit AND1 is “Hig
When changes to Low "level" level "h, when a reverse current flows through the switching element Q ₁ is a phase advance mode, given immediately on signal to the switching element Q _2, the simultaneous ON In this case, since the output of the detector ZD1 is at the “Low” level, the AND circuit AND
The output of 6 becomes “Low” level, and the monostable multivibrator MM is not triggered. Then the switching element
Reverse current stops of Q _1, if a state in which flows the other reverse current to the switching element Q _2, the output of the detector ZD1 becomes "High" level, the output of the AND circuit AND6 at this timing " It becomes High level, and the monostable multivibrator MM is triggered. Thus, the output is a certain period of the monostable multivibrator MM becomes "High" level, while the output of the AND circuit AND2 becomes a "High" level, the on signal is applied to the switching element Q _2. This ON signal is, at the moment when the reverse current from the resonance circuit is taken over from the switching element Q ₁ to the switching element Q _2, i.e. since the moment a resonant current reverses, substantial on-period of the switching element Q ₂ is This is ensured for a sufficiently long time, so that sufficient energy can be supplied to the resonance circuit.

The above operation timing of the switching element Q ₂ is turned on, a case has been described in which the control by the AND circuit AND6 and detector ZD1, the detector ZD2 the timing of switching element Q ₁ is turned on and the AND circuit AND5 It goes without saying that the same holds when controlling.

In the present invention, the switching elements Q ₁ and Q ₂ are not limited to power MOSFETs, but may be bipolar transistors to which anti-parallel diodes are added.
Generally, any semiconductor switch element that does not block reverse current can be used.

Also, the circuit configuration of the inverter device is not limited to the modified half-bridge circuit as exemplified in the embodiment, but may be a half-bridge circuit or a full-bridge circuit, or the like. The present invention can be applied. Here, the full bridge circuit is a series circuit of the first and second switching elements and a series circuit of the third and fourth switching elements connected in parallel to a DC power supply, and the first and second switching elements are connected in parallel. Switching element connection point and third
And a connection point between the fourth switching element and a connection point of the fourth switching element. The third switching element is a circuit in which a reverse polarity voltage is alternately applied to the LC resonance circuit. The fourth switching element is turned on and off simultaneously with the first switching element, and the fourth switching element is turned on and off simultaneously with the first switching element. The half-bridge circuit is a circuit in which the third and fourth switching elements in the full-bridge circuit are each replaced with a capacitor.

[Effects of the Invention] According to the present invention, in a so-called resonance type inverter device, when one of the switching elements blocks a forward current, a reverse current flows from the resonance circuit to the one of the switching elements. Is flowing, the other switching element is controlled so as to block the forward current, so that the two switching elements do not turn on at the same time, and the overcurrent due to the simultaneous turning on can be reliably prevented. In addition, there is an effect that the other switching element is controlled to pass the forward current for a certain period after the reverse current flows from the resonance circuit to the other switching element. So
The substantial forward conduction period of the other switching element can be made sufficiently long, so that sufficient energy can be supplied to the resonance circuit, and there is an effect that a stable oscillation operation can be realized.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of a first embodiment of the present invention, FIG. 2 is an operation waveform diagram of the above embodiment, FIG. 3 is a circuit diagram of a second embodiment of the present invention, FIG. FIG. 5 is a characteristic diagram of the resonance circuit used in the embodiment, FIG. 6 is an operation waveform diagram in the embodiment, FIG. 7 is a circuit diagram of another conventional example, FIG. 8 is an operation waveform diagram in the embodiment, and FIG. FIG. 10 is a circuit diagram of the conventional example, and FIG. 10 is an operation waveform diagram of the same. V ₁ is a DC power supply, Q ₁ and Q ₂ are switching elements, L is an inductor, C ₁ is a capacitor, _RL is a load, CT is a current transformer,
MM is a monostable multivibrator.

Claims (1)

(57) [Claims] A drive circuit for connecting a series circuit of first and second switching elements which does not block a reverse current to a DC power supply in parallel, and for driving the first and second switching elements alternately on and off. Wherein the inverter device includes a resonance circuit including an inductor, a capacitor, and a load and excited by a voltage obtained at a connection point between the first and second switching elements, wherein one of the switching elements blocks a forward current. When a reverse current flows from the resonance circuit to the one switching element, the other switching element blocks the forward current, and a reverse current flows from the resonance circuit to the other switching element. Both switches are set so that the other switching element passes a forward current for a certain period of time after the flowing state. Inverter apparatus characterized in that a control circuit for controlling the grayed elements.