JP2870762B2 - High-efficiency coding device for image signals - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high-efficiency encoding apparatus for an image signal such as a television signal, and more particularly to an apparatus using subsampling.

[Conventional technology]

As a method for compressing the amount of data to be transmitted in comparison with the original amount of data when transmitting a digital video signal, a method of thinning out pixels by subsampling and lowering the subsampling frequency is known. As one of the sub-sampling, a method is proposed in which the image data is thinned by 1/2, and a sub-sampling point and a 2-bit flag indicating the position of the sub-sampling point used at the time of interpolation are transmitted. . If one pixel data of the digital video signal is 8 bits, adding 2 bits of the flag makes 1
5 bits per pixel, and the compression ratio is (5/8).

In the conventional sub-sampling, since the sub-sampling pattern is always the same, there is a problem that the restored image quality is noticeably deteriorated in a portion such as the contour of the object in the image. In particular, when the subsampling rate is higher than 1/2, there is a disadvantage that the image quality is significantly deteriorated.

To solve the above-mentioned problem, the present applicant divides one image into a large number of two-dimensional blocks as described in Japanese Patent Application No. 61-11098, and An encoding method has been proposed in which a difference (dynamic range) between a maximum value and a minimum value of a plurality of pixel data is obtained, and a sub-sampling cycle is varied according to a dynamic range of a block. That is, a block having a small dynamic range is determined to be a flat image, and the sub-sampling period is lengthened, for example, to (1/8).
A block having a relatively large dynamic range is determined to be an image having a change, and the sub-sampling cycle is set to (1/2). A block having an extremely large dynamic range is determined to be an image having a drastic change. And no subsampling is performed.

As described above, in the high-efficiency encoding device that selectively switches the sub-sampling period according to the dynamic range, the sub-sampling period is set in units of blocks, so that the quality of the restored image is good or bad in units of blocks. And the distortion of the block was conspicuous. Also, the types that can be selected as the sub-sampling period are limited, and the adaptability to the features of the image is insufficient.

A high-efficiency encoding apparatus for an image signal which solves these problems, does not cause deterioration in block units, and can form an arbitrary sub-sampling pattern adapted to the characteristics of an image and can obtain a good restored image. Proposed by the present applicant. For example, Japanese Patent Application No. 62-208957 discloses that a basic pixel regularly located in a plurality of pixels having a temporal or spatial arrangement is transmitted and a first density interpolation is performed using the basic pixel. When the prediction is performed, the original pixel signal is transmitted when the prediction error of the interpolation prediction is large, and when the prediction error is small, the original pixel signal is replaced with the interpolation value. Then, one of the basic pixel and the original pixel signal or the interpolation value is used. Perform interpolation prediction of a second density finer than the first density, and when the prediction error of the interpolation prediction is large,
An adaptive variable sampling device that transmits an original pixel signal and substitutes an interpolation value when a prediction error is small is disclosed.

Further, Japanese Patent Application No. 62-85210 discloses an adaptive variable sampling device similar to the above, which can perform real-time processing by omitting the process of replacing with an interpolation value. Have been.

[Problems to be solved by the invention]

The adaptive variable sampling device described above is applied, for example, to the transmission of high definition television signals. A high-definition television signal has a stronger correlation between pixels than a standard television signal, and is easily compressed. However,
The output signal of a video camera for a high definition television signal has a problem that the S / N is bad. If adaptive sampling is applied to a signal having a poor S / N, the prediction error becomes large due to noise, and as a result, the number of pixels to be thinned out decreases and the compression ratio does not become sufficiently high.

SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a high-efficiency encoding apparatus for an image signal in which the problem that the compression ratio is reduced due to noise is solved and the image quality is improved.

[Means for solving the problem]

The present invention provides means for extracting a plurality of peripheral pixels of a target pixel of a plurality of pixels having a temporal or spatial arrangement as reference pixels, and an intermediate between the values of the plurality of reference pixels and the value of the target pixel. A noise removing circuit for selectively outputting a value; and an adaptive variable sampling means provided at a subsequent stage of the noise removing circuit, wherein the adaptive variable sampling means is regularly located in a plurality of pixels, and Transmitted
An interpolation prediction unit for performing a first interpolation prediction of a first density in a vertical direction or a horizontal direction using a basic pixel; comparing a prediction error of the first interpolation prediction with a threshold value;
When the prediction error of the interpolation prediction is larger than the threshold,
When the original pixel signal is transmitted and the prediction error is smaller than the threshold value, the original pixel signal is replaced with the interpolation value obtained by the first interpolation prediction, and the base pixel and one of the original pixel signal or the interpolation value are used. A second interpolation prediction of a second density in the vertical or horizontal direction, which is finer than the first density, is performed. When a prediction error of the second interpolation prediction is larger than a threshold, the original pixel signal or the first Determining means for transmitting the interpolated value obtained by the interpolation prediction, and when the prediction error is smaller than the threshold value, determining to replace the interpolation value with the interpolated value obtained by the second interpolation prediction; And a bit map generating means for allocating a bit indicating whether or not to transmit the original pixel signal to all pixels other than the basic pixel.

Further, in the present invention, as a noise elimination circuit provided before the adaptive variable sampling circuit similar to the above, a maximum value and a minimum value are detected among a plurality of reference pixel values and a target pixel value. The value of the pixel of interest is compared with the maximum and minimum values or the value obtained by adding an offset to the value of the maximum and minimum values, and the value of the pixel of interest and the maximum and minimum values or the maximum and minimum values are compared. A configuration in which an intermediate value between the value and the value to which the offset is added is selectively output.

[Action]

A non-linear filter is provided in front of the adaptive variable density sampling device to remove noise. As the non-linear filter, a configuration that selectively outputs an intermediate value between the value of the target pixel and the values of reference pixels around the target pixel can be used. Compared with the low-pass filter, this noise elimination circuit does not require an addition circuit and a multiplication circuit, has advantages in that the hardware is simple, and there is little change in the signal.

Further, the noise removal circuit detects the maximum value and the minimum value between the value of the reference pixel and the value of the pixel of interest, and the maximum value and the minimum value or the value obtained by adding an offset to each of the maximum value and the minimum value. Is output, the maximum value (or a value obtained by adding an offset to the maximum value) or the minimum value (or a value obtained by adding an offset to the minimum value) is output. When there is a value of the target pixel, a configuration in which the value of the target pixel is output as it is can be used. The latter noise elimination circuit has an advantage that the change in the signal is less disturbed than the former noise elimination circuit.

In the adaptive variable sampling device, for example, the first pixel located every (4 × 4) pixel of the digital video signal is always transmitted without being thinned out. The second pixels other than the first pixel are thinned out by sub-sampling or transmitted as they are. This determination is made according to the magnitude of the predicted error when the pixels thinned out on the receiving side are interpolated by peripheral pixels. That is, when the prediction error is large, the original data is transmitted because the thinning cannot be performed, and when the prediction error is small, the original data is not transmitted because the thinning is possible. The data of the second pixel and the data of the first pixel whose transmission / thinning is thus controlled are transmitted. One-bit control data for controlling transmission / thinning is added to each sample of the data of the second pixel. On the receiving side, it is determined whether interpolation is necessary by looking at the control data.

The transmission / thinning-out determination based on the prediction error is made using the original data in which the prediction error is large and not thinned out, or the interpolation value in the case where the prediction error is small and thinned out. This judgment corresponds to the processing performed on the receiving side. However, the transmission / thinning-out determination may be made by always using the original data. In the latter case, real-time processing is possible, which is suitable for processing moving images.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. This description is made in the following order.

a. Configuration of one embodiment b. One example of a noise removal filter c. Another example of a noise removal filter d. Subsampling encoder e. Subsampling decoder f. Modification a. Configuration of one embodiment FIG. 1 shows an overall configuration of an embodiment of the present invention.
In FIG. 1, a digital video signal in which one sample is quantized to 8 bits is supplied to an input terminal indicated by 101, for example. This digital video signal is supplied. This digital video signal is supplied to the delay circuit 102. The delay circuit 102 is composed of two sample delay circuits, and as shown in FIG. 3, data of three consecutive pixels Pa, Pb, and Pc on the same line are simultaneously obtained from the delay circuit 102. In FIG. 3, a solid line indicates, for example, a line in the first field, and a broken line indicates a line in the second field.

The data of these pixels Pa, Pb, and Pc are supplied to the noise elimination filter 103 in the horizontal direction. Noise removal filter 103
Is configured to compare the levels of the data levels of the three pixels Pa, Pb, and Pc and selectively output the pixel data at the center level. The output signal of the noise removal filter 103 is supplied to the delay circuit 104.

The delay circuit 104 is composed of two line delay circuits, and as shown in FIG. 3, data of three pixels Pd, Pb, Pe vertically aligned in the same field is transmitted to the delay circuit 104.
Are taken out at the same time. Strictly, since the processing of the noise removal filter 103 at the preceding stage is performed, data different from the original data may be generated from the delay circuit 104. The data of these pixels Pd, Pb, Pe are supplied to the noise removal filter 105 in the vertical direction. Similarly to the noise removal filter 103, the data levels of the three pixels Pd, Pb, Pe are compared, and the data at the center level is selectively output.

The output signal of the vertical noise elimination filter 105 is supplied to the sub-sampling encoder 106. The sub-sampling encoder 106 performs variable-density sub-sampling processing as described later.

b. Example of Noise Removal Filter The horizontal noise removal filter 103 has the configuration shown in FIG. This configuration is the same as that disclosed in Japanese Utility Model Laid-Open No. 59-5014 proposed by the present applicant. The vertical noise elimination filter 105 also has a configuration similar to that of FIG. 2, although not shown. The delay circuit 102 supplies data of the pixels Pa, Pb, and Pc at the same time. Pixel Pb
Is a target pixel (that is, a pixel to be processed), and the other pixels Pa and Pc are reference pixels.

The data of the pixels Pa and Pb are supplied to the comparator 111, the data of the pixels Pa and Pc are supplied to the comparator 112, and the data of the pixels Pb and Pc are supplied to the comparator 113. In the comparators 111, 112, and 113, the levels of the two input data are compared, and three output signals are generated according to the level relationship.

For example, when (Pa> Pb), the comparator 111 sets (10
An output signal of (0) is generated, an output signal of (010) is generated when (Pa = Pb), and an output signal of (001) is generated when (Pa <Pb). Output signals similar to those of the comparator 111 are generated from the other comparators 112 and 113, respectively. A total of 9-bit output signals from these comparators 111, 112, 113 are supplied to the ROM 115.

The ROM 115 has a determination function, determines an intermediate value among the three data, and supplies a control signal to the selector 114. The data of the pixels Pa, Pb, and Pc are supplied to the selector 114, and one data is selectively taken out to the output terminal 116 in accordance with a control signal from the ROM 115. If two of the three data have the same level, one of the two data is selected, and if the three data have the same level, three of the data are selected. One is selected. Since pixel data having an intermediate value is selected, noise can be effectively removed when the local correlation of the image is high and the monotonicity of the change in the image signal is satisfied.

c. Another Example of Noise Removal Filter Another example of the noise removal filter is shown in FIG. 4 and FIG. These configurations are based on the Japanese Patent Application No.
It is the same as that described in Japanese Patent Application No. 62-18783 and Japanese Patent Application No. 62-192227.

In the configuration shown in FIG. 4, an input digital video signal from an input terminal 121 is supplied to a delay circuit 122. The delay circuit 122 has a configuration in which a sample delay circuit and a horizontal delay circuit are combined, and as shown in FIG. 3, the pixels Pa, Pc, Pd, and Pe around the pixel Pb are simultaneously placed in the delay circuit 122.
Taken out of The pixel Pb is a target pixel (that is, a pixel to be processed), and the other pixels Pa, Pc, Pd, and Pe are reference pixels.

The data of the reference pixel among the data of the five pixels from the delay circuit 122 is supplied to the maximum value and minimum value detection circuit 123, and the data of the pixel of interest is supplied to the selection circuit 124. The detected maximum value MAX is supplied to the selection circuit 124 and the comparison circuit 125, and the detected minimum value MIN is supplied to the selection circuit 124 and the comparison circuit 126. The output signals of these comparison circuits 125 and 126 are supplied to the determination circuit 127.

A control signal is generated from the determination circuit 127 to the selection circuit 124. According to the control signal, the value of the pixel of interest and the maximum value MAX
Alternatively, either the minimum value MIN is selected and taken out to the output terminal 128. When the value of the target pixel Pb is expressed as Lb, the selection circuit 124 operates as described below.

 When MAX <Lb The maximum value MAX is selected.

 When MIN ≦ Lb ≦ MAX The value Lb of the target pixel Pb is selected.

 When MIN> Lb The minimum value MIN is selected.

The noise removal filter shown in FIG. 4 can remove noise having no spatial correlation, similarly to the noise removal filter shown in FIG. As shown in FIG. 6, in the noise elimination filter (see FIG. 2) for selecting the above-mentioned intermediate value, the level range of the output signal to be selected is limited to that shown by 143. However, in the noise elimination filter shown in FIG. 4, the level range of the output signal is expanded to the level range 142 between the maximum value MAX and the minimum value MIN. Can be smaller.

FIG. 5 shows still another example of the noise removal filter.
The configuration is similar to that of FIG. In FIG. 5, a one-dimensional filter is formed, and data of three consecutive pixels on the same line are simultaneously extracted from the delay circuit 132 connected to the input terminal 131. The data of the reference pixels on both sides is supplied to the maximum and minimum value detection circuit 133, and the data of the target pixel at the center is supplied to the selection circuit 134. The detected maximum value is supplied to an addition circuit 135, and the detected minimum value is supplied to a subtraction circuit 136. These addition circuit 135 and subtraction circuit
136 is supplied with offset data Δ from a terminal 137.

Output signals from the adder 135 and the subtractor 136 are supplied to the selector 134 and the comparators 138 and 139, respectively. Comparison circuit 13
8 and 139 are supplied with the value of the pixel of interest,
And 139 are supplied to the decision circuit 140. The output signal of the determination circuit 140 is supplied to the selection circuit 134 as a control signal.

The selection circuit 134 performs the same selection operation as the noise removal filter shown in FIG. Compared with the noise elimination filter shown in FIG. 4, the noise elimination filter shown in FIG. 5 has offset data Δ added to each of the maximum value MAX and the minimum value MIN. It is more important than MAX and MIN, and can effectively remove noise.

d. Sub-Sampling Encoder With reference to FIG. 7, the sub-sampling encoder 106 provided on the image signal transmitting side (in the case of a VTR or the like, on the recording side) will be described. In FIG. 7, for example, a digital video signal is supplied to an input terminal indicated by 1. This digital video signal is a signal from which noise components have been removed by the above-described noise removal filter.

An input terminal 1 has a line delay circuit 2 indicated by LD,
3, 4, and 5 cascade connections are connected. Also, input terminal 1
, Sample delay circuits 6 and 7 indicated by SD are connected in series, sample delay circuits 8 and 9 are connected in series at an output side of the line delay circuit 2, and a sample delay circuit is provided at an output side of the line delay circuit 3. 10, 11, 12 and 13 are connected in series, and a sample delay circuit 14 is connected to the output side of the line delay circuit 4.
And 15 are connected in series, and sample delay circuits 16 and 17 are connected in series at the output side of the line delay circuit 5. Each of these line delay circuits 2, 3, 4, 5 has a delay amount of one horizontal period, and sample delay circuits 6, 7, 8,.
7 has the delay amount of one sampling period. By the line delay circuits 2 to 5 and the sample delay circuits 6 to 17,
A plurality of pixel data included in a predetermined two-dimensional area of a television image are simultaneously extracted.

The sub-sampling according to this embodiment will be described with reference to FIG. FIG. 8 shows a part of a two-dimensional (field or frame) area of the input digital video signal, in which the horizontal pixel interval corresponds to the sampling period, and the vertical pixel interval corresponds to the line interval. I have. The symbols (△, ●, □, た) attached to each pixel in FIG.
Each of x and o) represents a difference in the interpolation processing. First, circles indicate basic pixels located every four lines and every four pixels. The basic pixels at a rate of one for every 16 pixels are always transmitted without being thinned out. The pixels other than the basic pixels are compared with the average value of the two pixels as described below, and the difference between the original pixel data and the average value (prediction error)
When is less than or equal to the threshold value, it is decimated. Conversely, if the prediction error exceeds the threshold, it is transmitted.

Pixel represented by Δ: Compared with the average value of the pixel data located on the upper and lower lines, respectively.

For example, the pixel a2 is compared with the average value [1/2 (al + a3)].

Pixels represented by ●: Compared with the average value of the pixels located two lines apart from each other by two lines.

For example, the pixel a3 is compared with the average value [1/2 (al + a5)].

Pixel represented by □: Compared with the average value of pixels located two pixels apart on the left and right.

For example, the pixel c3 is compared with the average value [1/2 (a3 + e3)].

Pixels represented by x: Compared with the average value of the adjacent pixels on the left and right.

For example, the pixel b2 is compared with the average value [1/2 (a2 + c2)].

The output side of the sample delay circuit 11 in FIG. 7 is the target pixel, and the output data of the sample delay circuit 11 is supplied to the fifth input terminals of the selectors 18 and 19, the subtraction circuit 23, and the gate circuit 27. The selectors 18 and 19 have first to fifth five input terminals, and sequentially input data supplied to these five input terminals in response to a selection signal from a terminal 20 synchronized with the sampling clock. Selectively output to the output terminal.

Output data of the sample delay circuit 7 is supplied to a first input terminal of the selector 18, and output data of the sample delay circuit 17 is supplied to a first input terminal of the selector 19. Therefore, when the target pixel is a pixel represented by Δ, the input data supplied to the first input terminals of the selectors 18 and 19 is selected. Output data of the sample delay circuits 9 and 15 are supplied to second input terminals of the selectors 18 and 19, respectively. Therefore, when the target pixel is a pixel represented by ●, the input data supplied to the second input terminals of the selectors 18 and 19 is selected. Output data of the line delay circuit 3 and the sample delay circuit 13 are supplied to third input terminals of the selectors 18 and 19, respectively. Therefore, when the target pixel is a pixel represented by □, the input data supplied to the third input terminals of the selectors 18 and 19 is selected. Output data of the sample delay circuits 10 and 12 are supplied to fourth input terminals of the selectors 18 and 19, respectively. Therefore, when the pixel of interest is a pixel represented by x, the selector
Input data supplied to the fourth input terminals 18 and 19 are selected. Output data (pixel of interest) of the sample delay circuit 11 is supplied to the fifth input terminals of the selectors 18 and 19. Therefore, when the pixel of interest is a basic pixel represented by ○, both the selectors 18 and 19 Selects the basic pixel.

The output data of the selectors 18 and 19 is supplied to the adder 21, and the output signal of the adder 21 is supplied to the 倍 multiplier 22. Therefore, the average value data of the two pixel data selected by the selectors 18 and 19 is generated from the 1/2 times circuit 21. The average value data and the data of the target pixel from the sample delay circuit 11 are supplied to a subtraction circuit 23, and the difference data from the subtraction circuit 23 is converted to an absolute value in an absolute value conversion circuit 24. The output data of the absolute value conversion circuit 24 is supplied to a comparison circuit 25 and compared with a threshold value from a terminal 26.

As described above, the output data of the absolute value conversion circuit 24 represents a prediction error that occurs when interpolation is performed using an average value of two pixels. If the prediction error is equal to or less than the threshold value, it means that the pixel may be thinned out, so that the control data (1 bit) from the comparison circuit 25 is set to "1". On the other hand, when the prediction error exceeds the threshold value, it means that interpolation cannot be performed satisfactorily on the receiving side, so the control data from the comparison circuit 25 is set to “0”. On / off of the gate circuit 27 is controlled by the control data. When the control data is "0", the gate circuit 27 is turned on, the original pixel data is taken out to the output terminal 28, and the control data becomes "1".
In this case, the gate circuit 27 is turned off, and the original pixel data is not taken out to the output terminal 28. Further, the control data is taken out to the output terminal 29 and transmitted together with the sub-sampled video data. That is, a framing circuit (not shown) is connected to the output terminals 28 and 29 (corresponding to the output terminal 107 in FIG. 1) of the sub-sampling encoder. In the case of synthesized and transmitted pixel data,
9-bit data is transmitted per pixel, and in the case of pixel data to be decimated, only 1-bit control data is transmitted per pixel.

As described above, sub-sampling is performed depending on whether or not the prediction error is large for each pixel. That is, the transmission / adaptation is performed adaptively for each pixel which is the minimum unit, not for the block unit.
Decimation is controlled. Also, when determining whether to perform thinning out by obtaining a prediction error, without using interpolation data,
Since actual data is used, repetitive processing can be avoided,
Real-time processing is possible.

e. Sub-sampling decoder FIG. 9 shows a sub-sampling decoder provided on the receiving side (in the case of a VTR or the like, the reproducing side). In FIG. 9, the received digital video signal is supplied to an input terminal indicated by 31, and a sampling clock synchronized with the received data is supplied to an input terminal indicated by 32.

Line delay circuits 33, 34, 35, 36 are connected in series to the input terminal 31. Input terminal 31 and line delay circuits 33-36
The serial-to-parallel conversion circuits 41, 42, 43,
44 and 45 are connected respectively. These serial-to-parallel conversion circuits 41 to 45 sequentially receive the respective received data of different lines by the sampling clock, and latch the four pixel data by the output signal of the quarter frequency divider 37. When the next pixel data is input, five pixel data are generated in parallel. Therefore, at a certain timing, the pixels shown in FIG. 8 are output from each of the serial-to-parallel conversion circuits 41 to 45. For example, four pixel data (a1, b1, c1, d1) from the line delay circuit 36 are latched by the serial-to-parallel conversion circuit 45, and five pixel data combined with the next pixel data e1 are simultaneously serial-> Parallel conversion circuit 45
Arising from

Among the output signals of the serial-to-parallel conversion circuits 41 to 45, a5 to e5
And e1 to e4 are peripheral pixel data used for interpolation, and (4 × 4 = 16) pixels excluding these pixels are to be interpolated. 51, 52, 53 ... 68, 69
Indicate interpolation circuits and have the same configuration as each other. FIG. 10 specifically shows a configuration of the interpolation circuit 51.

The interpolation circuit 51 has input terminals 91, 92 and 93 and an output terminal 94. The input terminal 91 is supplied with image data c5 (including 1-bit control data) to be interpolated. Terminals 92 and 93 have peripheral pixel data e5 necessary for interpolation.
And a5 are supplied. Pixel data from the input terminals 92 and 93 are supplied to the addition circuit 95, and the output signal of the addition circuit 95 is 1 /
The signal is supplied to the doubler circuit 96. The output signal of the halving circuit 96 is an interpolation value in the average value interpolation. The pixel data from the input terminal 91 and the output signal of the halving circuit 96 are supplied to the selector 97.

The selector 97 is controlled by 1-bit control data included in the pixel data from the input terminal 92. When the control data is “1” (thinning-out), the selector 97 outputs the output of the half circuit 96. When a signal is selected and the control data is "0" (transmission), the selector 97 selects the image data from the input terminal 91. The output signal of the selector 97 is obtained at the output terminal 94.

When the original pixel data is the thinned pixel, the interpolation values obtained from each of the interpolation circuits 51 to 69 are as follows.

Interpolator 51: c5 → 1/2 (a5 + e5) Interpolator 52: e4 → 1/2 (e3 + e5) Interpolator 53: c4 → 1/2 (c3 + c5) Interpolator 54: a4 → 1/2 (a3 + a5) Interpolator 55: d4 → 1/2 (c4 + e4) Interpolator 56: b4 → 1/2 (a4 + c4) Interpolator 57: e3 → 1/2 (e1 + e5) Interpolator 58: a3 → 1/2 (a1 + a5) Interpolator 59: c3 → 1/2 (a3 + e3) Interpolator 60: d3 → 1/2 (c3 + e3) Interpolator 61: b3 → 1/2 (a3 + c3) Interpolator 62: e2 → 1/2 (e1 + e3) Interpolator 63: c2 → 1/2 (c1 + c3) Interpolator 64: a2 → 1/2 (a1 + a3) Interpolator 65: d2 → 1/2 (c2 + e2) Interpolator 66: b2 → 1/2 (a2 + c2) Interpolator 67: c1 → 1 / 2 (a1 + e1) Interpolator 68: d1 → 1/2 (c1 + e1) Interpolator 69: b1 → 1/2 (a1 + c1) Among the output signals from the above-described interpolators 51 to 69, (4 ×
16 pixel data included in the range of 4) are supplied to the parallel-to-serial conversion circuits 71, 72, 73, and 74 for every four pixels in the same line. These parallel-to-serial conversion circuits 71 to 74 include:
The four pixel data after interpolation are respectively latched by the output signal of the 1/4 frequency dividing circuit 37. The parallel-to-serial conversion circuits 71 to 74 output serial restored data in synchronization with the sub-sampling clock from the terminal 32. It should be noted that the pixel data entered in FIG. 9 is, of course, different when the next clock is generated from the 1/4 frequency divider 37. That is, the pixel data a1, a2, a3, a4, and a5 of the serial-to-parallel conversion circuits 41 to 45 are pixel data e1, e2, and e5, respectively.
Replaced by 3, e4, e5.

The restored data from the parallel-to-serial conversion circuit 71 is supplied to the line delay circuit 75, and the output data of the line delay circuit 75 and the restored data from the parallel-to-serial conversion circuit 72 are supplied to the selector 76. The output data of the selector 76 is a line delay circuit 77
The output data of the line delay circuit 77 and the restored data from the parallel-to-serial conversion circuit 73 are supplied to the selector 78. The output data of the selector 78 is supplied to the line delay circuit 79, and the output data of the line delay circuit 79 and the restored data from the parallel → serial conversion circuit 74 are supplied to the selector 80. These line delay circuits 75, 77, 79 and selectors 76, 78, 80
Is provided to convert the order of the restored data into the same order as that of the television scanning. The output terminal 81 of the selector 80 obtains the restored data in the order of the television scanning.

f. Modification In the present invention, when transmitting an interpolation value, the original data is replaced with the interpolation value, a prediction error is detected using the interpolation value,
The selection of transmission and thinning may be determined based on the prediction error.

Further, the present invention can be applied to a case where the present invention is used in combination with another high efficiency code. The present applicant divides a screen into a number of blocks, obtains a dynamic range for each block, divides this dynamic range into a number of areas determined by a fixed or variable number of bits, and to which the pixel data after the minimum value removal belongs. A code (referred to as ADRC) applicable to a dynamic range for transmitting a code signal corresponding to a region has been previously proposed.

As shown in FIG. 11, a sub-sampling encoder 152 similar to the above is connected to an input terminal 151 to which a digital video signal is supplied, and an ADRC encoder 153 is connected to the sub-sampling encoder 152. ADRC
The encoder 153 converts the transmitted pixel data into a code signal having a bit number shorter than the original bit number, and
In 4, an output signal with a reduced data amount is obtained.

A decoder system corresponding to the encoder system shown in FIG. 11 includes, as shown in FIG. 12, an ADRC decoder 156 connected to an input terminal 155 to which received data is supplied, and an ADRC decoder 156.
The sub-sampling decoder 157 has the same configuration as that shown in FIG. 9 to which the restored data is supplied from the RC decoder 156. The restored data is obtained at the output terminal 158.

Further, the control data in the present invention may be encoded by run-length encoding.

〔The invention's effect〕

According to the present invention, the noise component is removed by the non-linear filter before the adaptive variable sub-sampling is performed. Therefore, it is possible to prevent a prediction error from being increased due to the noise component and a reduction in pixels to be thinned out. . Therefore, the compression ratio is prevented from being reduced by the noise component.
By removing the noise, it is possible to prevent noise in the image from being noticeable. The adaptive sampling according to the present invention, unlike the method of switching the sub-sampling pattern on a block basis, can prevent the degradation of restored pixels from being noticeable on a block basis, and has very good adaptability to image features. Sub-sampling is performed, and the restored image quality can be improved.

[Brief description of the drawings]

FIG. 1 is a block diagram of an embodiment of the present invention, FIG. 2 is a block diagram of an example of a noise removing filter that can be used in the present invention, and FIG. 3 is a schematic line showing an arrangement of pixels used for explaining the noise removing filter. FIG. 4 is a block diagram of another example of the noise elimination filter usable in the present invention. FIG. 5 is a block diagram of another example of the noise elimination filter usable in the present invention. FIG. 6 is a noise elimination filter. FIG. 7 is a block diagram of an example of a sub-sampling encoder that can be used in the present invention, FIG. 8 is a schematic diagram used for describing a sampling ring pattern, and FIG.
FIG. 10 is a block diagram of a sampling encoder and a corresponding sampling decoder. FIG. 10 is a block diagram showing an example of a specific configuration of an interpolation circuit provided in the sampling encoder. FIG. 11 is a block diagram of an example of an encoder system. The figure is a block diagram of an example of a decoder system. Description of main reference numerals in the drawings 101: input terminal, 103, 105: noise removal filter, 106: sampling encoder, 107: output terminal.

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁶ , DB name) H04N 7/24-7/68 H04N 1/41-1/419

Claims (2)

(57) [Claims] 1. A means for extracting a plurality of peripheral pixels of a target pixel of a plurality of pixels having a temporal or spatial arrangement as reference pixels, wherein: ,
A noise removing circuit for selectively outputting an intermediate value; and an adaptive variable sampling means provided at a subsequent stage of the noise removing circuit, wherein the adaptive variable sampling means is arranged regularly among the plurality of pixels. Interpolation prediction means for performing a first interpolation prediction of a first density in the vertical or horizontal direction using the basic pixels, which is always transmitted, and a threshold value of the prediction error of the first interpolation prediction. When the prediction error of the first interpolation prediction is larger than the threshold value, an original pixel signal is transmitted. When the prediction error is smaller than the threshold value, the first interpolation prediction is performed. And using the base pixel and one of the original pixel signal or the interpolation value to obtain a second density in the vertical or horizontal direction that is finer than the first density. The second interpolation prediction is performed. When the prediction error of the interpolation prediction is larger than the threshold value, the original pixel signal or the interpolation value obtained in the first interpolation prediction is transmitted, and when the prediction error is smaller than the threshold value, Determining means for performing a determination so as to replace with the interpolation value obtained in the second interpolation prediction; and in response to the determination by the determining means, a bit indicating whether to transmit the original pixel signal other than the basic pixel. And a bit map generating means for allocating to all pixels of the image signal. 2. A means for extracting a plurality of peripheral pixels of a target pixel of a plurality of pixels having a temporal or spatial arrangement as reference pixels, wherein the plurality of reference pixels include a plurality of reference pixels and a value of the target pixel. ,
Detecting a maximum value and a minimum value, and selectively outputting an intermediate value between the value of the target pixel and the maximum value and the minimum value or a value obtained by adding an offset to the value of the maximum value and the minimum value. And a variable adaptive sampling means provided at a subsequent stage of the noise removing circuit. The adaptive variable sampling means is regularly located in the plurality of pixels and is always transmitted. An interpolation prediction means for performing a first interpolation prediction of a first density in a vertical or horizontal direction using a basic pixel; comparing a prediction error of the first interpolation prediction with a threshold value; When the prediction error of the interpolation prediction is larger than the threshold value, the original pixel signal is transmitted. When the prediction error is smaller than the threshold value, the original pixel signal is replaced with the interpolation value obtained by the first interpolation prediction. And the basic pixel and the original image A second interpolation prediction of a second density in the vertical or horizontal direction, which is finer than the first density, is performed using the signal or one of the interpolation values, and the prediction error of the second interpolation prediction is When the value is larger than the threshold value, the original pixel signal or the interpolated value obtained in the first interpolation prediction is transmitted. When the prediction error is smaller than the threshold value, the signal is transmitted in the second interpolation prediction. Determining means for performing a determination to replace with the obtained interpolation value, and in response to the determination by the determining means, a bit indicating whether to transmit the original pixel signal is set for all pixels other than the basic pixel. And a bitmap generating means for allocating the image signal.