JP2862370B2 - Current detection circuit - Google Patents

Current detection circuit

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Publication number
JP2862370B2
JP2862370B2 JP33314290A JP33314290A JP2862370B2 JP 2862370 B2 JP2862370 B2 JP 2862370B2 JP 33314290 A JP33314290 A JP 33314290A JP 33314290 A JP33314290 A JP 33314290A JP 2862370 B2 JP2862370 B2 JP 2862370B2
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JP
Japan
Prior art keywords
current
voltage
resistor
power supply
load
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP33314290A
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Japanese (ja)
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JPH04203971A (en
Inventor
宏典 田中
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ADOBANTESUTO KK
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ADOBANTESUTO KK
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Priority to JP33314290A priority Critical patent/JP2862370B2/en
Publication of JPH04203971A publication Critical patent/JPH04203971A/en
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  • Amplifiers (AREA)

Description

【発明の詳細な説明】 「産業上の利用分野」 この発明は例えば電圧を負荷に印加し、その時負荷に
流れる電流を測定する電圧印加電流測定器に用いられ、
増幅器の出力端子と負荷の一端との間に電流検出抵抗器
が直列に接続され、その電流検出抵抗器の両端間の電圧
から負荷に流れる電流を検出する電流検出回路に関す
る。
DETAILED DESCRIPTION OF THE INVENTION "Industrial application field" The present invention is used, for example, in a voltage applied current measuring device which applies a voltage to a load and measures a current flowing through the load at that time.
The present invention relates to a current detection circuit in which a current detection resistor is connected in series between an output terminal of an amplifier and one end of a load, and detects a current flowing to the load from a voltage between both ends of the current detection resistor.

「従来の技術」 第6図に従来の電流検出回路を示す。増幅器11の反転
入力端子が入力抵抗器12を通じて電圧源13に接続され、
増幅器11の非反転入力端子が接地され、出力端子14が電
流検出抵抗器15を通じて負荷16の一端に接続され、その
負荷16及び電流検出抵抗器15の接続点17が帰還抵抗器18
を通じて増幅器11の反転入力端子に接続され、負荷16の
他端は接地される。増幅器11の出力端子14は抵抗器19−
21を通じて接地され、接続点17は抵抗器22−23を通じて
接地され、抵抗器19,21の接続点は演算増幅器24の非反
転入力端子に接続され、抵抗器22,23の接続点は演算増
幅器24の反転入力端子に接続され、この反転入力端子は
帰還抵抗器25を通じて演算増幅器24の出力端子に接続さ
れ、この出力端子は電流検出出力端子26に接続される。
演算増幅器24、抵抗器19,21,22,23,25により差動増幅回
路27が構成される。
[Prior Art] FIG. 6 shows a conventional current detection circuit. The inverting input terminal of the amplifier 11 is connected to the voltage source 13 through the input resistor 12,
The non-inverting input terminal of the amplifier 11 is grounded, the output terminal 14 is connected to one end of a load 16 through a current detection resistor 15, and a connection point 17 between the load 16 and the current detection resistor 15 is connected to a feedback resistor 18
Is connected to the inverting input terminal of the amplifier 11, and the other end of the load 16 is grounded. The output terminal 14 of the amplifier 11 is connected to a resistor 19−
The connection point 17 is grounded through a resistor 22-23, the connection point between the resistors 19 and 21 is connected to a non-inverting input terminal of an operational amplifier 24, and the connection point between the resistors 22 and 23 is an operational amplifier. The inverting input terminal is connected to an output terminal of an operational amplifier 24 via a feedback resistor 25, and the output terminal is connected to a current detection output terminal 26.
An operational amplifier 24 and resistors 19, 21, 22, 23 and 25 constitute a differential amplifier circuit 27.

電源13の出力電圧をE、抵抗器12,18の各抵抗値をR1,
R2とすると、接続点17の電圧Vlは、 となる。この電圧Vlが負荷16に印加され、その時、負荷
16に流れる電荷電流Ilは電流検出抵抗器15に流れ、これ
により電流検出抵抗器15に生じる電圧が差動増幅回路27
により検出されて、出力端子26へ出力される。つまり増
幅器11の出力端子14の電位(電流検出抵抗器15の一端の
電位)と、接続点17の電位(電流検出抵抗器15の他端の
電位)との差電圧と対応した電圧が出力端子26に得られ
る。抵抗器19,21,22,23,25の各抵抗値をR3,R4,R5,R6,
R7、電流検出抵抗器15の抵抗値をRS、出力端子14の電圧
をV0、抵抗器23,25の並列抵抗値をR6//R7とすると、電
流検出出力端子26に得られる出力電圧VIMは次式とな
る。
The output voltage of the power supply 13 is E, and the resistance values of the resistors 12 and 18 are R 1 ,
When R 2, the voltage V l of the connection point 17, Becomes This voltage Vl is applied to the load 16, at which time the load
The charge current Il flowing through the current detection resistor 16 flows through the current detection resistor 15, and the voltage generated at the current detection resistor 15 is changed by the differential amplifier circuit 27.
And output to the output terminal 26. That is, a voltage corresponding to a difference voltage between the potential of the output terminal 14 of the amplifier 11 (the potential at one end of the current detection resistor 15) and the potential of the connection point 17 (the potential at the other end of the current detection resistor 15) is output terminal. Obtained on 26. The resistance values of resistors 19, 21, 22, 23, 25 are represented by R 3 , R 4 , R 5 , R 6 ,
Assuming that R 7 , the resistance value of the current detection resistor 15 is R S , the voltage of the output terminal 14 is V 0 , and the parallel resistance value of the resistors 23 and 25 is R 6 // R 7 , a current detection output terminal 26 is obtained. The output voltage VIM is given by the following equation.

となるように抵抗器R3,R4,R5,R6,R7が選定されている。
よって電圧VIMを測定することにより、負荷電流Ilが(V
IM/RS)×(R5/R7)から求まる。
The resistors R 3 , R 4 , R 5 , R 6 and R 7 are selected so that
Therefore, by measuring the voltage V IM , the load current I l becomes (V
IM / R S ) × (R 5 / R 7 ).

「発明が解決しようとする課題」 (3)式が満足され、かつ演算増幅器24の同相電圧除
去比が大きくないと、増幅器11の出力電圧V0の大きさに
より検出電圧VIMが変動し、正しく負荷電流Ilを検出す
ることができない。特に出力電圧V0がRS・Ilに対して十
分大きいと、演算増幅器24に同相電圧V0が印加されたと
同様の状態になり、同相電圧除去比が大きくないと、誤
差が大きくなる。また出力電圧V0が大きいと、(3)式
が満足されず、これが小さな値をもっても誤差が大きく
なる。
"Problems that the Invention is to Solve" (3) is satisfied, and the common-mode voltage rejection ratio of the operational amplifier 24 is not large, the detection voltage V IM by the magnitude of the output voltage V 0 which amplifier 11 varies, The load current Il cannot be detected correctly. In particular, if the output voltage V 0 is sufficiently large with respect to R S · I l , the state becomes the same as when the common mode voltage V 0 is applied to the operational amplifier 24, and the error increases if the common mode voltage rejection ratio is not large. Further, when the output voltage V 0 is large, (3) is not satisfied, this error becomes larger with the smaller value.

従って抵抗器19,21,22,23,25として高精度の高価なも
のを必要とし、演算増幅器24として同相電圧除去比が大
きい高価なものを必要とする。
Accordingly, a high-precision and expensive resistor is required as the resistors 19, 21, 22, 23, and 25, and an expensive operational amplifier 24 having a large common-mode voltage rejection ratio is required.

「課題を解決するための手段」 請求項1の発明によれば、増幅器の出力端子と負荷の
一端との間に電流検出抵抗器が直列に接続され、その負
荷に流れる電流を、上記電流検出抵抗器の両端間電圧か
ら検出する電流検出回路において、基準電源の一方の出
力端子が上記電流検出抵抗器を介してベースに接続さ
れ、上記基準電源の他方の出力端子が抵抗を介してエミ
ッタに接続され、カレントミラー回路の第1電流がコレ
クタに供給されるトランジスタからなる電流変換回路
と、上記負荷の一端の電圧よりも絶対値の高い電源電圧
が供給され、上記第1電流を第2電流に変換する上記カ
レントミラー回路と、上記第2電流を電圧に変換して、
その電圧から上記負荷に流れる電流を検出する電流電圧
変換回路と、が設けられている。
According to the first aspect of the present invention, a current detection resistor is connected in series between the output terminal of the amplifier and one end of the load, and the current flowing through the load is detected by the current detection. In a current detection circuit for detecting a voltage between both ends of a resistor, one output terminal of a reference power supply is connected to a base via the current detection resistor, and the other output terminal of the reference power supply is connected to an emitter via a resistor. A current conversion circuit comprising a transistor connected to a collector to supply a first current of a current mirror circuit to a collector; and a power supply voltage having an absolute value higher than a voltage at one end of the load, and supplying the first current to a second current. The current mirror circuit for converting the second current into a voltage,
And a current-to-voltage conversion circuit for detecting a current flowing to the load from the voltage.

請求項2の発明によれば、増幅器の出力端子と負荷の
一端との間に電流検出抵抗器が直列に接続され、その負
荷に流れる電流を、上記電流検出抵抗器の両端間電圧か
ら検出する電流検出回路において、基準電源の一方の出
力端子が上記電流検出抵抗器を介してベースに接続さ
れ、上記基準電源の他方の出力端子が第1抵抗を介して
エミッタに接続され、第1カレントミラー回路の第1電
流がコレクタに供給される第1トランジスタからなる第
1電流変換回路と、上記基準電源の一方の出力端子が直
接ベースに接続され、上記基準電源の他方の出力端子が
第2抵抗を介してエミッタに接続され、第2カレントミ
ラー回路の第3電流がコレクタに供給される第2トラン
ジスタからなる第2電流変換回路と、上記負荷の一端の
電圧よりも絶対値の高い電源電圧が供給され、上記第1
電流を第2電流に変換する上記第1カレントミラー回路
と、上記負荷の一端の電圧よりも高い電源電圧が供給さ
れ、上記第3電流を第4電流に変換する上記第2カレン
トミラー回路と、上記第2電流と上記第4電流との差を
電圧に変換して、その電圧から上記負荷に流れる電流を
検出する電流電圧変換回路と、が設けられている。
According to the invention of claim 2, a current detection resistor is connected in series between the output terminal of the amplifier and one end of the load, and a current flowing through the load is detected from a voltage between both ends of the current detection resistor. In the current detection circuit, one output terminal of the reference power supply is connected to the base via the current detection resistor, the other output terminal of the reference power supply is connected to the emitter via the first resistor, and a first current mirror is provided. A first current conversion circuit comprising a first transistor for supplying a first current of the circuit to a collector, one output terminal of the reference power supply is directly connected to a base, and the other output terminal of the reference power supply is connected to a second resistor; A second current conversion circuit comprising a second transistor connected to the emitter via the second current mirror circuit and supplied to the collector of the second current mirror circuit, and having a higher absolute value than the voltage at one end of the load. Power supply voltage is supplied, the first
A first current mirror circuit that converts a current into a second current, a second current mirror circuit that is supplied with a power supply voltage higher than a voltage at one end of the load, and converts the third current into a fourth current; A current-voltage conversion circuit for converting a difference between the second current and the fourth current into a voltage and detecting a current flowing to the load from the voltage.

請求項3の発明によれば、増幅器の出力端子と負荷の
一端との間に電流検出抵抗器が直列に接続され、その負
荷に流れる電流を、上記電流検出抵抗器の両端間電圧か
ら検出する電流検出回路において、 基準電源の一方の出力端子が上記電流検出抵抗器を介
してベースに接続され、上記基準電源の他方の出力端子
が抵抗を介してエミッタに接続され、カレントミラー回
路の第1電流がコレクタに供給されるトランジスタから
なる電流変換回路と、上記負荷の一端の電圧よりも絶対
値の高い電源電圧が供給され、上記第1電流を第2電流
に変換する上記カレントミラー回路と、上記第2電流を
第3電流に変換して上記増幅器の入力側に負帰還する第
2電流変換回路と、が設けられている。
According to the invention of claim 3, a current detection resistor is connected in series between the output terminal of the amplifier and one end of the load, and a current flowing through the load is detected from a voltage between both ends of the current detection resistor. In the current detection circuit, one output terminal of a reference power supply is connected to a base via the current detection resistor, and the other output terminal of the reference power supply is connected to an emitter via a resistor. A current conversion circuit including a transistor whose current is supplied to a collector, a power supply voltage having an absolute value higher than a voltage at one end of the load, and a current mirror circuit configured to convert the first current into a second current; A second current conversion circuit that converts the second current into a third current and negatively feeds back to the input side of the amplifier.

「実施例」 第1図に請求項1の実施例を示し、第6図と対応する
部分に同一符号を付けてある。この実施例においては電
流検出抵抗器15の両端間電圧が電流変換回路28により第
1電流i1に変換される。つまり電流検出抵抗器15の負荷
側の一端はnpnトランジスタ29のベースに接続され、ト
ランジスタ29のエミッタは抵抗器31の一端に接続され、
電流検出抵抗器15の増幅器11側の一端は基準電源32の一
端に接続され、基準電源32の他端及び抵抗器31の他端は
互いに接続される。基準電源32の基準電圧VR1と、電流
検出抵抗器15で生じる電圧Il・RSと、トランジスタ29の
ベース、エミッタ間電圧VBE1とから抵抗器31に印加され
る電圧が決り、この抵抗器31に流れる電流がトランジス
タ29のコレクタ電流として流れ、このコレクタ電流が変
換された第1電流i1である。この電流変換回路28は負荷
電流Ilを直線的に第1電流i1に変換している。
"Embodiment" FIG. 1 shows an embodiment of claim 1 in which parts corresponding to those in FIG. 6 are denoted by the same reference numerals. The voltage across the current sensing resistor 15 is converted by the current converter circuit 28 to the first current i 1 in this embodiment. That is, one end of the current detection resistor 15 on the load side is connected to the base of the npn transistor 29, the emitter of the transistor 29 is connected to one end of the resistor 31,
One end of the current detection resistor 15 on the amplifier 11 side is connected to one end of the reference power supply 32, and the other end of the reference power supply 32 and the other end of the resistor 31 are connected to each other. The voltage applied to the resistor 31 is determined from the reference voltage V R1 of the reference power supply 32, the voltage I l · RS generated by the current detection resistor 15, and the voltage V BE1 between the base and the emitter of the transistor 29. the current flowing through the vessel 31 to flow as the collector current of the transistor 29, a first current i 1 to the collector current is converted. The current conversion circuit 28 is converted into a linearly first current i 1 the load current I l.

この第1電流i1はカレントミラー回路33で第2電流i2
に変換される。つまり電源34がダイオード35−抵抗器36
を通じてトランジスタ29のコレクタに接続され、このコ
レクタ、抵抗器36の接続点がpnpトランジスタ37のベー
スに接続され、トランジスタ37のエミッタは抵抗器38を
通じて電源34に接続される。電源34の電圧VDDは接続点1
7の負荷電圧Vlの最大値よりも高くされ、第1電流i1
常にトランジスタ29のコレクタよりエミッタに向って流
れるようにする。抵抗器36の第1電流i1による電圧降下
と、ダイオード35の順方向電圧と、トランジスタ37のベ
ース、エミッタ間電圧とから抵抗器38に印加される電圧
が決り、この抵抗器38に流れる電流がトランジスタ37の
コレクタ電流として流れ、このコレクタ電流が変換され
た第2電流i2となる。カレントミラー回路33は第1電流
i1を直線的に第2電流i2に変換する。
The first current i 1 is supplied to the current mirror circuit 33 by the second current i 2
Is converted to That is, the power supply 34 is a diode 35-a resistor 36
The collector of the transistor 29 is connected to the collector of the transistor 29. The connection point of the collector and the resistor 36 is connected to the base of the pnp transistor 37. The emitter of the transistor 37 is connected to the power supply 34 through the resistor 38. The voltage V DD of the power supply 34 is the connection point 1
7 load voltage is higher than the maximum value of V l of the first current i 1 is always to flow toward the emitter from the collector of the transistor 29. The voltage drop due to the first current i 1 of the resistor 36, and the forward voltage of the diode 35, the base of the transistor 37, the voltage applied from the emitter voltage to the resistor 38 determines the current flowing through the resistor 38 There flows as the collector current of the transistor 37, the collector current becomes the second current i 2 that has been converted. The current mirror circuit 33 is the first current
linearly converting the second current i 2 to i 1.

第2電流i2は電流電圧変換回路39により電圧に変換さ
れて電流検出出力端子26へ供給される。即ちトランジス
タ37のコレクタは抵抗器41を通じて基準電源42に接続さ
れると共に演算増幅器43の非反転入力端子に接続され、
演算増幅器43の反転入力端子と出力端子とは互いに接続
される。基準電源42は、基準電源32の基準電圧VR1の変
換電流に対応した電圧を差引くためのものであり、この
例では基準電源32の正側が電流検出抵抗器15に接続さ
れ、基準電源42の負側が抵抗器41に接続され、基準電源
42の正側は、測定の基準電位点(共通電位点)、この例
では接地電位点に接続される。第2電流i2により抵抗器
41に生じる電圧が電流検出出力端子26に得られる。
The second current i 2 is converted into a voltage by the current-voltage conversion circuit 39 and supplied to the current detection output terminal 26. That is, the collector of the transistor 37 is connected to the reference power supply 42 through the resistor 41 and to the non-inverting input terminal of the operational amplifier 43,
The inverting input terminal and the output terminal of the operational amplifier 43 are connected to each other. The reference power supply 42 is for subtracting a voltage corresponding to the converted current of the reference voltage V R1 of the reference power supply 32. In this example, the positive side of the reference power supply 32 is connected to the current detection resistor 15, and the reference power supply 42 Is connected to the resistor 41,
The positive side of 42 is connected to a reference potential point (common potential point) for measurement, in this example a ground potential point. Resistor with second current i 2
The voltage generated at 41 is obtained at the current detection output terminal 26.

次にこの電流検出回路の動作を説明する。負荷電流を
Il、電流検出抵抗器15の抵抗値をRS、基準電源32の基準
電圧をVR1、トランジスタ29のベース、エミッタ間電圧
をVBE1、抵抗器31の抵抗値をR8とすると、第1電流i1
次式となる。
Next, the operation of the current detection circuit will be described. Load current
Assuming that I l , the resistance value of the current detection resistor 15 is R S , the reference voltage of the reference power supply 32 is V R1 , the voltage between the base and the emitter of the transistor 29 is V BE1 , and the resistance value of the resistor 31 is R 8 , One current i 1 is given by the following equation.

抵抗器36,38の各抵抗値をR9,R10、ダイオード35の順
方向降下電圧をVD、トランジスタ37のベース、エミッタ
間電圧をVBE2とすると第2電流i2は次式となる。
Assuming that the resistance values of the resistors 36 and 38 are R 9 and R 10 , the forward drop voltage of the diode 35 is V D , and the voltage between the base and the emitter of the transistor 37 is V BE2 , the second current i 2 is given by the following equation. .

抵抗器41の抵抗値をR11、基準電源42の基準電圧をVR2
とすると、電流検出出力端子26に得られる電圧VIMは次
式となる。
The resistance value of the resistor 41 is R 11 and the reference voltage of the reference power supply 42 is V R2
Then, the voltage VIM obtained at the current detection output terminal 26 is expressed by the following equation.

VIM=R11・i2−VR2 (6) (4)〜(6)式まとめると、負荷電流Ilと出力電圧
VIMとの関係は次式となる。
When V IM = R 11 · i 2 -V R2 (6) (4) ~ (6) are summarized formula, the load current I l and the output voltage
The relationship between the V IM becomes the following equation.

ここでVBE1=VBE2=VD=0.6(V)とし、VR1=VR2
0.6(V),R8=R9=R10=R11に選定すると、 VIM=−RS・Il (8) となる。このように検出電圧VIMは増幅器11の出力電圧V
0に無関係となる。同相電圧除去に影響するのは、電流
変換回路28の共通電位点に対する絶縁抵抗RUのみであ
り、高い精度の測定が可能である。なお、VBE1=VBE2
VDとすることは比較的容易であり、R8=R9=R10=R11
これを高精度にしなくても、出力電圧VDにより影響され
ることがないことは(7)式から明らかである。
Here, V BE1 = V BE2 = V D = 0.6 (V), and V R1 = V R2 +
When 0.6 (V) and R 8 = R 9 = R 10 = R 11 are selected, V IM = −R S · I l (8). Thus, the detection voltage VIM is equal to the output voltage V of the amplifier 11.
Be independent of 0 . To affect the common-mode voltage rejection is only insulation resistance R U with respect to the common potential point of the current conversion circuit 28, it is possible to measure with high accuracy. Note that V BE1 = V BE2 =
It is relatively easy to make V D, and R 8 = R 9 = R 10 = R 11 is not affected by the output voltage V D even if it is not made to be highly accurate. It is clear from

第1図ではカレントミラー回路33を負荷電圧Vlの最大
値よりも高い電圧で動作させたが、カレントミラー回路
33を負荷電圧Vlの最小値より低い電圧で動作させること
もできる。その例を第2図に第1図と対応する部分に同
一符号を付けて示す。この例では電流変換回路28でトラ
ンジスタ29はpnpトランジスタが用いられ、基準電源32
の負側が電流検出抵抗器15側に接続される。またカレン
トミラー回路33でトランジスタ37としてnpnトランジス
タが用いられ、電源34の負側がダイオード35、抵抗器38
に接続される。電流電圧変換回路39で基準電源42は正側
が抵抗器41側に接続される。
In FIG. 1, the current mirror circuit 33 is operated at a voltage higher than the maximum value of the load voltage Vl.
33 may be operated at a voltage lower than the minimum value of the load voltage Vl . An example is shown in FIG. 2 by attaching the same reference numerals to parts corresponding to FIG. In this example, a pnp transistor is used as the transistor 29 in the current conversion circuit 28, and the reference power supply 32
Is connected to the current detection resistor 15 side. In the current mirror circuit 33, an npn transistor is used as the transistor 37, and the negative side of the power supply 34 is a diode 35 and a resistor 38.
Connected to. In the current-voltage conversion circuit 39, the positive side of the reference power supply 42 is connected to the resistor 41 side.

上述では電流変換回路28及びカレントミラー回路33を
接合トランジスタを用いて構成したがFETを用いて構成
してもよい。その例を第3図に示す。つまり電流変換回
路28において、増幅器11の出力端子14に基準電源32の正
側及び演算増幅器44の非反転入力端子に接続され、基準
電源32の負側と接続点17との間に抵抗器45−46が接続さ
れ、抵抗器45,46の接続点は演算増幅器44の反転入力端
子に接続され、演算増幅器44の出力端子がFET47のゲー
トに接続され、FET47のソースが抵抗器45,46の接続点に
接続される。
In the above description, the current conversion circuit 28 and the current mirror circuit 33 are configured using junction transistors, but may be configured using FETs. An example is shown in FIG. That is, in the current conversion circuit 28, the output terminal 14 of the amplifier 11 is connected to the positive side of the reference power supply 32 and the non-inverting input terminal of the operational amplifier 44, and the resistor 45 is connected between the negative side of the reference power supply 32 and the connection point 17. −46 is connected, the connection point of the resistors 45 and 46 is connected to the inverting input terminal of the operational amplifier 44, the output terminal of the operational amplifier 44 is connected to the gate of the FET 47, and the source of the FET 47 is connected to the resistors 45 and 46. Connected to a connection point.

抵抗器45,46の各抵抗値をR12,R13、とすると、演算増
幅器44の反転入力端子、非反転入力端子は、帰還作用に
より、同電位、つまり増幅器11の出力端子14の出力電圧
V0となる。従って、抵抗器45を流れる電流i01はVR1/R12
となり、接続点17の負荷電圧Vlと出力電圧V0との差、つ
まり電流検出抵抗器15の両端間電圧Vl−V0=Vbが抵抗器
46に印加される。従って抵抗器46に流れる電流io2はVb/
R13となる。FET47を流れる電流i1と抵抗器46を流れる電
流i02との和が抵抗器45に流れるから、i1=i01−io2
(VR1/R12)−(Vb/R13)となり、電流検出抵抗器15に
生じた電圧Vbが第1電流i1に変換される。
Assuming that the resistance values of the resistors 45 and 46 are R 12 and R 13 , the inverting input terminal and the non-inverting input terminal of the operational amplifier 44 have the same potential due to the feedback action, that is, the output voltage of the output terminal 14 of the amplifier 11.
The V 0. Therefore, the current i 01 flowing through the resistor 45 is V R1 / R 12
Next, the difference between the load voltage V l and the output voltage V 0 which connection point 17, that is, the voltage across V l -V 0 = V b of the current detection resistor 15 resistor
Applied to 46. Therefore, the current i o2 flowing through the resistor 46 is V b /
The R 13. Since the sum of the current i 1 flowing through the FET 47 and the current i 02 flowing through the resistor 46 flows through the resistor 45, i 1 = i 01 −i o2 =
(V R1 / R 12) - (V b / R 13) , and the voltage V b generated in the current detecting resistor 15 is converted to a first current i 1.

カレントミラー回路33においてはFET47のドレインが
抵抗器36を通じて電源34に接続されると共に演算増幅器
48の非反転入力端子に接続され、演算増幅器48の反転入
力端子が抵抗器58を通じて電源34に接続され、演算増幅
器48の出力端子がFET49のゲートに接続され、FET49のソ
ースが演算増幅器48の反転入力端子に接続される。第1
電流i1により抵抗器36に生じる電圧と、FET49を流れる
第2電流i2により抵抗器38に生じる電圧とが等しくなる
ように、第2電流i2が流れて、第1電流i1が第2電流i2
に変換される。このようにすると、FET47,49の各ゲー
ト、ソース間電圧が演算増幅器44,48でそれぞれ補償さ
れ、それだけ正確に電流検出を行うことができる。
In the current mirror circuit 33, the drain of the FET 47 is connected to the power supply 34 through the resistor 36 and the operational amplifier
48, the inverting input terminal of the operational amplifier 48 is connected to the power supply 34 through the resistor 58, the output terminal of the operational amplifier 48 is connected to the gate of the FET 49, and the source of the FET 49 is connected to the operational amplifier 48. Connected to inverting input terminal. First
A voltage generated in the resistor 36 by the current i 1, so that the voltage becomes equal occurring resistor 38 by the second current i 2 flowing through the FET 49, a second current i 2 flows, the first current i 1 is the 2 current i 2
Is converted to In this way, the voltages between the gates and the sources of the FETs 47 and 49 are compensated by the operational amplifiers 44 and 48, respectively, so that the current can be detected accurately.

第4図に請求項2の実施例を示す。第1図と対応する
部分に同一符号を付けてある。電源51が第1図中の基準
電源32の代りに用いられる。出力端子14がnpnトランジ
スタ52のベースに接続され、トランジスタ52のエミッタ
が抵抗器53を通じて、抵抗器31及び電源51の接続点に接
続される。トランジスタ29、抵抗器31、電源51により接
続点17の負荷電圧Vlを電流i1に変換する電圧電流変換回
路54が構成され、トランジスタ52、抵抗器53、電源51に
より出力端子14の出力電圧V0を電流i3に変換する電圧電
流変換回路55が構成される。電流i1はカレントミラー回
路33で電流i2に変換される。トランジスタ52のコレクタ
がダイオード56−抵抗器57を通じて電源34に接続され
る、と共にpnpトランジスタ58のベースに接続され、ト
ランジスタ58のエミッタが抵抗器59を通じて電源34に接
続される。ダイオード56、抵抗器57,59、トランジスタ5
8、電源34により、電流i3を電流i4に変換するカレント
ミラー回路61が構成される。
FIG. 4 shows a second embodiment of the present invention. Parts corresponding to those in FIG. 1 are denoted by the same reference numerals. A power supply 51 is used instead of the reference power supply 32 in FIG. The output terminal 14 is connected to the base of the npn transistor 52, and the emitter of the transistor 52 is connected through the resistor 53 to the connection point between the resistor 31 and the power supply 51. Transistor 29, resistor 31, the voltage-current conversion circuit 54 which converts the load voltage V l the connection point 17 to the current i 1 by the power source 51 is configured, transistor 52, resistor 53, the output voltage of the output terminal 14 by power supply 51 voltage-current conversion circuit 55 for converting the V 0 to the current i 3 is formed. The current i 1 is converted by the current mirror circuit 33 into a current i 2 . The collector of transistor 52 is connected to power supply 34 through diode 56-resistor 57, and is connected to the base of pnp transistor 58, and the emitter of transistor 58 is connected to power supply 34 through resistor 59. Diode 56, resistors 57, 59, transistor 5
8, the power source 34, current mirror circuit 61 which converts the current i 3 to the current i 4 is formed.

トランジスタ37のコレクタが演算増幅器62の反転入力
端子に接続され、トランジスタ58のコレクタが演算増幅
器62の非反転入力端子に接続されると共に抵抗器63を通
じて接地され、演算増幅器62の反転入力端子とその出力
端子とが抵抗器64で接続される。演算増幅器62、抵抗器
63,64は電流電圧変換回路65を構成し、トランジスタ37
よりの電流i2とトランジスタ58よりの電流i4との差に比
例した電圧を電流検出出力端子26に出力する。このよう
にして電流検出抵抗器15に生じた電圧RS・Ilに応じた電
圧が出力端子26に得られる。この場合は、電圧電流変換
回路54,55として電源51を共通に利用しており、その電
圧に対応する変換電流は電流電圧変換回路65で互いに差
し引かれるため、第1図における基準電源32のような安
定な基準電圧が得られるものを必要としない。
The collector of the transistor 37 is connected to the inverting input terminal of the operational amplifier 62, the collector of the transistor 58 is connected to the non-inverting input terminal of the operational amplifier 62, and is grounded through the resistor 63. The output terminal is connected by a resistor 64. Operational amplifier 62, resistor
63 and 64 constitute a current-voltage conversion circuit 65, and a transistor 37
And outputs a voltage proportional to the difference between the current i 4 than more current i 2 and the transistor 58 to the current detection output terminal 26. In this way, a voltage corresponding to the voltage RS · Il generated at the current detection resistor 15 is obtained at the output terminal 26. In this case, the power supply 51 is commonly used as the voltage-to-current conversion circuits 54 and 55, and the conversion currents corresponding to the voltages are subtracted from each other by the current-voltage conversion circuit 65. There is no need for a device capable of obtaining a stable reference voltage.

第5図に請求項3の発明の実施例を示す。この例にお
いても第1図と同様に電流変換回路28で電流検出抵抗器
15の両端間電圧が第1電流i1に変換され、この第1電流
i1がカレントミラー回路33で第2電流i2に変換される
が、この実施例ではこの第2電流i2は電流変換回路66に
より電流i5に変換されて増幅器11の反転入力端子に増帰
還供給される。つまりトランジスタ37のコレクタがnpn
トランジスタ67のコレクタに接続され、トランジスタ67
のエミッタが抵抗器68を通じて接地され、ベースが電源
69に接続され、トランジスタ67のコレクタが増幅器11の
反転入力端子に接続される。第1図中の帰還抵抗器18は
省略される。
FIG. 5 shows an embodiment of the third aspect of the present invention. In this example, as in FIG.
15 is converted into a first current i 1 , and this first current i 1
i 1 but is converted to the second current i 2 by the current mirror circuit 33, increasing in this embodiment the second current i 2 is converted into a current i 5 by a current converter 66 to the inverting input terminal of the amplifier 11 Returned and supplied. That is, the collector of transistor 37 is npn
Connected to the collector of transistor 67, transistor 67
Emitter is grounded through a resistor 68 and the base is
Connected to 69, the collector of the transistor 67 is connected to the inverting input terminal of the amplifier 11. The feedback resistor 18 in FIG. 1 is omitted.

トランジスタ67には、電源69の電圧で決る一定電流i6
が流れ、この電流i6とカレントミラー回路33の電流i2
の差の電流i5が電流変換回路66の出力として増幅器11の
反転入力端子に帰還される。この結果電流検出抵抗器15
の両端間電圧が一定値となるように作用する。つまりこ
の回路は電流発生器として使用できる。
The transistor 67 has a constant current i 6 determined by the voltage of the power supply 69.
Flow, current i 5 of the difference between the current i 2 of the current i 6 and a current mirror circuit 33 is fed back to the inverting input terminal of amplifier 11 as an output of the current converter circuit 66. As a result, the current detection resistor 15
In such a manner that the voltage between both ends becomes constant. That is, this circuit can be used as a current generator.

第3図乃至第5図の例においても、第2図の例のよう
にカレントミラー回路33,61をそれぞれ負荷電圧Vlの最
小値よりも低い電源で動作させるように構成してもよ
い。また第2図、第4図、第5図において、電流変換回
路、電圧電流変換回路、カレントミラー回路をそれぞれ
FETを用いて構成してもよい。
In the example of FIG. 3 to FIG. 5, it may be configured to operate at a lower power than the minimum value of the respective load voltage V l the current mirror circuit 33, 61 as in the example of FIG. 2. 2, 4, and 5, a current conversion circuit, a voltage-current conversion circuit, and a current mirror circuit are respectively shown.
You may comprise using FET.

「発明の効果」 以上述べたようにこの発明によれば、差動増幅器を使
用しないため、従来の回路で問題となった抵抗器19,21,
22,23,25を高精度のものとし、かつ演算増幅器24を同相
電圧除去比が著しく大きいものとする必要がなく、電流
検出抵抗器に負荷電流により生じる電圧を増幅器の出力
電圧V0に無関係に正しく検出することができる。
[Effect of the Invention] As described above, according to the present invention, since the differential amplifier is not used, the resistors 19, 21, and
The 22, 23, 25 and of high precision, and the operational amplifier 24 there is no need assume is remarkably large common-mode voltage rejection ratio, regardless of the voltage caused by the load current to the current detection resistor to the output voltage V 0 which amplifier Can be detected correctly.

【図面の簡単な説明】[Brief description of the drawings]

第1図は請求項1の発明の実施例を示す接続図、第2図
及び第3図はそれぞれその変形例を示す接続図、第4図
は請求項2の発明の実施例を示す接続図、第5図は請求
項3の発明の実施例を示す接続図、第6図は従来の電流
検出回路を示す接続図である。
FIG. 1 is a connection diagram showing an embodiment of the first aspect of the invention, FIGS. 2 and 3 are connection diagrams each showing a modified example thereof, and FIG. 4 is a connection diagram showing an embodiment of the second aspect of the invention. FIG. 5 is a connection diagram showing an embodiment of the third aspect of the invention, and FIG. 6 is a connection diagram showing a conventional current detection circuit.

Claims (3)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】増幅器の出力端子と負荷の一端との間に電
流検出抵抗器が直列に接続され、その負荷に流れる電流
を、上記電流検出抵抗器の両端間電圧から検出する電流
検出回路において、 基準電源の一方の出力端子が上記電流検出抵抗器を介し
てベースに接続され、上記基準電源の他方の出力端子が
抵抗を介してエミッタに接続され、カレントミラー回路
の第1電流がコレクタに供給されるトランジスタからな
る電流変換回路と、 上記負荷の一端の電圧よりも絶対値の高い電源電圧が供
給され、上記第1電流を第2電流に変換する上記カレン
トミラー回路と、 上記第2電流を電圧に変換して、その電圧から上記負荷
に流れる電流を検出する電流電圧変換回路と、 が設けられていることを特徴とする電流検出回路。
A current detecting circuit is connected in series between an output terminal of an amplifier and one end of a load, and detects a current flowing through the load from a voltage between both ends of the current detecting resistor. One output terminal of the reference power supply is connected to the base via the current detection resistor, the other output terminal of the reference power supply is connected to the emitter via the resistor, and the first current of the current mirror circuit is connected to the collector. A current conversion circuit including a transistor to be supplied; a power supply voltage having an absolute value higher than a voltage at one end of the load; a current mirror circuit configured to convert the first current into a second current; And a current-to-voltage conversion circuit that converts a voltage into a voltage and detects a current flowing to the load from the voltage.
【請求項2】増幅器の出力端子と負荷の一端との間に電
流検出抵抗器が直列に接続され、その負荷に流れる電流
を、上記電流検出抵抗器の両端間電圧から検出する電流
検出回路において、 基準電源の一方の出力端子が上記電流検出抵抗器を介し
てベースに接続され、上記基準電源の他方の出力端子が
第1抵抗を介してエミッタに接続され、第1カレントミ
ラー回路の第1電流がコレクタに供給される第1トラン
ジスタからなる第1電流変換回路と、 上記基準電源の一方の出力端子が直接ベースに接続さ
れ、上記基準電源の他方の出力端子が第2抵抗を介して
エミッタに接続され、第2カレントミラー回路の第3電
流がコレクタに供給される第2トランジスタからなる第
2電流変換回路と、 上記負荷の一端の電圧よりも絶対値の高い電源電圧が供
給され、上記第1電流を第2電流に変換する上記第1カ
レントミラー回路と、 上記負荷の一端の電圧よりも高い電源電圧が供給され、
上記第3電流を第4電流に変換する上記第2カレントミ
ラー回路と、 上記第2電流と上記第4電流との差を電圧に変換して、
その電圧から上記負荷に流れる電流を検出する電流電圧
変換回路と、 が設けられていることを特徴とする電流検出回路。
2. A current detection circuit comprising: a current detection resistor connected in series between an output terminal of an amplifier and one end of a load; and a current flowing through the load is detected from a voltage between both ends of the current detection resistor. One output terminal of the reference power supply is connected to the base via the current detection resistor, and the other output terminal of the reference power supply is connected to the emitter via the first resistor; A first current conversion circuit comprising a first transistor for supplying a current to a collector, one output terminal of the reference power supply being directly connected to a base, and the other output terminal of the reference power supply being an emitter via a second resistor; A second current conversion circuit comprising a second transistor connected to the second current mirror circuit and supplying a third current of the second current mirror circuit to a collector; and a power supply voltage having an absolute value higher than a voltage at one end of the load. Is supplied, the and the first current mirror circuit for converting the first current to the second current, power supply voltage higher than the voltage of one end of the load is supplied,
A second current mirror circuit for converting the third current to a fourth current; and converting a difference between the second current and the fourth current into a voltage,
And a current-to-voltage conversion circuit for detecting a current flowing to the load from the voltage.
【請求項3】増幅器の出力端子と負荷の一端との間に電
流検出抵抗器が直列に接続され、その負荷に流れる電流
を、上記電流検出抵抗器の両端間電圧から検出する電流
検出回路において、 基準電源の一方の出力端子が上記電流検出抵抗器を介し
てベースに接続され、上記基準電源の他方の出力端子が
抵抗を介してエミッタに接続され、カレントミラー回路
の第1電流がコレクタに供給されるトランジスタからな
る電流変換回路と、 上記負荷の一端の電圧よりも絶対値の高い電源電圧が供
給され、上記第1電流を第2電流に変換する上記カレン
トミラー回路と、 上記第2電流を第3電流に変換して上記増幅器の入力側
に負帰還する第2電流変換回路と、 が設けられていることを特徴とする電流検出回路。
3. A current detection circuit comprising: a current detection resistor connected in series between an output terminal of an amplifier and one end of a load; and a current flowing through the load is detected from a voltage between both ends of the current detection resistor. One output terminal of the reference power supply is connected to the base via the current detection resistor, the other output terminal of the reference power supply is connected to the emitter via the resistor, and the first current of the current mirror circuit is connected to the collector. A current conversion circuit including a transistor to be supplied; a power supply voltage having an absolute value higher than a voltage at one end of the load; a current mirror circuit configured to convert the first current into a second current; And a second current conversion circuit that converts the current to a third current and negatively feeds back to the input side of the amplifier.
JP33314290A 1990-11-29 1990-11-29 Current detection circuit Expired - Lifetime JP2862370B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP33314290A JP2862370B2 (en) 1990-11-29 1990-11-29 Current detection circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP33314290A JP2862370B2 (en) 1990-11-29 1990-11-29 Current detection circuit

Publications (2)

Publication Number Publication Date
JPH04203971A JPH04203971A (en) 1992-07-24
JP2862370B2 true JP2862370B2 (en) 1999-03-03

Family

ID=18262765

Family Applications (1)

Application Number Title Priority Date Filing Date
JP33314290A Expired - Lifetime JP2862370B2 (en) 1990-11-29 1990-11-29 Current detection circuit

Country Status (1)

Country Link
JP (1) JP2862370B2 (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5438483B2 (en) * 2008-12-16 2014-03-12 ローム株式会社 AMPLIFICATION CIRCUIT, ITS START-UP METHOD, AUDIO REPRODUCTION DEVICE USING THEM, AND ELECTRONIC DEVICE
FR3047806B1 (en) * 2016-02-15 2019-07-26 L-Acoustics DEVICE FOR MEASURING AN ELECTRICAL CURRENT GENERATED BY AN ACOUSTIC AMPLIFIER FOR ACOUSING AN ACOUSTICAL ENCLOSURE
GB2600723A (en) * 2020-11-06 2022-05-11 Thermo Fisher Scient Bremen Gmbh Ion detector current converter

Also Published As

Publication number Publication date
JPH04203971A (en) 1992-07-24

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