JP2861844B2 - Monolithic variable frequency divider - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a monolithic variable frequency divider, and more particularly to a monolithic variable frequency divider which can be used in a frequency synthesizer circuit for stabilizing a signal source in an ultra-high frequency band such as a millimeter wave band.

[0002]

2. Description of the Related Art Conventionally, a circuit type widely used as a frequency synthesizer circuit includes a pulse swallow counter, an n
There is known a device using a phase locked loop in which a frequency divider and a variable frequency divider having a (n + 1) frequency dividing (n is an integer) frequency dividing mode are combined. This conventional variable frequency divider is configured, for example, as shown in FIG.

In FIG. 7, this circuit is a so-called ring counting circuit for switching between frequency division by four and frequency division by five, which is a basic part of a variable frequency divider. That is, the high-frequency signal (frequency f _IN ) applied to the input terminal 1 includes three flip-flops (DFFs).
12, 13 and 14), the opposite-phase output terminal (Q bar) of the first stage DFF 12 is connected to the data input terminal D and the output terminal 2 of the middle stage DFF 13 and the middle stage DFF 13 Is the final stage DFF1
4 and one input terminal of the OR gate 15, the positive-phase output terminal of the final stage DFF 14 is connected to the other input terminal of the OR gate 15, and the output terminal of the OR gate 15 is connected to the first stage. Is connected to the data input terminal D of the DFF 12. The final stage DFF 14 has a clear end CR connected to the frequency division ratio switching control terminal 3, performs a frequency division operation of 4 and a frequency division operation of 5 according to a frequency division ratio control signal supplied from the outside, and outputs the output terminal 2. From the 4 divided signal (f _IN / 4) and the 5 divided signal (f
_IN / 5) is output.

On the basis of this circuit, frequency division by 8 and frequency division by 9, 1
A variable frequency divider such as frequency division by 6 and frequency division by 17 can be configured. That is, in order to increase the frequency division ratio based on this circuit, N stages of T flip-flops that perform a frequency division operation are added to the frequency division output terminal 2 of this circuit, and the outputs of the N T flip-flops are output. This is realized by branching each of them, taking the logical sum of these and the dividing ratio control signal supplied from the outside, applying the result to the dividing ratio switching control terminal 3, and feeding back to the clear end CR of the final stage DFF 14. it can.

[0005] The frequency divider constructed as described above has a 2 ^{2 + N}
The frequency division and the (2 ^{2 + N} +1) frequency division become variable. For example, N =
If it is set to 3, the frequency division of 32 and 33 is variable.

As described above, the conventional variable frequency divider is configured using digital logic operation, but usually has a more complicated circuit than a fixed frequency divider, and is composed of active elements constituting logic gates. Since the performance limit of a certain transistor and the gate delay time due to the complicated circuit configuration are large, the operable upper limit frequency is low. Therefore, in the conventional, Mi
When configuring a frequency synthesizer circuit that operates at an ultra-high frequency such as a L-wave band, a fixed frequency divider called a prescaler is provided in front of the variable frequency divider to divide the frequency up to the frequency at which the variable frequency divider can operate. Is adopted.

In the method in which a fixed frequency divider is provided in front, it is necessary for the frequency synthesizer to lower the phase comparison frequency in inverse proportion to the square of the fixed frequency division ratio with respect to the minimum frequency width of output frequency switching. The bandwidth of the phase locked loop is also narrow.

[0008]

In a frequency synthesizer circuit for stabilizing a signal source in an ultrahigh frequency band such as a millimeter wave band, spurious processing of a phase comparison frequency component can be performed, and the phase noise of the ultrahigh frequency signal source can be reduced. To be able to be compressed by a high-Q low-noise reference signal source, the phase locked loop bandwidth needs to be wide.

[0009] Therefore, since a conventional method in which a fixed frequency divider for narrowing the bandwidth of a phase locked loop is narrowed cannot be adopted, signals in an ultrahigh frequency band such as a millimeter wave band can be directly divided.
A variable frequency divider having a frequency dividing mode is required.

Here, the conventional variable frequency divider having the divide-by-2 mode uses an ECL (emitter coupled logic) type high-speed logic circuit using high-speed bipolar transistors in order to improve the operable frequency. Although it is configured, even if it is manufactured using the same process on the same semiconductor substrate due to signal delay due to the presence of a feedback circuit for variable frequency division, only an operating frequency of about half of the fixed frequency division can be obtained. However, it is not possible to manufacture a device that operates in an ultra-high frequency band such as a millimeter wave band with such a configuration, and therefore, there is a problem in how to configure the configuration.

An object of the present invention is to provide a frequency synthesizer circuit for stabilizing a signal source in an ultra-high frequency band such as a millimeter wave band in order to realize a frequency synthesizer circuit which operates in an ultra-high frequency band such as a millimeter wave band. An object of the present invention is to provide a monolithic variable frequency divider of a divide-by-2 mode type.

[0012]

In order to achieve the above object, a monolithic variable frequency divider according to the present invention has the following configuration. That is, monolithic variable frequency divider of the present invention, Mi
Frequency to stabilize ultra-high frequency signal source for L-band
Monolithic variable frequency divider usable for several synthesizer circuits
A splitter for splitting an input high-frequency signal into two;
Two analog frequency dividers for dividing the respective branch outputs of the branching device by different frequency division ratios; and a high-frequency switcher for switching and outputting the outputs of the two analog frequency dividers in accordance with a control signal supplied from the outside And can be integrated on a semiconductor substrate to directly divide an ultra-high frequency input signal in the millimeter wave band.
And said that the content was.

Specifically, the two analog frequency dividers are m
And n (m ≠ n) are integers, one analog divider outputs a (m + 1) -divided signal by a closed loop that is stabilized at a frequency of 1 / (m + 1) of the input frequency, and the other analog divider The frequency divider outputs a (n + 1) frequency-divided signal by a closed loop that is stabilized at a frequency of 1 / (n + 1) of the input frequency.

More specifically, the two analog frequency dividers each include a mixer having a branch output as one input;
A low-pass filter for extracting a low-frequency component from the output of the mixer; and a frequency multiplier for multiplying the output of the low-pass filter to the other input of the mixer;
When n (where m ≠ n) is a multiplier, a (m + 1) frequency-divided signal is obtained at the output of one low-pass filter, and the (n + 1) frequency-divided signal is obtained at the output of the other low-pass filter. Obtained
Respectively provided to a high-frequency switch.

Further, the branching device is constituted by a Wilkinson divider; and the mixer is constituted by a single balance diode mixer.

[0016]

Next, the operation of the monolithic variable frequency divider according to the present invention will be described. In the present invention, a circuit capable of operating in an ultra-high frequency band such as a millimeter wave band is integrally formed on a semiconductor substrate, such as a branching device, two analog frequency dividers, a high-frequency switch, and the like. Therefore, since a signal of an ultra-high frequency such as a millimeter wave can be directly divided, a high-performance and high-performance frequency synthesizer circuit in an ultra-high frequency band can be realized.

[0017]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows a monolithic variable frequency divider according to one embodiment of the present invention. In FIG. 1, this monolithic variable frequency divider comprises a splitter (DIV.) 4, two analog frequency dividers {(5, 7, 9) (6, 8, 10)}, and a high-frequency switch 11 as semiconductors. It is formed by being integrated on a substrate.

The splitter 4 splits the high-frequency signal having the frequency f _IN applied to the input terminal 1 into two, and _supplies the high-frequency signal to the corresponding one of the two analog frequency dividers. For example, as shown in FIG. 2, a Wilkinson divider formed of a microstrip line can be used for the branching device 4. In FIG. 2, an input signal to port 1 is branched to ports 2 and 3 with the same phase and the same power. The line impedance z ₀ is generally 50Ω in a microwave band or a millimeter wave band, so that the value of the resistance R is 100Ω.

The two analog dividers divide the respective branch outputs of the divider 4 at different division ratios. Specifically, the two analog frequency dividers include a mixer 5 (6) having a branch output as one input, a low-pass filter 7 (8) for extracting low-frequency components from the output of the mixer, and a low-pass filter 7 (8). The output of the filter is frequency-multiplied and provided to the other input of the mixer by a frequency multiplier 9 (10), which performs a frequency dividing operation as follows.

First, in an analog frequency divider composed of a mixer 5, a low-pass filter 7, a frequency multiplier 9, and a closed loop of the mixer 5, the low-pass filter 7 outputs the input frequency f _IN of the output of the mixer 5. The signal having a frequency of 1/4 is passed, and the frequency multiplier 9 multiplies the output of the low-pass filter 7 by 3 and feeds it back to the mixer 5, so that the mixer 5 has f _IN and (3/4) f _IN F _IN + (3/4) f _IN = (7/4)
the frequency component of _{f IN, f IN - (3/4} ) f IN = (1 /
4) Output the frequency component of f _IN , the former is removed by the low-pass filter 7, and the frequency of (１ ／) f _IN is multiplied by 3 by the frequency multiplier 9 to obtain the frequency of (3/4) f _IN Frequency
It is supplied to the mixer 5. Therefore, in this analog frequency divider, when the output frequency of the low-pass filter 7 becomes (１ ／) f _IN , a closed loop is established and the analog frequency divider becomes stable. When the multiplication number is m = 3, m + 1 = 4, that is, a divide-by-4 signal of the input frequency f _IN is output.

In an analog frequency divider composed of a mixer 6 → a low-pass filter 8 → a frequency multiplier 10 → a closed loop of the mixer 6, the low-pass filter 8 outputs the input frequency f _IN of the output of the mixer 6. The signal having a frequency of 1/5 is passed, and the frequency multiplier 10 multiplies the output of the low-pass filter 8 by 4 to obtain a mixer 6
, And the mixer 6 applies f _IN + (4/5) f _IN = (9 / f) to the input of both frequencies of f _IN and (4/5) f _IN.
5) the frequency component of _{f IN, f IN - (4/5} ) f IN = (1
/ 5) The frequency component of f _IN is output, the former is removed by the low-pass filter 8, and the frequency of (1/5) f _IN is multiplied by 4 by the frequency multiplier 10 to obtain (4/5) f _IN And supplied to the mixer 6. Therefore, in this analog frequency divider, the output frequency of the low-pass filter 8 is (1/5) f _IN
When it becomes, it becomes a closed loop and becomes stable. Multiplication number n = 4
In this case, n + 1 = 5, that is, a divide-by-5 signal of the input frequency f _IN is output.

The mixers (5, 6) can be constituted by, for example, a single balanced diode mixer as shown in FIG.
In FIG. 3, the balance / unbalance converter 31 includes:
The signal from the frequency multiplier is converted into a balanced signal and applied to both ends of two diodes (32, 33) connected in series. Further, the output of the splitter is applied to the midpoint of the diode (32, 33) via the high-pass filter. Then,
Due to the non-linearity of the voltage and current of the diode, a difference frequency between the output frequency of the branching device and the output frequency of the multiplier is obtained at the midpoint of the diode.
8) Take out with the same 35. Since the signal of the multiplier is canceled at the middle point of the diode, isolation between the input terminals of the high-pass filter 34 and the low-pass filter 35 can be obtained.

More specifically, the balance / unbalance converter 31 can be constituted by a hybrid ring composed of a microstrip line as shown in FIG. FIG.
In (a), arm 1 is an unbalanced input port,
Arms 2 and 4 are balanced input ports, and arm 3 is a matching termination port. The high-pass filter 34 is, for example, as shown in FIG.
As shown in FIG. 4B, the low-pass filter 35 is composed of a combination of a line serving as an inductance and a capacitor, as shown in FIG. 4C, for example.

The frequency multipliers (9, 10) are configured, for example, as shown in FIG. That is, the frequency multiplier (triple multiplier) 9 uses a varactor diode 53 as shown in FIG. The bandpass filter 52 is configured by a combination of a line serving as an inductance and a capacitor, for example, as shown in FIG.

On the other hand, the frequency multiplier (quadrature multiplier) 10
For example, as shown in FIG. 5C, two doublers 54 are connected in series. The doubler 54 is shown in FIG.
As shown in the figure, the balance-unbalance converters 55 and 2
It is composed of a number of diodes and an inductance (line). The input signal is canceled at the midpoint of the diode and 2
Only the second harmonic component is output.

Next, the high frequency switch 11 divides the frequency of the (1/4) f _IN obtained at the output of the low-pass filter 7 in accordance with the frequency division ratio control signal applied to the frequency division ratio switching control terminal 3. An output and a frequency-divided output of (1/5) f _IN obtained as an output of the low-pass filter 8 are selected, and the selected output is output from the output terminal 2 as a frequency-divided output to the outside.

The high-frequency switch 11 is specifically composed of four switches as shown in FIG. 6, for example.
Each switch is, for example, an FET switch, and controls conduction between a drain and a source according to a frequency division ratio control signal applied to a gate. That is, when the input 1 is derived to the output terminal, S ₁₁ = ON, S ₁₂ = S ₂₁ = OFF, and S ₂₂ = ON. When the input 2 is derived to the output terminal, S ₁₁ = OFF,
Control is performed so that S ₁₂ = S ₂₁ = ON and S ₂₂ = OFF.

As described above, the splitter 4 and the mixer (5,
6), low-pass filters (7, 8), frequency multipliers (9, 1)
0), all of the high-frequency switches 11 can be mounted on a semiconductor substrate. In particular, since the wavelength is short in an ultra-high frequency band such as a millimeter wave band, the distributed constant circuit has a very small size, and can be sufficiently mounted on a monolithic integrated circuit. The required performance of the semiconductor element that determines the upper limit of operation of the present circuit can also utilize, for example, the nonlinearity of a diode, and can be compared with a logic circuit using a transistor that requires a high gain at an operating frequency. It is much lighter. That is, it is possible to directly divide an ultra-high frequency signal such as a millimeter wave.

[0029]

As described above, the monolithic variable frequency divider according to the present invention is provided on a semiconductor substrate in the form of a splitter, two analog frequency dividers, a high-frequency switch, and the like in an ultra-high frequency band such as a millimeter wave band. Since an operable circuit is integrated and formed, an ultra-high frequency signal such as a millimeter wave can be directly frequency-divided, and there is an effect that a high-performance and high-performance frequency synthesizer circuit can be realized in an ultra-high frequency band.

[Brief description of the drawings]

FIG. 1 is a configuration block diagram of a monolithic variable frequency divider according to one embodiment of the present invention.

FIG. 2 is a conceptual diagram of a configuration of a Wilkinson divider which is an example of a branching device.

FIG. 3 is a configuration block diagram of a single balance diode mixer as an example of a mixer.

4A and 4B are specific examples of components of a single-balanced diode mixer. FIG. 4A is a conceptual diagram of a hybrid ring, FIG. 4B is a conceptual diagram of a high-pass filter, and FIG. 4C is a conceptual diagram of a low-pass filter. is there.

5A and 5B are specific configuration examples of a frequency multiplier. FIG. 5A is a configuration diagram of a tripler, FIG. 5B is a conceptual diagram of a bandpass filter (BPF), and FIG. 5C is a configuration diagram of a quadrupler. , (D) is a configuration diagram of the doubler.

FIG. 6 is a diagram illustrating a specific configuration example of a high-frequency switch.

FIG. 7 is a configuration block diagram of a conventional variable frequency divider.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Input terminal 2 Output terminal 3 Division ratio switching control terminal 4 Divider 5, 6 Mixer 7, 8 Low-pass filter 9, 10 Frequency multiplier 11 High-frequency switch

Claims (3)

(57) [Claims] 1. A monolithic variable frequency divider which can be used in a frequency synthesizer circuit for stabilizing an ultra-high frequency signal source intended for a millimeter wave band, comprising: a splitter for splitting an input high-frequency signal into two; Two analog frequency dividers for dividing the respective branch outputs with different frequency division ratios from each other.
And a single-balanced diode mixer
A low-frequency component from the output of the mixer.
A low-pass filter that extracts the minute;
Frequency multiplier that multiplies the wave number and supplies it to the other input of the mixer
Where n is the same as the integer m (where m ≠ n).
When it is a multiple, the output of one low-pass filter is (m +
1) A frequency-divided signal is obtained and output to the other low-pass filter.
(N + 1) an analog frequency divider for obtaining a frequency-divided signal; and a high-frequency switch for switching and outputting the outputs of the two analog frequency dividers in accordance with a control signal supplied from the outside; A monolithic variable frequency divider, which is capable of directly dividing an input signal of a waveband of an ultra-high frequency. 2. The two analog frequency dividers have m and n (m ≠).
When n) is an integer, one analog divider outputs a (m + 1) frequency-divided signal by a closed loop that is stabilized at a frequency of 1 / (m + 1) of the input frequency, and the other analog frequency divider outputs the input frequency. The monolithic variable frequency divider according to claim 1, wherein a (n + 1) frequency-divided signal is output by a closed loop stabilized at a frequency of 1 / (n + 1). 3. The monolithic variable frequency divider according to claim 1, wherein the branching device comprises a Wilkinson divider.