JP2857958B2 - Etching pot - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an etching pot capable of performing an etching process by individually storing semiconductor wafers.

[0002]

2. Description of the Related Art S is excellent in strength and easy to form an IC circuit.
A part of the i-substrate is thinned by etching to form a diaphragm to produce a small-sized pressure sensor, an example of which is shown in FIG. The figure shows a diaphragm forming surface (etching surface) 1b of the Si semiconductor wafer 1,
The inner periphery of each rectangular chip C cut out by dicing is etched to form a thin diaphragm C1.

Conventionally, in such an etching process, as shown in FIG. 5, a mask M having a predetermined pattern opening M1 formed thereon is applied to an etching surface 1b and a non-etching surface (circuit) opposite to the mask M is formed. Surface) 1
a is coated with a wax 91 and baked on a hot plate 93.
2 is attached and masked while being isolated from the etching solution.

That is, the wafer 1 to which the bake plate 92 is attached is set on a jig 95 in a processing tank 94 filled with an etching solution L, as shown in FIG. Etching liquid L
, The etching surface 1b of the wafer 1 is etched through the pattern opening M1 of the mask M, so that the etching liquid L is prevented from entering the circuit surface 1a to which the bake plate 92 is attached. After the processing is completed, the wafer 1 is
2 and washed with an organic solvent or the like.

The etching of the wafer 1 will be described in detail with reference to FIG. 7. The pattern opening M1 ((1) in the figure) of the mask M is sized to form a diaphragm having a predetermined shape, and the etching liquid L passes through the opening M1. Is etched as shown in FIG. 2B to form a concave with a deep, substantially trapezoidal cross-section, and the diaphragm 11 having a predetermined thickness d is formed at this portion. The pressure sensor detects the deformation of the diaphragm 11 due to the pressure difference applied to both surfaces,
Since the measurement is carried out by using a strain gauge formed in a, it is necessary to precisely control the thickness of the diaphragm 11.

Conventionally, as shown in FIG. 8, the thickness of a wafer 1 is measured one by one with a micro gauge 96 as shown in FIG. The etching process is performed in units.

[0007]

By the way, the required amount of etching processing is controlled in terms of time from the relationship between the bath temperature and the etching rate shown in FIG. Concentration changes and contamination occur during common use with a lot, and the etching rate often changes.

Therefore, it is necessary to periodically take out a sample wafer during the etching process and measure the thickness of the diaphragm 11 with a micro gauge as shown in FIG.
This has been a bottleneck in the automation of the etching process.

Further, even if the thickness of the sample wafer is accurately controlled, there is a problem that the thickness variation of each wafer in the lot remains as it is.

Further, in the lot processing, the etching amount cannot be controlled for each wafer, so that the production efficiency is low with respect to other kinds of small-quantity products.

An object of the present invention is to provide an etching pot capable of properly performing etching control for each semiconductor wafer, eliminating complicated manual operations, and realizing process automation. With the goal.

[0012]

An etching pot P according to the present invention comprises a base plate 2 having a receiving surface 2a for bringing a non-etched surface 1a of a semiconductor wafer 1 into close contact, and a cylindrical frame 3 provided. Sea its lower opening end face
And in close contact to the semiconductor wafer 1 outer circumferential edge of the opposite surface 1b and the non-etched surface 1a through le means 31, allowed holding an etching liquid L into the tubular space of the tubular frame 3 which closes the lower end, and the The lower end opening end face is provided with the sealing means 31.
The negative pressure is sealed in a closed space S formed between the semiconductor wafer 1 and the base plate 2 when the semiconductor wafer 1 comes into close contact with the outer peripheral edge of the semiconductor wafer 1 via the semiconductor wafer 1.

[0013]

In a preferred embodiment, the frame 3
Is hermetically covered with a removable cover plate 4.

[0015]

In the above-mentioned structure, the etching surface 1b, which is the opposite surface of the semiconductor wafer 1, has a frame 3 except for the outer peripheral edge thereof.
A predetermined portion of the mask opening is etched by being in contact with the etching solution L held in the cylindrical space. Since the semiconductor wafer 1 and the etchant L thereof are held in the etching pots P, respectively, the desired etchant concentration and temperature corresponding to each semiconductor wafer 1 are maintained, and the etching time can be easily controlled.

Further, the connection between the base plate 2 and the frame 3 can be easily performed by using a negative pressure sealed in the closed space S without using a mechanical connecting means. since also unnecessary, automation of the etching process can be easily realized. And do n’t use mechanical coupling
Therefore, no dust is generated.

In a preferred embodiment, the liquid concentration during the etching can be kept constant.

[0018]

Embodiment 1 In FIG. 1, an etching pot P has a wafer base 2 serving as a base plate, and the wafer base 2 has a shallow container shape having a vertical wall 21 formed on the outer periphery. The inner surface of the bottom wall of the container is a receiving surface 2 with a higher plane except for the outer peripheral portion.
The non-etched surface 1a of the semiconductor wafer 1 on which the circuit is formed is in close contact with the receiving surface 2a.

A lower end of a seal cap 3 serving as a cylindrical frame is fitted to the wafer base 2 from above, and a wafer packing 31 serving as a sealing means attached to an end face of the lower end opening is provided.
And liquid-tightly against the opposite side serving as the outer peripheral edge of the etched surface 1 b of the non-etched surface. This assembling is performed in a vacuum chamber, and a negative pressure is sealed in a closed space S formed between the opening end face of the seal cap 3 and the outer peripheral portion along the receiving surface 2a of the wafer base 2, and the sealing is performed. The cap 3 is fixed by suction. The fixing of the seal cap 3
Since no mechanical connecting means such as bolts are used, no dust is generated. The airtightness of the closed space S is maintained by a seal ring 32 provided on the outer periphery of the lower end of the seal cap 3. By sealing the negative pressure in the closed space S, the non-etching processing surface 1a of the wafer 1 and the receiving surface 2a adhere to each other without air accumulation.

A predetermined amount of etching liquid L is injected into the cylinder of the seal cap 3, and the inner peripheral portion of the etching processing surface 1 b of the semiconductor wafer 1 where the wafer packing 31 is not in close contact is in contact with the etching liquid L. A predetermined position is etched.

The upper end opening of the seal cap 3 is closed by a lid plate 4 provided with a seal ring 41 on the outer periphery.
When the etching liquid L is injected or the like, the opening mechanism is locked by a locking portion (not shown) provided on the cover plate 4 and is opened.

FIG. 2 shows an example of an apparatus for performing an etching process using the etching pot P. The apparatus is provided with an etching solution supply stage 6, an etching stage 7, and an etching solution discharge stage 8 on a gantry 5.

The gantry 5 is mounted on the etching solution supply stage 6.
A heater 61 is provided on the upper part, and an etching pot P on which the wafer 1 is set in the previous process is placed on the heater 61 and heated to a processing temperature (for example, 83 ° C.). A predetermined amount of the etching solution L is injected into the etching pot P with the cover plate 4 opened by the nozzle 62.

The etching liquid L is supplied from a tank 64 via a valve 65 by a pump 63 provided below the gantry 5. A heater 66 for heating the etching solution L to the same temperature as the etching pot P is provided in the tank 64.

The etching stage 7 comprises a constant temperature atmosphere furnace 71 for maintaining the etching pot P holding the etching liquid L at the processing temperature. The etching pot P is placed in the furnace 71 and the motor 72 outside the furnace 71 is used. A table 73 that is rotated at a constant speed, a heater 74 below the table 73, and a fan 75 that circulates heater air are provided. The temperature of the furnace 71 can be adjusted with high accuracy of ± 1 ° C. or less, and an arbitrary etching pot P can be taken in and out at any time.

After the etching solution is injected, the etching pot P with the cover plate 4 closed is placed in the above-mentioned atmosphere furnace 71, and is kept in the furnace 71 for an etching time calculated from the wafer thickness and the etching rate measured in advance. Since the space inside the etching pot P is sealed, there is no change in the concentration of the etching liquid L due to evaporation, and there is no contamination due to sharing with another wafer 1, so that the etching rate is always kept constant.

The etching solution discharge stage 8 has a number of nozzles 82 and 8 having the same basic structure as the cover plate 4 and having an opening of the etching pot P fitted and closed instead.
A unit cover 81 including 3, 84, 85 is provided. The unit cover 81 is attached to the etching pot P instead of the cover plate 4 by a mechanism not shown.

The tip of the nozzle 82 of the unit lid 81 reaches a deep position near the wafer 1, and its base end communicates with a chemical waste pipe or a cleaning waste pipe via a three-way valve 86. The nozzles 83 and 84 extending to intermediate positions in the etching pot P are connected to nitrogen piping and pure water piping via valves 87 and 88, respectively. The shortest nozzle 85 communicates with a nitrogen vent pipe via a valve 89.

After the etching is completed, the etching pot P taken out of the atmosphere furnace 71 has the unit cover 8
1 is attached, and after switching the three-way valve 86 to the chemical waste pipe, compressed nitrogen is supplied. The etching liquid L is sent to the chemical waste pipe via the nozzle 82 by the compressed nitrogen.
As a result, the etching liquid L is quickly discharged from the etching pot P, and over-etching is prevented.

Next, while the valve 89 is opened to remove nitrogen, pure water is supplied into the etching pot P to clean the inside of the pot P and the etched surface of the wafer 1. Thereafter, the three-way valve 86 is switched to the cleaning waste liquid pipe, compressed nitrogen is supplied again, and the pure water after cleaning is discharged from the etching pot P.

After the cleaning, the etching pot P is disassembled in a vacuum chamber in a later step, and the wafer 1 is taken out.

[0032]

Embodiment 2 Another example of the etching pot P is shown in FIG. In the figure, a seal ring 32 for maintaining airtightness is disposed on the top surface of the vertical wall 21 of the wafer base 2, and the lower surface of a flange portion 33 formed on the side surface of the seal cap 3 is in contact with the seal ring 32. . With such a structure, the airtightness of the closed space S is maintained, and the same effect as in the first embodiment is obtained.

[0033]

The lid plate 4 of the etching pot is not always necessary.

[0035]

As described above, according to the etching pot of the present invention, appropriate etching can be performed for each semiconductor wafer having a thickness variation.

[Brief description of the drawings]

FIG. 1 is a sectional view of an etching pot according to an embodiment of the present invention.

FIG. 2 is an overall schematic side view of an etching apparatus using an etching pot.

FIG. 3 is a sectional view of an etching pot according to another embodiment of the present invention.

FIG. 4 is a plan view of a semiconductor wafer and a perspective view of a chip.

FIG. 5 is an overall sectional view of a semiconductor wafer in an etching step in a conventional example.

FIG. 6 is a sectional view of an etching tank.

FIG. 7 is a partially enlarged sectional view of a semiconductor wafer showing an etching process.

FIG. 8 is an explanatory diagram showing thickness measurement of a semiconductor wafer.

FIG. 9 is an explanatory diagram showing measurement of the thickness of a diaphragm.

FIG. 10 is a graph showing the relationship between bath temperature and etching rate.

[Explanation of symbols]

Reference Signs List 1 semiconductor wafer 1a non-etching treated surface 1b etching treated surface (opposite surface) 2 wafer base (base plate) 2a receiving surface 3 seal cap ( cylindrical frame) 31 wafer packing (sealing means) 4 lid plate L etching solution P etching Pot S Closed space

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-5-152278 (JP, A) JP-A 63-89238 (JP, U) JP-A 59-70336 (JP, U) JP-A 4- 137035 (JP, U) Special Table Hei 5-509200 (JP, A) (58) Fields surveyed (Int. Cl. ⁶ , DB name) H01L 21/306-21/3063 H01L 21/308

Claims (2)

(57) [Claims] 1. A base plate having a receiving surface for bringing a non-etched surface of a semiconductor wafer into close contact with the base plate, a cylindrical frame body provided, and a lower end opening end face sealed with a sealing means.
To the outer peripheral edge of the semiconductor wafer on the opposite side to the non-etching processing surface, to hold the etching solution in the cylindrical space of the frame body closed at the lower end, and the lower end opening end face through the sealing means An etching pot wherein a negative pressure is sealed in a closed space formed between the base plate and the semiconductor wafer when the pot is in close contact with the outer peripheral edge of the semiconductor wafer. 2. The etching pot according to claim 1, wherein an upper end opening of the frame is hermetically covered with a removable cover plate.