JP2855573B2 - DC voltage converter - Google Patents

Description

Description: BACKGROUND OF THE INVENTION Field of the Invention The present invention relates to a DC voltage converter for converting a DC voltage, and more particularly to a DC voltage converter for converting a relatively low DC power supply to a high cross current voltage. About.

(Conventional technology) DC voltage converters, that is, CD-CD converters,
It is used when a plurality of types of DC voltages are obtained from one DC power supply.

Fig. 5a shows a typical flyback type DC-DC converter (a practical electronic and electronic circuit handbook published by CQ Publishing Co., Ltd.).
See page 311). This DC-DC converter is
Charge coil L, FET, diode D, capacitor C and
A drive circuit for driving the FET ON-OFF is provided. When the FET is on, the charge coil L is charged. When the FET is off, the energy charged in the charge coil L is discharged through the diode D and charged in the capacitor C. Is done. The output is boosted by this repetition, and when the output voltage exceeds the required value, the FET ON / OFF drive is stopped,
It resumes when the value falls below the required value.

In this circuit, since the voltage between the drain and the source of the FET is equal to the output voltage, it is necessary to use an FET having a higher withstand voltage than at least the output voltage. Therefore, in order to obtain a high output, a high breakdown voltage FET must be prepared. In addition, to suppress the loss of voltage conversion and increase the efficiency, it is desirable that the ON resistance of the FET is low, but FETs with high withstand voltage and low ON resistance are very rare, and this circuit satisfies both requirements. That can be difficult.

In order to obtain a high voltage output, a transformer T is connected instead of the charge coil L as shown in FIG. 5b.
A DC-DC converter will be used. in this case,
Since the output is boosted by the transformer T, an output higher than the withstand voltage of the FET can be obtained.

(Problems to be Solved by the Invention) In the circuit shown in FIG. 5b, since a back electromotive force is generated by the linkage inductance Ll, FE
A surge absorber to prevent the destruction of T is required. Although a zener diode ZD is added as a surge absorber in FIG. 5b, a highly efficient power supply cannot be obtained because the back electromotive force is consumed here as heat.

An object of the present invention is to provide a DC voltage converter with high efficiency, good stability, and good responsiveness.

[Configuration of the invention]

(Means for Solving the Problems) In order to achieve the above object, a DC voltage converter of the present invention comprises: a transformer having a primary coil and a secondary coil having a winding direction opposite to that of the primary coil; A first rectifying means interposed between one end and one end of the secondary coil; a first smoothing means connected to one end of the secondary coil; a first rectifying means interposed between one end of the secondary coil and an output end. 2 smoothing means; second rectifying means interposed between the other end of the secondary coil and the output end; current supply means for supplying a charging current to the primary coil; switching means for controlling supply / interruption of the charging current; And, monitor the output voltage of the output terminal, and when it is below a predetermined
Driving means for energizing / deactivating the switching means at a high speed.

(Operation) According to this, since the back electromotive force due to the linkage inductance charges the first smoothing means via the first rectifying means, it is effectively used. In this case, if the turns ratio of the primary coil and the secondary coil of the transformer is equal, the energy charged from the secondary coil to the second smoothing means via the second rectifying means and the first smoothing means via the first rectifying means. The energy charged to the switching means becomes equal, and an output approximately twice as high as the breakdown voltage of the switching means can be obtained.

That is, according to the present invention, an efficient high-output DC voltage converter can be obtained.

Embodiment A preferred embodiment of the present invention can be found in the ignition device shown in FIG. 2a. Hereinafter, description will be made step by step with reference to the drawings as appropriate.

(1) Outline of the device: This ignition device is used for a 4-cylinder engine, and includes a crank angle sensor SEN, a microcomputer ECU, a multi-spark controller MSC, and an igniter IG for each cylinder.
N _{1 to} IGN ₄ , ignition coils COL _{1 to} COL ₄ and spark plug PLG ₁
~PLG consisting of _4. (Subscripts added to IGN, COL and PLG are # 1
Although it is shown that it is provided in # 4 cylinder, it is omitted below unless otherwise required. The crank angle sensor SEN is connected to the crankshaft of the engine, detects the rotation angle of the crankshaft, and supplies a crank angle signal to the microcomputer ECU. The microcomputer ECU uses the crank angle signal to set an ignition timing signal for setting a time for generating a spark.
A multi-spark controller M generates cylinder distribution signals SEL A and B that specify the cylinders that generate IGT and spark.
Give to SC. The multi-spark controller MSC generates high-frequency spark pulses for the time set by the ignition timing signal IGT, and supplies the high-frequency spark pulses to the igniter IGN of the cylinder specified by the cylinder distribution signals SELA, B. In response to the spark pulse, the igniter IGN cuts off the primary current of the corresponding ignition coil COL. The ignition coil COL generates a high voltage on the secondary side due to disconnection of the primary current and applies it to the corresponding spark plug PLG. The igniter IGN and the ignition coil COL are integrated in each cylinder and provided on a plug cap.

(2) Multi-spark controller MSC: A. Schematic configuration: As shown in FIG. 2b, the multi-spark controller MSC converts the voltage of the on-board battery Btt from 12v to a constant voltage (5v, 12
v, 100v), a DC-DC converter 1, a current detection circuit 2 that detects the primary current of the ignition coil COL, a discharge time setting circuit 3 that sets the discharge time of the ignition coil COL, and a charge time of the ignition coil COL Charging time setting circuit 4, abnormality detecting circuit 5 for performing abnormality detection, etc.
It comprises a cylinder distribution circuit 6 for distributing to the cylinder designated by SEL A, B.

B. Operation Overview: Referring also to the timing chart shown in FIG.
An outline of the operation will be described.

The microcomputer ECU provides an ignition timing signal IGT
Is set to L level when ignition is not set, and to H level when ignition is set. This ignition timing signal IGT is provided to the cylinder distribution circuit 6 via the abnormality detection circuit 5.

The cylinder distribution circuit 6 stops operating while the ignition timing signal IGT is at the L level, but starts operating when the ignition timing signal IGT changes to the H level, and the igniter IGN of the cylinder specified by the cylinder distribution signals SEL A and B is provided. To drive on. This gives D
100V constant voltage generated by C-DC converter 1 is ignition coil
The COL is applied to the primary coil and charging by the primary current is started. This primary current is detected by the current detection circuit 2 and is converted into a voltage value by the resistor R32, and the peak hold circuit 31 and the abnormality detection circuit 5 of the discharge time setting circuit 3
Given to.

The peak hold circuit 31 holds the peak voltage generated in the resistor R32 while the primary current is flowing.

The abnormality detection circuit 5 normally outputs the H level (the level at the input end of the cylinder distribution circuit 6), but when the primary current increases to about 8A, the output is switched to the L level and held. As a result, the cylinder distribution circuit 6 uses the igniter IGN
And the ramp voltage generating circuit 32 of the discharge time setting circuit 3 starts generating a reference ramp voltage that monotonically increases at a constant gradient.

When the cylinder distribution circuit 6 drives the igniter IGN off, the energy charged in the primary coil of the ignition coil COL is instantaneously transmitted to the secondary coil due to the interruption of the primary current, and a high voltage is generated on the secondary side. This high voltage is
The spark is applied to the PLG, and a spark discharge occurs due to dielectric breakdown in the spark plug PLG.

On the other hand, the reference ramp voltage generated by the ramp voltage generating circuit 33 is given to the comparator 33. The comparator 33 compares the reference slope voltage with the hold voltage of the peak hold circuit 31, and outputs an L level when the former becomes larger than the latter, and is supplied to the charging time setting circuit 4.

In the charging time setting circuit 4, when this input is made, the output is turned to the L level for Tc seconds (about 40 μsec). This output is inverted and applied to the cylinder distribution circuit 6 and the ramp voltage generation circuit 32. As a result, the cylinder distribution circuit 6 drives the igniter IGN on, and the gradient voltage generation circuit 32
Resets the reference ramp voltage.

As described above, while the cylinder distribution circuit 6 drives the igniter IGN on, the primary current flows through the ignition coil COL, so that the primary coil is charged, and the voltage corresponding to the peak current during that time (the terminal of the resistor R32). Is held by the peak hold circuit 31.

Further, when the charging time setting circuit 4 changes the output to the H level after the lapse of Tc seconds, the cylinder distribution circuit 6 drives the igniter IGN off by the inverted output, and the gradient voltage generating circuit 32 sets the reference gradient voltage. Is started, and the above is repeated.

In other words, immediately after the microcomputer ECU sets the ignition, the ignition coil COL is charged until the primary current becomes about 8 A, and the peak voltage corresponding to the primary current of about 8 A is held in the peak hold circuit 31. Coil COL
The discharge time, i.e., time reference ramp voltage is up to more than the peak voltage becomes a constant value T _0. The amount of energy consumed in this discharge varies depending on the state in the combustion chamber (the decreasing gradient of the secondary current changes). . Since this residual current becomes a rise start value of the primary current at the start of charging, after that, when the ignition coil COL is charged for a certain period of time (Tc seconds), when the residual current is large, a higher current is applied. When the peak voltage is small, the lower peak voltage is held by the peak hold circuit 31. This peak voltage determines the next discharge time (T ₁ ) of the ignition coil COL, and sets it longer when the charging energy is large and shorter when the charging energy is small, so that the microcomputer ECU sets the ignition. During this period, the supply and release of the appropriate ignition energy are repeated at a high speed.

The abnormality detection circuit 5 includes a microcomputer ECU
If the primary current becomes approximately 8 A within ₁ second after setting the ignition, it is determined that the ignition coil COL is short-circuited.If the primary current does not reach approximately 8 A even after exceeding ₂ seconds, it is determined that the ignition coil COL is disconnected. Then, the cylinder distribution circuit 6 is forcibly stopped. (In the present embodiment, Ta _{1 is set} to about 30 μsec and Ta _{2 is set} to about 300 μsec.) C. Description of Each Part: The configuration of each part of the multi-spark controller 3 will be described below with reference to FIGS. 1 and 4.

(A) DC-DC converter 1: As shown in FIG. 1, the DC-DC converter 1 is composed of constant voltage circuits 11, 12v and 100v that generate a constant voltage Vcc (5v) from a voltage of 12v of the vehicle-mounted battery Btt. DC-D that generates stable voltage
It comprises a C converter circuit 12 and a battery voltage monitoring circuit 13.

a. Constant voltage circuit 11: The constant voltage circuit 11 generates a constant voltage Vcc by the three-terminal regulator IC1 and supplies it to the components of the multi-spark controller 3. This circuit is well known and commonly used by those skilled in the art and need not be described here. It should be understood that the supply lines are omitted in FIG. 4 in order to avoid complication of the drawing.

b. DC-DC converter circuit 12: As shown in FIG. 1, the DC-DC converter circuit 12 includes a transformer T1, a field-effect transistor FET1, a transistor TR1,
2, operational amplifiers IC2a, 2b and inverter, diode,
It consists of a resistor and a capacitor.

Now, FET1 is driven on and the vehicle battery Btt
When the (+ 12v) i ₁ becomes a current flows through the primary coil L ₀ of the transformer T1, the voltage between the terminals of the current i ₁ is a resistor R9 (hereinafter, referred to as the feedback voltage.) Is detected as an operational amplifier IC
Applied to the minus terminal of 2a.

The operational amplifier IC2a constitutes a comparator, and the feedback voltage and the resistors R1 to R3 applied to the plus terminals are used.
And outputs the H level when the former is low, and outputs the L level when the latter is low. That, IC 2a when the feedback voltage current i ₁ rises and exceeds the reference voltage Vrefl and outputs the L level.

This output is an OF signal consisting of a capacitor C6 and resistors R4,5.
Input to the F timer, the OFF timer outputs an L level pulse of a predetermined width. In addition, this output pulse
3a to 3d, the signals are inverted and applied to the base of the FET driver including the transistors TR1 and TR2.

The transistors TR1 and TR2 are turned on when the base input becomes H level, and lower the gate potential of the FET1 to the ground level to drive it off. Since FET1 current i ₁ becomes off is cut off, but produces a counter electromotive force in the primary coil L _0, the energy charges the current I _2, and the capacitor C8 through diode D1.

At the same time, a voltage proportional to the line line ratio of the counter electromotive force and the coil L _0, L ₁ is generated in the secondary coil L _1, a capacitor C
Charge 8 '. That is, the voltage charged in the capacitors C8 and C8 'becomes a voltage proportional to the turns ratio, and the total value of the voltages between the terminals becomes the output voltage (obtained on the cathode side of the diode D1'). Here, since the winding ratio of the transformer T1 is made equal, the contribution ratio of the capacitors C8 and C8 'to the output is equal.

Also, the feedback voltage drops to the ground level due to the off-drive of the FETK1, and the output of the IC1 immediately turns to the H level. However, since the OFF timer outputs the L level pulse of a predetermined width, the inverter that inverts and shapes the pulse is inverted. IC3a-d
While the output pulse of (1) is at the H level, the off-drive of the FET1 is continued, and when it changes to the L level, it is turned on. That is, the feedback loop causes oscillation having a cycle set by the OFF timer, and the ON / OFF of the FET 1 is repeated to gradually increase the output voltage.

On the other hand, the output voltage is divided by the resistors R18 to R20 and input to the plus terminal of the operational amplifier IC2b as a monitoring voltage. This operational amplifier IC2b constitutes a comparator, compares the monitored voltage with a reference voltage Vref2 set by resistors R16 and R17 applied to the minus terminal, and outputs an L level when the former is low. When the latter is low, the output is an open collector output.

The output terminal of IC2b is connected to the output of IC3a-d via resistor R15 and to the feedback loop of the oscillation circuit via diode D7. With this connection, if the output terminal of IC2b is at the L level, the diode is connected regardless of the output of IC3a-d.
When D7 is turned off and it is an open collector output, the diode D7 is output when the outputs of ICs 3a to 3d are at L level.
Is off, and when it is at the H level, the diode D7 is on. When the diode D7 is turned on, the feedback voltage rises in a pseudo manner, so that the output of the IC 2a becomes L level, the OFF timer is retriggered, and the time for which the ICs 3a to 3d output H level is extended.

In other words, even if the charge voltage of the capacitor C8, that is, the monitor voltage corresponding to the output voltage exceeds the reference voltage Vref2, it continues when the FET1 is on-driven, and when the FET1 is off-drive, the monitor voltage is equal to or lower than the reference voltage Vref2. Postpone the on-drive start until: The repeated by maintaining the output voltage to 100v, maintains the output of another of the secondary coil L ₂ of the transformer T1 to 12v.

In the control of the output voltage performed by the DC-DC converter circuit 12, the ON / OFF cycle of the FET 1 always exceeds the set cycle, and there is no relay in the linear region. Therefore, DC-DC with good responsiveness that does not require parasitic oscillation due to noise components and destruction due to heating of FET1 and does not require a phase shift compensation circuit, etc.
It is a converter. Further, since the FET1 is charging the capacitor C8 by effectively utilizing the counter electromotive force generated in the primary coil L ₀ in the off, never FET1 is destroyed by the counter electromotive force, the efficiency is high Become. In addition, FET1
May be about the voltage shared by the capacitor C8, and in this embodiment, an output of 100 V which is about twice the withstand voltage of the FET 1 is obtained.

c. Battery voltage monitoring circuit 13: The battery voltage monitoring circuit 13 includes a transistor TR3, inverters IC3e, f, a zener diode ZD3, a diode D6, and resistors R11 to R14.

As shown in FIG. 1a, Zener diode ZD3
The cathode side of the vehicle battery Btt 12 via a resistor R11
v terminal, the anode side is transistor TR3
Connected to the base. The collector of the transistor TR3 is connected to the input terminals of the inverters IC3e and f connected in series. The inverters IC3e and f constitute a high-impedance input / output matching circuit, and output terminals are a G2A terminal of a selector IC5 described later and a resistor 14
And a diode D6 connected to the feedback loop of the DC-DC converter circuit 12.

That is, when the voltage of the 12v terminal of the vehicle-mounted battery Btt exceeds a predetermined voltage, the transistor TR3 is turned on and the L level is output from the inverter IC3f. Is output.

When the inverter IC3f is outputting L level,
There is no effect on the selector IC5 and the DC-DC converter circuit 12, but when it outputs the H level, the selector IC5 stops its operation, and the DC-DC converter circuit 12 causes the FET1 to rise due to a pseudo increase in the feedback voltage as described above. Off time is extended.

(B) Current detection circuit 2: The current detection circuit 2 is a circuit for detecting a primary current for charging the primary coil of the ignition coil COL as described above,
As shown in FIG. 4, this is a current mirror circuit mainly composed of transistors TR4 and TR5. In this circuit, a current that is 1 / 10,000 of the primary current flowing through the resistor R21 flows through the collector of the transistor TR4. Diode D8 is connected to the collector of transistor TR4.
And a resistor R32, and the current value is converted to a voltage value.

(C) Discharge time setting circuit 3: a. Peak hold circuit 31: The peak hold circuit 31 includes a transistor TR7 and capacitors C11 and C12. The capacitor C12 is interposed between the emitter of the transistor TR7 and the ground, and the transistor TR7 charges the capacitor C12 with a current proportional to the terminal voltage of the resistor R32. At this time, resistor R32
The noise component which is parasitic on the terminal voltage is removed by the capacitor C11.

Note that the capacitor C12 determines that the ignition timing signal IGT is low.
When the level reaches the level, the voltage is discharged via the diode D9 and the like, and when the operational amplifier IC4c constituting the comparator 33 outputs the L level, it is discharged via the diode D10 and the like.

b.Ramp voltage generation circuit 32: The ramp voltage generation circuit 32 includes a transistor TR6 and a resistor R25.
And a capacitor C9 and the like. In this case, when the transistor TR6 is on, the capacitor C9 is discharged, and when it is off, the capacitor C9 is charged.

The on / off of the transistor TR6 is controlled by the level of the signal applied to the base, that is, the level of the output signal of the OR gate IC 6a (indicated as 6a in FIG. 4; the same applies to the others). That is, when the output of the OR gate IC 6a is at the H level, the capacitor C9 is discharged, and when it changes to the L level, charging is started.

In the present embodiment, utilizing the linear region of the capacitor C9,
As the voltage between the terminals of the capacitor C9, a reference gradient voltage that monotonically increases at a constant gradient is obtained.

b. Comparator 33: The comparator 33 is mainly composed of an operational amplifier IC4c, the minus terminal of which is supplied with the reference ramp voltage from the ramp voltage generating circuit 32, and the plus terminal of which is the hold voltage from the peak hold circuit 31. (Voltage between terminals of the capacitor C12). In this case, the IC 4c outputs an H level when the reference gradient voltage is higher than the hold voltage, and outputs an L level when the reference gradient voltage is opposite.

(D) Charging time setting circuit 4: The charging time setting circuit 4 includes a diode D11, a resistor R36, a capacitor C14, an operational amplifier IC4d, and the like.

The resistor R36 and the capacitor C14 constitute a differentiating circuit, and the comparator 3 provided via the diode D11
The falling edge of the output of No. 3 is differentiated and the differentiated output is applied to the plus terminal of the operational amplifier IC4d. The operational amplifier IC4d constitutes a comparator, compares the differential output with a reference value set by the resistors R37 and R38 applied to the minus terminal, and when the former is low, the L level is low, and the latter is low. Sometimes, it outputs the H level.

That is, the IC 4d outputs an L level pulse having a width from when the output of the comparator 33 changes to the L level to when the differential output increases and exceeds the set reference value. In this embodiment, this width is set to Tc seconds (about 40 μsec) by adjusting the time constant and the reference value of the differentiating circuit.

(E) Abnormality detection circuit 5: The abnormality detection circuit 5 is composed of a large number of ICs, resistors, capacitors and the like. Since this circuit has several functions as described above, each function will be described below.

a. Relay of the ignition timing signal IGT: The ignition timing signal IGT is connected to the microcomputer ECU
Output from the NAND gate I via the inverters DT1 and DT4.
It is given to one input of C6c. Where NAND gate I
If the other input of C6c is at the H level, this gate becomes an inverter, inverts the ignition timing signal IGT and applies it to the G2B terminal of the selector IC5. As described later, the selector IC5 stops the operation when the H level is applied to the G2B terminal, and starts the operation when the L level is applied.

After the microcomputer ECU changes the ignition timing signal IGT to the H level (after setting the ignition),
a When a primary current of 8 A or more flows within ₁ second, and when Ta ₂
If only a primary current of 8 A or less flows for more than a second,
The other input of the NAND gate IC6c becomes L level to cut off the ignition timing signal IGT, which will be described later.

b. Initial charge setting: This is a function for setting the charge of the primary coil of the ignition coil COL from immediately after the microcomputer ECU changes the ignition timing signal IGT to the H level until the primary current becomes 8A. This function is provided by a comparator mainly composed of the operational amplifier IC4a and a multivibrator composed of NAND gates IC7a and IC7b.

This comparator compares the primary current detected as the terminal voltage of the resistor R32 with a reference voltage set by the resistors R28 to R31 and corresponding to the terminal voltage of the resistor R32 when the primary current is 8 A. Is low, the H level is output, and when the latter is low, the L level is output. This output is applied to pin 13 of the multivibrator.

In the multivibrator, the ignition timing signal IGT is low.
At the time of the level, in response to the output of the comparator, if the level is the H level, the L level is output from the 11th pin, and the H level is output from the 10th pin. The H level is output and the L level is output from the 10th pin. However, the ignition timing signal IG
When T is at the L level, the primary current does not flow, so the output of the comparator is at the H level, and the L level is output from the 11th pin and the H level is output from the 10th pin. When the ignition timing signal IGT is at the H level, a hold preparation state is established. When the output of the comparator changes from the H level to the L level, the output of the 11th pin changes from the L level to the H level, and the output of the 10th pin changes to the H level. To L level and hold.

The output of the 11th pin of the multivibrator is input to the 2nd pin of the OR gate 6a of negative logic. This OR gate IC
The output of the charging time setting circuit 4 is supplied to the first pin 6a, and when either of them is at the L level, the H level is output, and when both are at the H level, the L level is output.
This signal is supplied to the gradient voltage generating circuit 32 and the G terminal of the selector IC5. As described above, in the ramp voltage generation circuit 32, the capacitor C9 is discharged by the H level input (reset of the reference ramp voltage).
And charge it with the L level input. As will be described later, the selector IC5 turns on the igniter IGN when the G terminal input is at the H level, and turns off the igniter IGN when the G terminal input is at the L level.

That is, immediately after the ignition timing signal IGT changes from the L level to the H level, the L level is output from the 11th pin of the multivibrator, so that the charging of the primary coil of the ignition coil COL is started. After that, the charging current is 8A
At this time, the output of the comparator changes from H level to L level, so that the output of the 11th pin changes from L level to H level and is held. At this time, since the capacitor C14 of the charging time setting circuit 4 is sufficiently sufficient, the OR gate IC 6a
Becomes low level, and the discharge of the primary coil and the generation of the reference gradient voltage are started.

c. Detection of initial abnormality: Short circuit abnormality of ignition coil COL where primary current of 8A or more flows within ₁ second of Ta (approximately 30 μsec) after ignition timing signal IGT turned to H level, and ₂ seconds of Ta (approximately 300 μsec) This function detects the disconnection abnormality of the ignition coil COL in which only the primary current of 8 A or less flows even after the passage of time, and stops the discharge control. The former abnormality is detected by the capacitor C19, the resistor R44, and the NAND gate IC7c, and the latter abnormality is detected by the capacitor C20, the resistors R45, 46, and the NAND gate IC7d.

The capacitor C19 and the resistor R44 constitute a differentiating circuit, and when the ignition timing signal IGT changes to the H level, T
a An H level pulse having a width of ₁ second is output and applied to the sixth pin of the NAND gate IC7c. 5 of this NAND gate IC7c
The pin 11 is provided with the output of the pin 11 of the multivibrator composed of the NAND gates IC7a and IC7b, and within _one second of Ta after the ignition timing signal IGT changes to the H level.
When the primary current of 8 A or more flows and the output of the 11th pin of the multivibrator becomes H level, the output is turned to L level.

Further, the capacitor C20 and the resistors R45 and R46 constitute an integrating circuit. When the ignition timing signal IGT changes to the H level, a rising H level pulse is output _two seconds after Ta and applied to the first pin of the NAND gate IC7d. . This nand gate
The output of pin 10 of the multivibrator is given to pin 2 of IC7d, and the primary current of 8A or more does not flow even if ₂ seconds have passed since the ignition timing signal IGT turned to H level, Pin 10 output of multivibrator is H
If the level remains, the output is turned to the L level.

Outputs of the NAND gates IC7c and IC7d are combined by a negative logic OR gate IC8a, inverted by the NAND gate IC8b, and applied to the fifth pin of the multivibrator composed of the negative logic OR gates IC8c and IC8d. This multivibrator is in the hold preparation state when the ninth pin input, that is, when the ignition timing signal IGT is at the H level, and when the fifth pin input becomes the L level, the output of the tenth pin is changed to the L level, and the ignition timing signal IGT is output. L again
Hold that state until it reaches the level. When this 10th pin output is held at L level, the NAND gate IC
The relay of the ignition timing signal IGT is prevented by 6c, and the H level is applied to the G2B terminal of the selector IC5 (operation stops).

The output of the 10th pin of the multivibrator composed of the OR gates IC8c and IC8d is supplied to an external control circuit via the NAND gate IC6d, the inverter DT5, and the like, but the description thereof is omitted.

d. Detection of abnormal current: As described above, the residual current after the spark discharge differs depending on the state in the cylinder. That is, when the energy consumption is extremely small, the residual current becomes abnormally large, and the charging for the Tc time set by the charging time setting circuit 4 may be overcharged. Therefore, a function is provided for detecting overcharge and forcibly shortening the charging time. This function is provided by the operational amplifier IC4b.
And capacitor C15.

The operational amplifier IC4b is connected to the terminal voltage of the resistor R32 and the resistor R
A comparator is configured to compare the reference value for overcurrent detection set by 28 to 31 with an open collector output when the former is low, and outputs an L level when the latter is low. That is, when the terminal voltage of the resistor R32 becomes higher than the reference value of the overcurrent detection, the L level is output from the IC 4b and the capacitor C15 is discharged, so that the charging time setting circuit 4 inputs the IC 4d of the charging time setting circuit 4 Is set lower for a certain period of time. Thereby, the charging time of the primary coil is shortened, and overcharging is prevented.

(F) Cylinder distribution circuit 6: The cylinder distribution circuit 6 includes a selector IC5 and a transistor TR9.
It consists of an igniter driver of ~ 17 mag.

The selector IC5 has control terminals G2A and G2B, an input terminal G, select input terminals A to C, and output terminals Y4 to Y7. As described above, the control terminal G2A has the battery voltage monitoring circuit 1
3 (see Fig. 4a), the output of the NAND gate IC6c is given to G2B, and the OR gate is given to the input terminal G.
The output of IC6a is provided. Select input terminals A and B
Are supplied with the cylinder distribution signals SEL A, B from the microcomputer ECU via the inverters DT2, DT3, respectively, and the select input terminal C is fixed at the H level.

As can be understood from the above description, this selector operates when the control terminals G2A and G2B are at the L level, that is, when the battery voltage is normal and the ignition timing signal IGT is at the H level, and the ignition coil COL When there is no short circuit abnormality and no disconnection abnormality, operation becomes possible. At this time, according to the cylinder distribution signals SEL A, B, the output terminal is selected as shown in the following Table 1, and the input of the input terminal G is inverted and output.

The igniter driver includes four sets of driving circuits individually connected to the output terminals Y4 to Y7. These driving circuits are well known to those skilled in the art and need not be described again here.

〔The invention's effect〕

As described above, according to the DC voltage converter of the present invention, the back electromotive force due to the linkage inductance is the first.
Charging the first smoothing means (C8) via the rectifying means (D1),
It is used effectively. In this case, if the turns ratio of the primary coil (L ₀ ) and the secondary coil (L ₁ ) of the transformer is equal,
Secondary coil (L ₁₎ from the second rectifying means (D1 ') second smoothing means via a (C8') energy and first rectifying means which is charged to the first smoothing means through the (D1) (C8) Is equal to the energy charged in the switching means (FET1), and an output approximately twice the breakdown voltage of the switching means (FET1) can be obtained.

Thus, according to the present invention, an efficient high-output DC voltage converter can be easily obtained.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a detailed configuration of a DC-DC converter according to an embodiment. 2a and 2b are block diagrams showing a schematic configuration of an ignition device using the DC-DC converter shown in FIG. FIG. 3 is a waveform diagram showing an operation example of the ignition device shown in FIGS. 2a and 2b. FIG. 4 is a circuit diagram showing a detailed configuration of a multi-spark controller MSC provided in the ignition device shown in FIGS. 2a and 2b. FIGS. 5a and 5b are circuit diagrams showing a partial configuration of a conventional DC-DC converter. 1: DC-DC converter 11: Constant voltage circuit 12: DC-DC converter circuit 13: Battery voltage monitoring circuit 2: Current detection circuit 3: Discharge time setting circuit 31: Peak hold circuit 32: Slope voltage generation circuit 33: Comparator 4 : Charging time setting circuit 5: Abnormality detection circuit 6: Cylinder distribution circuit ECU: Microcomputer MSC: Multi-spark controller IGN: Igniter COL: Ignition coil SEN: Crank angle sensor PLG: Ignition plug TR1-TR17: Transistor FET1, FET: Electric field effect transistor FET1 :( switching means) T1: transformer (trans) L _0: a primary coil (primary coil) L _1: the secondary coil (secondary coil) L _2: the primary coil R1~R62, r1~r3: resistor C1 -C27, C: capacitor C8: (first smoothing means) C8 ': second smoothing means D1-D16, DA1-DA4, D: diode D1: (first rectifying means) D1': (second rectifying means) IC1 ~ IC8: Integrated circuits R1 ~ R10, R16 ~ R20, IC2 ~ 3, C6, TR1 ~ 2: Eving means)

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-62-233065 (JP, A) JP-A-62-48259 (JP, A) JP-A-1-295665 (JP, A) Real opening 163189 (JP, U) Japanese Utility Model Showa 59-185991 (JP, U) Japanese Utility Model Showa 58-2023 (JP, U) (58) Fields investigated (Int. Cl. ⁶ , DB name) H02M 3/50-3 / 44

Claims (1)

(57) [Claims] A transformer having a primary coil and a secondary coil whose winding direction is opposite to that of the primary coil; first rectifying means interposed between one end of the primary coil and one end of the secondary coil; A first smoothing means connected to one end of the secondary coil; a second smoothing means inserted between one end of the secondary coil and an output end;
A second smoothing means interposed between the other end of the secondary coil and an output end;
Rectifier means; current supply means for supplying a charging current to the primary coil; switching means for controlling supply / interruption of the charging current; and monitoring the output voltage of the output terminal, and when it is lower than a predetermined voltage, Driving means for energizing / deactivating the switching means at a high speed;