JP2855485B2 - Traffic observation circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a traffic observing circuit for observing and controlling traffic of cells passing over a communication network line, which divides information to be communicated into cells of fixed length and transfers the cells. It is about.

[0002]

2. Description of the Related Art Asynchronous Transfer Mode
In a communication network using fer mode (ATM), information to be communicated is divided into fixed-length cells and transferred, so that media having different communication bit rates can be handled uniformly.

In this ATM network, traffic during communication is generally variable.

[0004] In other words, the subscriber can change the communication traffic in accordance with the increase or decrease of the amount of generated information to perform flexible communication.

On the other hand, from the standpoint of effective use of network resources, it is necessary to grasp the temporal change of traffic.

Therefore, in the ATM network, communication traffic is declared at the time of call setup, and communication is performed according to the declared value.

With respect to these declared values, the network observes the input traffic from the subscriber line and judges whether or not it is as declared, and regulates the offending traffic.

For example, a method of immediately discarding a cell transmitted by a subscriber exceeding a declaration in a subscriber exchange when a violation is detected, or a method of adding a violation tag to the cell and assigning a violation tag in a relay exchange when network congestion occurs. Violation traffic is regulated by a method of selectively discarding cells.

As a report parameter, a method of declaring the maximum value of the number of cells arriving for each specified period to determine average traffic, or a method of observing cell arrival intervals and specifying the maximum traffic from the minimum value are considered. (FIG. 2).

[0010] Among them, the maximum traffic is also called a peak value of the traffic, and has a great influence on the transfer quality of cells in the ATM network.

In the present invention, a method of observing the maximum traffic will be described.

When observing the cell arrival interval, the following two methods are conceivable.

The time from when one cell arrives until the next cell arrives is counted up by a counter.

The time at which the cell arrives (time stamp value) is stored, and the time stamp value is subtracted from the time at which the next cell arrives.

The method is easy to control.

However, considering the use of the PBX, calls are multiplexed even on the subscriber line, and in particular, on a high-speed subscriber line (150 Mb / s, 600 Mb / s, etc.), it is possible to multiplex hundreds to thousands of calls. Becomes

In order to perform traffic observation for each call in a communication network in which a large number of calls are multiplexed, it is necessary to have a large number of counters, and the amount of hardware becomes large, which is not practical.

On the other hand, one method comprises one timer, a memory for storing the time at which a cell arrives for each call, and a subtraction circuit (FIG. 3).

The time stamp value for each call is stored in a memory using the logical channel number VCI corresponding to the call as an address.

At the time of cell arrival, the time stamp TST at the time of the previous cell arrival is read from the corresponding address, and the cell arrival interval is calculated by calculation with the current timer value TIM.

The timer includes a counter and a clock source for determining a time base of a unit time.

Normally, a cyclic counter is used as the counter, and the maximum value of the counter is set to be larger than the cell arrival interval.

Assuming that the counter is a binary n-bit counter, the cell arrival interval D is D = TIM-TST when TIM ≧ TST, and D = 2 ⁿ + TIM-TST when TIM <TST.

[0024]

Consider the use of the circuit shown in FIG. 3 for observation of input traffic in an ATM network.

At the time of call setup, a "minimum cell arrival interval Dmin" corresponding to the maximum traffic is defined for each logical channel. If the cell arrival interval is smaller than Dmin at the time of actual communication, it is processed as a specified value violation (violation processing). Examples of the method include a method of discarding a violating cell and a method of marking a violating cell and transferring the cell as a low priority cell.

In the ATM network, a wide range of calls of about 64 kb / s to several tens Mb / s are multiplexed.

For example, in order to observe the cell arrival interval of a call having a maximum traffic of 50 Mb / s with 53 bytes per cell, the unit time of the timer needs to be about 8.5 μsec.

At this time, the cell interval of 65 kb / s is about 780
This is a unit time (about 6.6 msec).

Further, in ATM communication, cell traffic is not always constant.

If cells are not transmitted for one second, the cell interval is about 120,000 unit times. When 120,000 unit time is constituted by a binary counter, 17 bits are required.

In addition, in the case of ATM, the minimum arrival interval of cells can be specified by the maximum traffic speed, but the maximum arrival interval is not specified.

Since the size of the timer is finite no matter how large, it is not possible to accurately observe the cell interval, and it is not possible to detect a violation of the prescribed value of input traffic in the ATM network.

FIG. 4 shows an example.

If the timer is constituted by a binary 16-bit counter, the timer value cycles from 0 to 65535 in decimal.

Here, the minimum cell arrival interval prescribed value Dmin is 780 unit time (corresponding to 64 kb / s).

It is assumed that the time stamp value at the time when one cell arrives is TST = 65000.

When the next cell arrives after 700 unit time (about 70 kb / s), the timer value is TIM = 65000 +
700−65536 = 164, which is a violation of the specified value.

On the other hand, if the next cell arrives after 66236 unit time, the timer value is TIM = 65000 + 66236-65 even though the specified value is satisfied.
536-65536 = 164, and the calculation results in a cell arrival interval D = 700, and a specified value violation is detected.

When a cell arrives at a certain interval or more, there is a problem that a counter having a finite number of bits cannot accurately observe and detect a violation of the minimum cell arrival interval regulation.

An object of the present invention is to solve the conventional problems and to provide a traffic observation circuit capable of performing accurate traffic observation.

[0041]

According to the present invention, in order to achieve the above object, in a communication network in which information is divided into fixed-length cells and transferred, peak traffic for each logical channel is previously determined for traffic observation in the network. A timer that counts up for each cell hold time in a traffic observation circuit that performs traffic observation by setting a specified value of an arrival interval;
Holding means for holding the cell arrival time for each logical channel; and determining whether or not the cell arrival interval satisfies the specified value based on the value of the timer and the value held in the holding means for holding the cell arrival time. Determining means for determining, and whether or not a cell has arrived for each logical channel, wherein the current time is equal to or greater than the specified value from the time of the value held in the holding means by the determining means in a specific cycle of each logical channel It is provided with a display means for determining whether or not it has passed, and displaying the result, when the cell arrives, referring to the value displayed on the display means corresponding to the logical channel of the cell, The timer value indicating the current time and the holding value only when the displayed value has not passed the specified value from the time of the value held in the holding means at the previous determination time, And judging whether or not the cell arrival interval using said determining means and a value held in step satisfies the specified value.

[0042]

In FIG. 3, a specified value C1 (VCI) for each call and a time stamp value C2 (VCI) at the time of cell arrival are stored in a memory using a logical channel number VCI assigned to each call as an address. I do.

At the time of call connection, a specified value C1 (VCI) is written in a memory having the corresponding VCI as an address.

During communication, the time at the time of the previous cell arrival is stored in the memory as a time stamp value C2 (VCI).

When the cell arrives, the VCI of the arriving cell is received at the same time as the cell arrival signal, and the minimum arrival interval prescribed value C1 (VCI) and the previous time stamp value C2 (VCI) are read using this VCI as an address.

The timer values TIM and C2 (V
CI) difference D = TIM-C2 (VCI) indicates the cell arrival interval.

D is compared with a specified value C1 (VCI), and D ≧ D
If C1 (VCI), the requirement is satisfied. Conversely, D <C1
In the case of (VCI), the specified value is violated, and a violation detection signal is issued.

In the above traffic observation, the following 2
One process is required.

Arrival interval calculation when a cell arrives during communication

Writing / deletion of specified value at call setup / release

Here, the arrival interval calculation (comparison with the specified value of input traffic / violation determination) at the time of cell arrival must be performed for each cell arrival.
Performed in cell hold time units.

In the prior art shown in FIG. 3, it is divided into an arrival processing phase for performing one cell hold time and a call processing phase for performing the cell processing.

By this processing, it is possible to observe the violation of the specified value. However, as described in the section of the prior art,
When the arrival intervals of the cells are not fixed, as in the case of ATM communication, an error occurs in the observation.

The traffic observation circuit according to the present invention adds a 1-bit "Flag" column F to a table in a memory that stores a specified value and a time stamp value at the time of the last cell arrival in order to compensate for the above-mentioned disadvantage.

FIG. 1 shows an outline of the present invention.

As described above, the prescribed value is declared by the subscriber as a value corresponding to the maximum traffic at the time of call setup. That is, the specified value is set to an arbitrary value for each logical channel.

In the present invention, for each logical channel, the difference between the timer value and the time stamp value is calculated at a constant time period even if no cell arrives, and the call to which the logical channel is assigned is declared. By turning on the "flag" when the specified minimum arrival interval is exceeded, it is possible to compensate for the drawbacks described in the section of the prior art.

For this reason, as shown in FIG. 6, in addition to the arrival processing phase and the call processing phase, the processing phases within one cell hold time are as follows.

A periodic processing phase for performing a periodic arrival interval check is provided.

In the present invention, each phase specifically performs the following processing.

Cell arrival processing phase:

When a cell arrives, it is determined whether or not the specified value of the cell is violated.

The value obtained by subtracting the time stamp value TST stored in the memory 21 for the VCI of the arriving cell from the value TIM of the timer counter 22 at that time is the cell arrival interval.

When this value is smaller than the specified value Dmin held in the memory 21, the traffic is regarded as violation traffic, and the fact is notified to the violation processing unit 24.

When the flag F held in the memory 21 is ON, it is assumed that the specified value is unconditionally satisfied.

At the end of this phase, the time stamp value TST of the VCI is rewritten to the value TIM of the timer counter 22.

Call setting processing phase:

A call setting process is performed based on a signal from the call control unit 25.

VC obtained from call control unit 25 at the time of call setup
The specified value Dmin is written on the table of the memory 21 using I as an address, and the flag F is set to "ON".

Periodic processing phase:

It is determined whether a specified value is satisfied regardless of whether a cell has arrived for a certain VCI.

For a certain VCI, the timer counter 22
Of the time stamp value TST held in the memory 21 from the value TIM of the VCI.
If it exceeds min, the cell arrival interval already satisfies the specified value, so the flag F of the VCI is set to "ON".

Regarding the periodic processing in each of these phases, an n-bit counter 2
It is necessary to perform the processing at a cycle equal to or less than a value obtained by subtracting the minimum arrival interval specified value of the VCI from the cycle (TMAX = 2 ⁿ ) in which the circuit 2 loops.

FIG. 9 shows the reason for this, focusing on the specific VCI.

In FIG. 9, the cell of the VCI is at time t0.
Suppose you arrive at

The time when the minimum arrival interval prescribed value Dmin of the cell of the VCI concerned elapses from t0 is defined as t1 (t1 = t0 +
Dmin), and then the time when the value of the timer counter makes one cycle and reaches the same value as at time t0 is t2 (t2 = t
0 + Tmax).

Here, during the period from time t1 to t2, the VC
If the periodic processing is not performed on I, when the cell of the VCI arrives after time t2, the arrival interval calculated from the time stamp value and the timer value of the VCI satisfies the specified value of the VCI. Further, since it does not indicate that the “flag” of the VCI satisfies the specified value, the cell of the VCI actually satisfies the specified value, but the specified value is violated. Is detected.

Accordingly, the VCI must be subjected to periodic processing at least once between time t1 and time t2.

For this reason, the VCI must be subjected to periodic processing at a fixed cycle equal to or less than the value (Cyc) obtained by subtracting the minimum arrival interval prescribed value of the VCI from the timer counter circulation cycle.

[0080] the number of subject to VCI of the traffic observation N, the maximum value of the minimum arrival interval defined value of each VCI Dmin _-
When max, in the case of performing the periodic processing once a cell suspension time as in FIG. 6 is Cyc _- max = Tmax-Dmin _- in order to perform the periodic processing for all VCI between max N ≦ Cyc _- max Need to be

When the number of target VCIs is large, a plurality of periodic processes must be performed within one cell hold time as shown in FIG.

That is, it is assumed that the periodic processing is performed a times in one cell holding time, and the relationship of N ≦ a × Cyc _- max may be established.

Conversely, when N, Tmax, and Dmin _- max are given, the number of periodic processes may be set so that a ≧ N / Cyc _- max.

Hereinafter, embodiments will be described.

[0085]

FIG. 5 shows an embodiment of a traffic observation circuit for observing input traffic for each call on a line on which a plurality of calls are multiplexed.

The multiplexed call is managed using a logical channel number (VCI) assigned to each call.

In FIG. 5, reference numeral 10 denotes a cell arrival / VCI detector, 11 denotes a specified value holding unit, 12 denotes an observation circuit controller, 1
3 is a time stamp holding unit, 14 is a timer counter,
Reference numeral 15 denotes a clock unit.

The cell arrival / VCI detecting section 10 detects the arrival of a cell and the VCI of the cell, and outputs the VCI together with the cell arrival signal.
The value of CI is sent to the observation circuit control unit 12.

The specified value holding unit 11 has a specified value of the minimum cell arrival interval (Dmin) for each VCI, and the time stamp holding unit 13 has the time stamp value (TS
T) and a flag (F) for each VCI.

The timer counter 14 uses an n-bit cyclic counter. The timer counter 14 is a clock unit 1
The clock C1 from 5 is counted up.

The clock section 15 generates a clock in units of the cell hold time.

Therefore, the value of the timer counter value 14 indicates a time with the cell hold time as a unit time.

In the present embodiment, the processing cycle is assigned to the three types of phases described above with reference to FIG.

In FIG. 7, the cell cycle is set to one arrival process, 1
The call is divided into four parts for the call setting processing and the two periodic processings.

In response to this, the clock section 15 issues a clock C1 having the same cycle as the cell holding time and a clock section C8 having a 1/8 cycle.

The observation circuit control unit 12 performs cell arrival processing, call setting processing, and periodic processing during one cell hold time.
Violation of the specified value of the minimum cell arrival interval is detected for each CI.

FIG. 8 shows the configuration of the control unit 12.

In FIG. 8, reference numeral 121 denotes a cycle control VCI control counter, 122 denotes a cell arrival information holding unit, 123 denotes a call processing information holding unit, 124 denotes a processing timing management unit, and 125
Is a selector for VCI selection, and 126 is a determination unit.

The cycle control VCI control counter 121 is composed of an m-bit counter CA, and selects a target VCI in each cycle processing phase within the cell suspension time.

The input of the counter CA is the logical product of the outputs S2, R1, and R2 of the processing timing management section 124.

Therefore, the number N of VCIs targeted by this measurement circuit
Is 2 ^m .

In this embodiment, since there are two periodic processing phases within one cell hold time, Cyc is applied to all VCIs.
(= 2 ^{m -1} ) Periodic processing is performed once for each cell hold time.

Therefore, in this case, the prescribed value of the minimum arrival interval is the maximum Tmax-Cyc (=
2 ⁿ -2 ^m-1 ) cell period is possible (FIG. 9).

For example, if n = m = 16, the observation circuit can detect a violation of the minimum arrival interval specified value up to a maximum of 32768 cell cycles (corresponding to about 4.7 kb / s).

The cell arrival information holding unit 122 has a cell arrival flag FB and a register RB. When a cell is detected by the cell arrival / VCI detection unit 10, the cell arrival flag F
B is set to “1”, and VC1 of the arriving cell is held in the register RB.

In the cell arrival processing phase, when FB = 1, the cell arrival information holding unit 122 reads the previous time stamp value and flag in the memory of the time stamp holding unit 13 corresponding to the VCI value held in the RB. The values are passed to the determination unit 126.

The call processing information holding section 123 has a call processing flag FC1, a call processing type flag FC2, a VCI register RC1, and a prescribed value register RC2.

When a call processing request is received, a call processing flag FC
1 is set to “1”.

Further, the type information of the call processing is written in the flag FC2.

In this embodiment, the call setting process is performed when FC2 = 0, and the call release process is performed when FC2 = 1.

The value of the VCI to be subjected to the call processing is held in the register RC1.

At the time of call setting, a prescribed value to be set is held in the register RC2.

In the call setting phase, the call processing information holding unit 123 specifies the minimum cell arrival interval corresponding to the peak traffic at the time of call connection, and in the specified value holding unit 11, a memory corresponding to the VCI assigned to the call. Dmin (VC
Set the specified value in I).

At this time, the flag F (VCI) on the memory corresponding to the VCI in the time stamp holding unit 13 is stored.
Is set to “ON”.

The processing timing management section 124 receives the clock C8 from the clock section 15, and counts up the timing control counter TC.

The timing control counter TC is a 4-bit cyclic counter. The value of the upper 2 bits of the timing control counter TC is input to the decoder DC1, and the control signals S1 to S3 corresponding to the phases 1 to 3 are obtained as outputs (Table 1). ).

[0117]

[Table 1]

The lower two bits of the timing control counter TC control the operation in each phase. The lower two bits are input to the decoder DC2 and are stored in the memory 111 in the specified value holding unit 11.
The write / read signal (R1 / W1), the write / read signal (R2 / W2) of the memory 131 in the time stamp holding unit 13, and the determination timing signal CS of the determination unit 126 are obtained as outputs.

When the control signal S1 = 1, the cell arrival processing is
When S2 = 1, periodic processing is performed, and when S3 = 1, call setting processing is performed (Table 1).

The VCI selection selector 125 selects a VCI to be used in each processing phase within the cell hold time.

That is, the output S of the processing timing management unit
Cycle control VCI control counter 1 according to 1, S2, S3
21, which of the VCIs held in the cell arrival information holding unit 122 and the call processing information holding unit 123 is determined.

The determination section 126 is a VCI selection selector 125
It is determined whether or not the output VCI satisfies a specified value.

V selected by VCI selection selector 125
The time stamp value TST and the value of the flag F held in the time stamp holding unit 13 are read using the CI as an address.

When the value of the flag F is ON, it is assumed that the specified value is satisfied unconditionally.

When the value of the flag F is OFF, the determination is made according to the following rules.

The value obtained by subtracting the timestamp value TST held in the timestamp holding unit 13 from the output TIM of the timer counter 14 is compared with the specified value Dmin held in the specified value holding unit 11. Subtraction value is Dmin
If it is smaller than Dmin, it is determined to be a violation, and if it is not less than Dmin, it is determined that there is no violation.

After the specified value violation is determined, the operation differs between the cell arrival processing phase and the periodic processing phase.

In the cell arrival processing phase, when it is determined that the specified value is violated, the violation processing unit 3 is notified of a violation detection signal.

On the other hand, when it is determined that the specified value is satisfied in the periodic processing phase, the flag F of the time stamp holding unit 13 is set to ON using the VCI as an address.

As described above in the section of [Problems to be Solved by the Invention], if one bit of the "flag" column is not provided in the table of the memory of the time stamp holding unit 13, the arrival interval of the cell If the timer counter 14 circulates twice during this time, it may be determined that the specified value is violated even though the specified minimum arrival interval is sufficiently satisfied.

In the following, the operation of the present embodiment will be described assuming that N = 16 and n = 2, the case where the timer counter 14 goes around once and the case where it goes twice during the cell arrival interval.

Since n = 2, the periodic processing is applied to the VC once every two cell periods as shown in FIG.

First, a case will be described in which the timer counter circulates only once until the cell having the VCI value arrives at time 65000 and then the cell having the VCI value arrives for the first time.

When a cell having the VCI value arrives at time 65000, timer value 65000 is written to time stamp holding section 13 using the VCI as an address.

The VCI value flag is set to OFF.

At time 65001 and 65535, the VCI is subjected to periodic processing.

In the cycle processing phase, the VCI selection selector 125 selects the value of the cycle control VCI control counter 121 as the VCI value.

The determination unit 126 reads the time stamp (VCI) and the flag (VCI) from the memory of the time stamp holding unit 13 and the specified value Dmin (VCI) from the specified value holding unit 11 using the VCI value as an address. judge.

At either time 65001 or 65535, the cell arrival interval is not satisfied, so that the VCI flag (VCI) remains set to "OFF".

At time 65535, the timer counter makes one cycle, and at time 164, when a cell having the VCI value arrives, cell arrival / VCI detecting section 10 detects the arrival of the cell and the VCI value of the cell and sends it to control section 12. send.

In response, the cell arrival information holding unit 122
Sets the cell arrival flag FB to “1” and holds the VCI value in the register RB.

In the cell arrival processing phase, the VCI selection selector 125 selects the VCI value of the arrival cell held in the RB of the cell arrival information holding unit 122.

The determination unit 126 reads the time stamp (VCI) and the flag (VCI) from the memory of the time stamp holding unit 13 using the VCI value as an address, and reads the specified value Dmin (VCI) from the specified value holding unit 11 for determination. I do.

In this case, since the flag is OFF and the time stamp value and the timer value are 65000 and 164 respectively, it is determined that the specified values are not satisfied, and the arriving cell is processed as a violation (violation processing). Examples of the method include a method of discarding a violating cell and a method of marking a violating cell and transferring it as a low priority cell.

The time stamp value 164 and the flag “OFF” are written in the time stamp holding unit 13 using the VCI as an address.

Thereafter, if no cell having the VCI arrives until time 945, it is determined that the VCI satisfies the specified value in the periodic processing phase at time 945, and a flag is stored in the time stamp holding unit 13 using the VCI as an address. “ON” is written.

Next, a case will be described in which the cell having the VCI value arrives at time 65000, and the timer counter 14 circulates twice until the next cell having the VCI value arrives for the first time.

When a cell having the VCI value arrives at time 65000, timer value 65000 is written to time stamp holding section 13 using the VCI as an address.

At time 65535, the timer counter 14 makes one cycle, and at time 245, the VCI is subjected to periodic processing.

In the cycle processing phase, the VCI selection selector 125 selects the value of the cycle control VCI control counter 121 as the VCI value.

The determination unit 126 reads the time stamp (VCI) and the flag (VCI) from the memory of the time stamp holding unit 13 and reads the specified value Dmin (VCI) from the specified value holding unit 11 using the VCI value as an address. I do.

In this case, since the time stamp value and the timer value are 65000 and 245, respectively,
The elapsed time from the arrival of the cell having I is 781, which satisfies the specified value 780.

“ON” is written as a flag in the time stamp holding unit 13 using the VCI as an address.

Further, at time 65535, the timer counter 1
4 and the cell having the VCI arrives at time 164, the cell arrival / VCI detection unit 10 detects the arrival of the cell and the VCI value of the cell and sends it to the observation circuit control unit 12.

In response to this, the cell arrival information holding unit 122
Sets the cell arrival flag FB to “1” and holds the VCI value in the register RB.

In the cell arrival processing phase, the VCI selection selector 125 selects the VCI value of the arrival cell held in the RB of the cell arrival information holding unit 122.

The determination unit 126 reads the time stamp (VCI) and the flag (VCI) from the memory of the time stamp holding unit 13 and the specified value Dmin (VCI) from the specified value holding unit 11 using the VCI value as an address. judge.

The time stamp value and the timer value are 65000 and 164, respectively, and the elapsed time is 780 in calculation. However, since the flag is “ON”, it is assumed that the cell satisfies the specified value without error. Is determined.

[0159]

As described above, according to the present invention,
By periodically detecting the violation of the minimum cell arrival interval rule, even if the timer counter makes a round when the cells arrive at a certain interval or more, accurate observation and the violation of the minimum cell arrival interval rule are always performed. Detection becomes possible.

[Brief description of the drawings]

FIG. 1 shows an outline of the present invention.

FIG. 2 shows a method of defining a peak speed in an ATM network.

FIG. 3 shows a conventionally proposed peak speed specified value violation detection circuit using a time stamp.

FIG. 4 shows a case where a violation is detected even though the specified value is satisfied when the circuit of FIG. 3 is used.

FIG. 5 is a configuration diagram of a traffic observation circuit proposed in the present invention.

FIG. 6 is an example of a processing phase within one cell suspension time.

FIG. 7 shows a time relationship of each processing phase within one cell suspension time.

FIG. 8 is a configuration diagram of an observation circuit control unit.

FIG. 9 shows a relationship between a prescribed value of a minimum arrival interval and a time at which periodic processing is to be performed in a traffic observation circuit proposed in the present invention.

FIG. 10 shows an operation example of the traffic observation circuit proposed in the present invention in time series.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Line 3 Violation processing unit 10 Cell arrival / VCI detection unit 11 Specified value holding unit 12 Observation circuit control unit 13 Time stamp holding unit 14 Timer counter 15 Clock unit 21 Memory 22 Timer counter 23 Judgment circuit 24 Violation processing unit 25 Call Control unit 111 Memory in specified value holding unit 121 Period control VCI control counter 122 Cell arrival information holding unit 123 Call processing information holding unit 124 Processing timing management unit 125 VCI selection selector 126 Judgment unit 131 Memory in time stamp holding unit

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-2-205142 (JP, A) JP-A-2-224440 (JP, A) JP-A 4-266240 (JP, A) JP-A-5-205 252191 (JP, A) JP-A-5-136806 (JP, A) (58) Fields investigated (Int. Cl. ⁶ , DB name) H04L 12/24-12/28 H04L 12/56

Claims (1)

(57) [Claims] 2. Description of the Related Art In a communication network in which information is divided into fixed-length cells and transferred, traffic for performing traffic observation by setting peak traffic as a specified value of a cell arrival interval in advance for each logical channel for traffic observation in the network. In the observation circuit, a timer that counts up for each cell holding time, holding means for holding a cell arrival time for each logical channel, and a value held in the holding means for holding the cell arrival time and a value of the timer Determining means for determining whether the cell arrival interval satisfies the specified value from the value, and determining whether or not the current time is at a certain period specific to each logical channel, regardless of whether a cell has arrived for each logical channel. Display means for determining whether or not the specified value or more has elapsed from the time of the value held in the holding means, and displaying the result. When the cell arrives, the value displayed on the display means corresponding to the logical channel of the cell is referred to, and the displayed value is the value held in the holding means at the previous determination time. From the timer value representing the current time only when the specified value has not passed since the time of the above and the value held in the holding means, using the determination means to determine whether the cell arrival interval satisfies the specified value. A traffic observing circuit characterized by determining