JP2855172B2 - Variable rate transmission method, and transmission apparatus and reception apparatus using the method - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to code division multiple access (CDM) in mobile communication.
A: Code Division Multiple Access), in particular, a variable-rate transmission method that achieves an apparent variable-rate transmission by transmitting and receiving variable-length data contained in a fixed-length frame at a fixed transmission rate. The present invention relates to a transmitting device and a receiving device using the method.

BACKGROUND ART In CDMA mobile communication, voice codec output data (transmission data) is primary-modulated, and a primary-modulated signal is secondary-modulated with a pseudo-random code sequence (spread code sequence) to provide a wide band. The spectrum is spread and transmitted. The bit rate of the spread code sequence is called a chip rate, which is several tens to several hundred times faster than the transmission rate. Binary or quaternary phase modulation is widely used for primary modulation, and binary phase modulation is widely used for secondary modulation.

By the way, for example, when a voice call is considered, the information amount of a voice signal to be transmitted is not always constant in time, but generally changes every moment. Therefore,
If the transmission data is divided into frame units of a fixed time length and data transmission with a variable number of bits is performed for each frame, the transmission rate can be changed over time, and the information necessary for each frame period can be changed. Can be transmitted efficiently. As a result, power consumption in the transmitter can be reduced without performing useless transmission.

When transmitting data with different transmission rates in CDMA,
The following method is used. First, when transmitting data whose transmission rate is lower than the frame transmission rate,
Transmit using part of the transmission frame (for example, R.Pa
dovani “Reverse link performance of IS-95 based c
ellular systems "IEEE Personal Communications, vol.1
pp.28-34, 3rd Quarter1994). On the other hand, when transmitting data having a higher transmission rate than frame transmission, high-speed data is divided into a plurality of transmission sequences, and the divided data is spread with different spreading codes and transmitted.

However, in this method, it is necessary to notify the receiving side of the transmission rate information. Alternatively, when the transmission rate information is not notified, the possible values of the transmission rate are determined in advance, the error detection of the reception data is performed for all the transmission rates, and the reception data at the transmission rate at which no error is detected is detected. Is output as correct data.

In this case, if an error occurs during transmission of the transmission rate information, the effective data length in the received frame cannot be determined, and even if no error occurs in the data portion, the transmission data is reproduced correctly on the receiving side. It becomes difficult.

For this reason, the conventional data transmission method has a problem that it is difficult to realize variable rate transmission in which the transmission rate is freely changed during communication. Also, in such a data transmission method, when data is transmitted at a considerably lower speed than the maximum transmission rate, a period during which data transmission is not performed occurs in a frame, and transmission becomes bursty. There is a problem that such burst transmission causes EMI (Elecrtromagnetic Interference).

In the case where many transmission errors occur as in a mobile communication environment, error correction of transmission data (FEC: Forward Error
Correction) is generally performed to improve transmission quality. At this time, the transmission side (including transmission rate information) that has been error-correction coded on the transmission side is subjected to error correction decoding on the reception side, and then the transmission rate information portion is extracted to obtain the effective data in the received frame. The data length will be determined. For this reason, before error correction decoding, transmission rate information cannot be obtained, and the decoding operation is performed without determining the data length to be decoded.
Therefore, the effect of error correction cannot be sufficiently obtained as it is.

On the other hand, some errors in transmission data greatly reduce the quality of received data when an error occurs. For example,
Control data requires higher quality transmission than voice data. Although different depending on the audio coding method, some of the audio data include those that greatly degrade the quality when an error occurs and those that do not. in this way,
It is common that data of different importance levels are mixed in transmission data.

For this reason, TDMA is a method of transmitting errors with different correction capabilities using correction codes according to the importance of transmission data.
(See, for example, "Digital Automobile Telephone System Standards" RCR STD-27B Radio System Development Center). However, this method lacks flexibility for transmitting various data having different transmission rates.

As described above, when transmitting high-speed data, a transmission method is used in which a plurality of transmission sequences are spread with different spreading codes, and the spread signals are combined and transmitted. When such a signal is synchronously detected and demodulated on the receiving side, there is a method of periodically inserting pilot symbols into transmission data on the transmitting side (for example, Sanbe "Fading distortion compensation system of 16QAM for land mobile communication"). Academic Theory B-II, No.1pp7-15 198
See January 2009. Alternatively, the revised version of S. Sampei,
“Rayleigh Fading Compensation for QAM in Land Mob
ile Radio Communications, IEEE transactions on vehi
cular technology, Vol. 42, No. 2, May 1993). If this method is applied to a signal spread with a plurality of different spreading codes, the same pilot symbol must be transmitted in a plurality of transmission sequences. However, since each transmission sequence undergoes the same fading, there is no need to use pilot symbols in a plurality of transmission sequences. CDMA
Now, since the same frequency band is shared by multiple users,
When an extra signal is transmitted, the interference to other users increases by the amount of the transmission power, and the number of users that can be accommodated in a predetermined frequency band decreases.

Furthermore, the high-speed data is divided into a plurality of transmission sequences, spread with different spreading codes, and then synthesized. The synthesized signal is converted into a signal in a radio frequency band, power-amplified, and transmitted. In this case, when a plurality of spread signals are combined in phase, the combined signal amplitude increases in proportion to the number of transmission sequences. Therefore, a linear transmission power amplifier having a high peak power is required. However, such a power amplifier consumes a large amount of power, so that it cannot be applied to a mobile phone in which low power consumption is important.

DISCLOSURE OF THE INVENTION An object of the present invention is to provide a variable rate transmission method capable of freely changing a transmission rate without notifying a transmission side of data transmission rate information to a receiving side, and a transmitting apparatus and a receiving apparatus using the method. It is to be.

Another object of the present invention is to provide a variable-rate transmission method capable of protecting data according to the importance when the data includes data of different importance, and a transmission apparatus and a reception apparatus using the method. It is to provide.

Still another object of the present invention is to provide a variable rate transmission method capable of flexibly transmitting data from a low speed to a high speed, and a transmission apparatus and a reception apparatus using the method.

First, according to the present invention, in a variable rate transmission method for changing an average transmission rate by transmitting transmission data of variable length in each frame of a fixed time length, Calculating, for each frame, an error detection code of the transmission data; transmitting, in each frame, the transmission data and the error detection code at a predetermined constant transmission rate; In a frame, a blank portion where the transmission data and the error detection code do not exist is a step of stopping transmission, and a receiving side receives each of the frames based on the fixed transmission rate; Detecting the error detection code in each frame; and transmitting the variable length transmission data in each frame based on the detection result of the error detection code. Variable rate transmission method characterized by comprising the step of restoring the data is provided.

In the step of detecting the error detection code, the data in each received frame is sequentially divided by predetermined data while shifting one bit at a time, and when the remainder becomes zero, the error detection code is detected. You may judge that it was done.

In the step of restoring the transmission data, a point in time before the error detection code is detected by the number of bits of the error detection code may be determined as the last bit position of the transmission data.

On the transmitting side, a step of periodically inserting a known pilot symbol into each frame, and a step of arranging important data in the transmission data near the pilot symbol, on the receiving side, Detecting the pilot symbol, and by the detected pilot symbol,
The method may include a step of compensating the received transmission data and the error detection code, and a step of returning the received transmission data to the original arrangement.

The step of arranging the important data in the vicinity of the pilot symbol includes: writing the transmission data alternately from the beginning and end of an N-row × Μ-column memory for each row; A step of sequentially reading out every column, and a step of inserting the pilot symbol every time one column is read out, wherein the important data may be arranged in advance at the head of the transmission data.

On the transmitting side, a code division multiple access (CDMA) comprising a step of primary-modulating the transmission data and the error detection code and a step of secondary-modulating the primary-modulated signal with a spreading sequence code. You may.

The transmission power of the pilot symbol and the important data may be increased.

On the transmitting side, the total number of data of the transmission data and the error detection code is 1 / K (K
Is a positive integer) or less, a step of notifying the receiving side that the transmission is repeated K times, and a step of generating a frame in which the transmission data and the error detection code are repeated K times for each bit; Transmitting each of the generated frames at a transmission power of 1 / K as compared with a case where bits are not repeated, and on the receiving side, using a value K notified from the transmitting side, The method may further include a step of thinning out data from the received transmission data and the error detection code to restore original data.

On the transmitting side, a step of periodically inserting a known pilot symbol into each frame, and a step of arranging important data in the transmission data near the pilot symbol, on the receiving side, Detecting the pilot symbol, and by the detected pilot symbol,
The method may include a step of compensating the received transmission data and the error detection code, and a step of returning the received transmission data to the original arrangement.

A step of dividing the transmission data into respective frames of a plurality of channels and allocating the same; and a step of periodically inserting a known pilot symbol into each frame of one channel of the plurality of channels; Arranging important data in the vicinity of the pilot symbol, and using different spreading sequence codes assigned to the plurality of channels, simultaneously spreading the transmission data and transmitting the data through the channels. And receiving the plurality of channels at the same time; detecting the pilot symbols of the one channel; and using the detected pilot symbols to detect each of the plurality of channels. Compensating a received signal, and returning the received transmission data to the original arrangement. It may be.

When simultaneously transmitting a plurality of channels on the transmitting side, the transmission may be performed while shifting the phase of each carrier of the channels.

 The important data may be control data.

A transmitting step of arranging the error detection code at a fixed position in each of the frames, and a receiving side of separating the error detection code at a fixed position of each of the frames. And obtaining the number of bits of the transmission data based on the error detection code.

On the transmitting side, performing a primary modulation on the transmission data and the error detection code in each of the frames;
A second-modulation in-frame data that is second-modulated with a spreading code sequence for transmission.

The transmitting side includes a step of performing error correction coding and interleaving of the transmission data before the primary modulation, and a step of performing a primary demodulation of the received transmission data on a receiving side, Deinterleaving and error-correction decoding the demodulated transmission data.

On the transmitting side, when the total data length of the transmission data and the error detection code in each frame is 1 / K (K is a positive integer) or less of the maximum number of bits that can be transmitted in each frame, A step of repeating each bit of the transmission data and the error detection code K times, and a step of reducing the transmission power of each frame to 1 / K as compared with a case where the bits are not repeated. In the above, a process of performing K-bit interval integration on the received transmission data and the error detection code, and a process of thinning out the integrated data for each K bits,
Restoring the transmission data.

The transmitting side includes a step of adding transmission rate information indicating the number of bits of data in each of the frames and the error detection code to a fixed position in the frame. For each frame, a step of obtaining a final bit position of the transmission data based on the transmission rate information; a step of calculating an error detection code for the transmission data up to the final bit position; Comparing the received error detection code with the received error detection code; and, when the comparison results match, determining that the transmission data up to the last bit position is correct data. Is also good.

On the transmitting side, performing a primary modulation on the transmission data and the error detection code in each of the frames;
A second-modulation in-frame data that is second-modulated with a spreading code sequence for transmission.

On the transmitting side, before the primary modulation, a step of performing error correction coding on the transmission data, the transmission rate information, and the error detection code in each frame; After interleaving the data of step (a), supplying the data to a step of performing primary modulation. On the receiving side, a step of despreading the received data in each of the frames using a spreading code sequence; Firstly demodulating the spread signal; deinterleaving the transmission data after the first demodulation; error correcting and decoding the transmission rate information and the error detection code; Decoding the transmission data up to the last bit based on the result of the error correction.

The transmitting side includes a step of adding the transmission rate information in the current frame to a fixed position in the immediately preceding frame, and the receiving side transmits the transmission rate information received in the immediately preceding frame. The method may further include a step of extracting, and a step of determining a last bit position of data in a current frame based on the extracted transmission rate information.

On the transmission side, a step of performing error correction coding on each data in each of the frames, a step of interleaving each of the frames, a step of performing primary modulation of each of the interleaved frames, and a step of performing primary modulation on each of the frames Performing a secondary modulation of spreading the transmission data in the frame with a spreading code sequence; and, on the receiving side, performing a primary demodulation of the received transmission data; and performing a transmission after the primary demodulation. Deinterleaving data, the transmission rate information transmitted in the immediately preceding frame, and error correcting and decoding the error detection code in the current frame, and based on the result of the error correction decoding, Error correcting and decoding the transmission data up to the last bit.

If the number of bits of the transmission data is equal to or less than 1 / K (K is a positive integer) of the maximum number of bits that can be transmitted in each frame, the transmitting side repeats each bit of the transmission data K times. And transmitting the respective frames at 1 / K of power compared to the case of not repeating K times. On the receiving side, the data in each of the received frames is integrated by a K-bit interval. And a step of thinning out the integrated data every K bits and restoring the transmission data.

Secondly, according to the present invention, there is provided a transmission apparatus which changes an average transmission rate by transmitting variable-length transmission data in each frame having a fixed time length, thereby changing the average transmission rate. A memory for storing data; a means for calculating an error detection code of the transmission data for each of the frames; a pilot symbol inserting means for periodically inserting a known pilot symbol into each of the frames; Data rearranging means for arranging important data in the transmitted data in the vicinity of the pilot symbol, and transmitting the rearranged transmission data and the error detection code at a predetermined constant transmission rate. At the same time, in each of the frames, a blank portion in which the transmission data and the error detection code are not present is a transmission that stops transmission. Provided a transmitter, characterized by comprising a stage.

The data rearrangement means, when the number of bits of a slot sandwiched by the pilot symbols is N, and the number of slots included in each frame is Μ, the transmission data is written to the memory in Μ bit-length row units, The important data may be arranged near the pilot symbol by reading the written transmission data from the memory in N-bit column units.

The data relocation means, when writing to the memory,
The writing of the important data may be performed alternately row by row from the beginning and end of the memory.

A primary modulator that modulates data in each frame including the transmission data, and a secondary modulator that performs secondary modulation that spreads the primary modulated data of each frame using a spreading sequence code. The pilot symbol insertion means may be connected between the primary modulator and the secondary modulator, and may periodically insert the pilot symbol between the slots.

Transmission power control means may be inserted after the pilot symbol insertion means to control transmission power according to the importance of data in each frame.

When the number of bits of the transmission data is less than the maximum number of bits of each of the frames, a predetermined specific code is written in the blank portion, and the transmission power control unit sets the transmission power of the blank portion to zero. Good.

A repeater circuit for repeating the transmission data and the error detection code K times for each bit is disposed at a preceding stage of the memory, and the transmission power control unit determines that the transmission power of each frame is not repeated K times. Compared to 1 /
It may be K.

A pilot symbol insertion unit for periodically inserting a known pilot symbol into each of the frames; a memory for storing the transmission data, a memory capable of simultaneously reading a plurality of series of transmission data; and writing to the memory. Important data in the obtained transmission data is rearranged so as to be located in the vicinity of the pilot symbol, data rearrangement means to write to the memory, and a plurality of transmission data read from the memory,
A plurality of primary modulators each of which performs primary modulation; a plurality of transmission power control means for controlling transmission power of each frame output from each of the primary modulators; and a plurality of transmission power control means output from each of the transmission power control means A plurality of secondary modulators for spreading the data in each of the frames using different spreading codes; and an adder circuit for combining a plurality of secondary-modulated signals. The transmission data is divided and written into the memory, and the plurality of divided transmission data sequences are simultaneously read out from the memory and supplied to the plurality of primary modulators. Connected after any one of the primary modulators and between the slots of each said frame,
The pilot symbol may be periodically inserted, and the transmission power control unit may increase transmission power when transmitting the important data.

There may be provided a plurality of phase control circuits inserted after the plurality of primary modulators to shift the phase of the carrier of the secondary modulator.

A means for adding the error detection code to a fixed position in a frame may be provided.

Means for error correction encoding data in each of the frames, means for interleaving the error corrected encoded data, means for primary modulating the interleaved data, and spreading code for the primary modulated data. Means for performing secondary modulation using a sequence.

Means for repeating each bit of the data in each frame K times when the data in each frame is not more than 1 / K (K is a positive integer) of the maximum number of bits that can be transmitted in one frame; Transmission power control means for setting the transmission power of each frame to 1 / K as compared with the case where no repeat is performed K times.

The apparatus may further include an adding unit that adds transmission rate information indicating a total number of bits of data in each of the frames and the error detection code to a fixed position in the frame.

Means for error correction coding the transmission data, the transmission rate information, and the error detection code in each frame; means for interleaving the error correction coded data; and primary modulation of the interleaved data. It may include a primary modulation unit, and a secondary modulation unit that spreads the data after the primary modulation using a spreading code sequence.

The transmission rate information of the data in the current frame,
Means may be provided for adding to a fixed position in the immediately preceding frame.

Means for error correction coding the transmission data, the transmission rate information, and the error detection code in each frame; means for interleaving the error correction coded data; and primary modulation of the interleaved data. It may include a primary modulation unit, and a secondary modulation unit that spreads the data after the primary modulation using a spreading code sequence.

Means for repeating each bit of the data in each frame K times when the data in each frame is not more than 1 / K (K is a positive integer) of the maximum number of bits that can be transmitted in one frame; Transmission power control means for setting the transmission power of each frame to 1 / K as compared with the case where no repeat is performed K times.

Third, according to the present invention, means for receiving a frame including transmission data and an error detection code based on a fixed transmission rate; means for detecting the error detection code in each frame; Means for determining the transmitted variable data length based on the detection result of the detection code, and means for restoring variable-length transmission data in each of the frames, wherein the means for detecting the error detection code comprises: Shifting the data within 1 bit by one bit to increase the error detection range, and then repeating the division by a predetermined value to determine that the error detection code has been detected when the remainder becomes zero. Is provided.

Means for detecting a known pilot symbol that is inserted into each of the frames and transmitted periodically, a memory for storing data in each of the frames, and important data are arranged near the pilot symbols, When receiving the data in each of the frames, the data written in the memory may be rearranged to relocate the data to be returned to the original data arrangement.

When the number of bits of the slot sandwiched by the pilot symbols is N and the number of slots included in each of the frames is Μ, the data rearrangement unit stores data in each of the frames in the memory in N-bit column units. Write
The data in each of the frames may be returned to the original arrangement by reading the written data from the memory in units of Μ bit length rows.

The data rearrangement unit may alternately read data from the memory line by line from the beginning and end of the memory.

A second demodulator for despreading received data using a spreading sequence code; a compensation circuit for compensating data in each frame using the pilot symbols; and a demodulation of the data compensated by the compensation circuit. And a primary demodulator.

The received data in each of the frames may be provided with a unit that integrates the data in a K-bit section, and a unit that thins out the integrated data for each K bits to restore the transmission data.

A plurality of secondary demodulators for respectively despreading a plurality of sequences of frames transmitted simultaneously through a plurality of channels, and periodically inserted into a frame transmitted through one of the plurality of channels. A compensating circuit for compensating data in the plurality of sequences of frames using pilot symbols; a plurality of primary demodulators for demodulating the compensated data; a memory capable of simultaneously writing the plurality of sequences of data; Data relocation means for simultaneously writing the plurality of series of data to the memory for each frame and reading the data in a different order from the writing, thereby returning important data arranged in the vicinity of the pilot symbol to the original data arrangement. You may.

A phase control circuit may be provided for each of the channels and corrects each phase of the plurality of series of data.

A secondary demodulator for despreading the received spread signal and outputting a despread signal; a primary demodulator for restoring data in each frame from the despread signal; a fixed position in each frame; An error detection code memory for storing the error detection code, a means for calculating an error detection code from data in each of the frames, and an error detection code stored in the error detection code memory for the calculated error detection code. Comparing means for comparing with a code, and obtaining the number of bits of the data in each of the frames based on the comparison result, thereby receiving data of a variable number of bits for each frame.

The apparatus may further include: means for deinterleaving the data output from the primary demodulator; and means for performing error correction decoding on the deinterleaved data.

The received data in each of the frames may be provided with a unit that integrates the data in a K-bit section, and a unit that thins out the integrated data for each K bits to restore the transmission data.

Located at a fixed location in each received frame,
Means for determining the last bit position of the transmission data based on transmission rate information indicating the number of bits of transmission data in the frame; means for calculating an error detection code of the transmission data up to the last bit; Means for comparing the calculated error detection code with the error detection code sent as data in the frame, and when the comparison result matches, the data up to the last bit position is transmitted data in the frame. And means for determining that

A secondary demodulator that despreads the received spread signal and outputs a despread signal; a primary demodulator that restores data in each frame from the despread signal; and a secondary demodulator that is output from the primary demodulator. Means for deinterleaving the received data, means for error correcting and decoding the transmission rate information and the error detection code output from the deinterleaving means, and based on a result of the correction decoding, the transmission data Means for error correction decoding up to the last bit.

The means for determining the last bit position, based on the transmission rate information received in the immediately preceding frame,
The last bit position of the transmission data of the current frame may be determined.

A secondary demodulator that despreads the received spread signal and outputs a despread signal; a primary demodulator that restores data in each frame from the despread signal; and a secondary demodulator that is output from the primary demodulator. Means for deinterleaving the received data, means for error correction decoding the transmission rate information and the error detection code in the data output from the deinterleaving means, and the transmission rate received in the immediately preceding frame. Means for error correction decoding the transmission data up to the last bit based on the result of the error correction decoding of the information.

When the number of bits of data in the frame is equal to or less than 1 / K (K is a positive integer) of the maximum number of bits that can be transmitted in one frame, the received data in each frame is integrated by a K-bit interval. And a means for thinning out the integrated data for each K bits and restoring the transmission data.

Fourth, according to the present invention, on the transmitting side, a process of periodically inserting a known pilot symbol into each frame and a process of arranging important data in transmission data near the pilot symbol are described. On the receiving side, a process of detecting the pilot symbol, and by the detected pilot symbol,
A variable rate transmission method is provided, comprising: compensating the received transmission data; and returning the received transmission data to its original configuration.

According to the present invention, since the transmission rate is estimated on the receiving side based on the error detection information, it is not necessary for the transmitting side to notify the receiving side of the transmission rate. For this reason, variable rate data in which the transmission rate changes for each frame during communication can be transmitted.

On the other hand, if the transmission rate information is notified to the receiving side, more reliable variable rate transmission becomes possible.

In the present invention, important data is mapped near pilot symbols. In the vicinity of the pilot symbol, as will be described later, the probability of a data error is small, so that data protection according to the degree of importance can be performed.

Furthermore, according to the present invention, in CDMA transmission, the transmission power is increased according to the degree of importance, so that errors in important data can be reduced. Further, by changing the transmission power, the number of users who can communicate in a certain frequency band can be increased.

In addition, the present invention can be applied to a case where the number of bits of data in each frame is considerably smaller than the maximum number of bits that can be transmitted in one frame, in other words, the transmission rate of transmission data is considerably larger than the maximum transmission rate of a frame. Even when it is low, burst transmission can be avoided by repeatedly transmitting each bit of the transmission data.

Furthermore, in the present invention, in CDMA transmission, high-speed data is transmitted using a plurality of sequences, and pilot symbols and control data are transmitted using only one of the plurality of sequences, so that data can be transmitted at high speed. At the same time, interference power given to other users can be reduced. Further, in this case, since the transmission signals of each stream are combined after the phases are rotated, the peak power of the transmission power can be suppressed. Thereby, interference power given to other users can also be reduced.

BRIEF DESCRIPTION OF THE DRAWINGS FIGS. 1A and 1B are block diagrams showing a first embodiment of a transmission device and a reception device using a variable rate transmission method according to the present invention.

2A and 2B are diagrams showing the appearance of the data sequence output from the multiplexing circuit 4 of the first embodiment. FIG. 2A shows the case where the transmission rate of transmission data is the maximum, and FIG. Is smaller than the maximum rate.

FIG. 3 is a conceptual diagram showing a frame memory 106B of the interleave circuit 106 of FIG. 1A.

FIG. 4 is a diagram showing a frame configuration of a data sequence output from the frame memory 106B of FIG. 1A.

FIG. 5 is a diagram showing a state of processing in the first embodiment when the frame memories 103 and 106B each having a two-plane configuration are used.

6A and 6B are block diagrams showing a second embodiment of the transmission device and the reception device using the variable rate transmission method according to the present invention.

7A and 7B are diagrams showing the output of the multiplexing circuit 104 of FIG. 6A, FIG. 7A shows the case where the transmission rate of the transmission data is the maximum, and FIG. It shows the case where it is smaller than.

8A and 8B are conceptual diagrams showing the appearance of the data sequence output from multiplexing circuit 104 in FIG. 6A when transmitting transmission rate information in the immediately preceding frame.

9A and 9B are block diagrams showing a third embodiment of a transmitting device and a receiving device using the variable rate transmission method according to the present invention.

FIG. 10 is a conceptual diagram for explaining the operation of the repeat circuit 121 of FIG. 9A, and FIG.
10 (B) shows the output of the error correction coding circuit of FIG. 9A, and FIG. 10 (C) shows the output of the repeat circuit 121.

FIGS. 11A and 11B are block diagrams showing a fourth embodiment of the transmission device and the reception device using the variable rate transmission method according to the present invention.

FIG. 12 is a conceptual diagram for explaining the operation of the repeat circuit 121 of FIG. 11A. FIG.
12 (B) shows the output of the error correction encoding circuit of FIG. 11A, and FIG. 12 (C) shows the output of the repeat circuit 121.

FIG. 13 is a conceptual diagram for explaining a bit repetition method of intra-frame data in the fifth embodiment of the transmission device using the variable rate transmission method according to the present invention.

14A and 14B are block diagrams showing a sixth embodiment of the transmitting device and the receiving device using the variable rate transmission method according to the present invention.

FIG. 15A is a block diagram showing a configuration of pilot symbol insertion section 130 of FIG. 14A.

FIG. 15B is a block diagram showing a configuration of primary demodulator 152 in FIG. 14B.

FIG. 16 is a conceptual diagram showing the structure of data output from the multiplexing circuit 104 of FIG. 14A.

FIG. 17 is a conceptual diagram showing the order of writing and reading to and from the frame memory 106B in FIG. 14A.

FIG. 18 is a conceptual diagram showing a configuration of a modulation symbol sequence output from the 14A pilot symbol insertion circuit 130.

FIG. 19 is a conceptual diagram showing the slot structure of the sixth embodiment.

FIG. 20 is a block diagram showing a seventh embodiment of the transmission apparatus using the variable rate transmission method according to the present invention.

FIG. 21 is a conceptual diagram for explaining transmission power control in the seventh embodiment.

FIG. 22 is a conceptual diagram showing an example of data stored in the frame memory 106B in the eighth embodiment of the transmission device using the variable rate transmission method according to the present invention.

FIG. 23 is a block diagram illustrating a configuration of a main part of the receiving device of the eighth embodiment.

FIG. 24 is a block diagram showing a ninth embodiment of the transmission apparatus using the variable rate transmission method according to the present invention.

FIG. 25 is a block diagram illustrating a configuration of a main part of the receiving device of the fifth embodiment.

FIG. 26 is a block diagram showing a tenth embodiment of the transmitting apparatus using the variable rate transmission method according to the present invention.

FIG. 27 is a conceptual diagram showing the configuration of a plurality of series of frames transmitted in the tenth embodiment.

FIG. 28 is a diagram illustrating phase control of transmission data of a plurality of streams in the eleventh embodiment of the transmission apparatus using the variable rate transmission method according to the present invention.

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, embodiments of the present invention will be described with reference to the drawings.

Embodiment 1 FIGS. 1A and 1B are block diagrams showing a first embodiment of a transmitting apparatus and a receiving apparatus using a variable rate transmission method according to the present invention.

FIG. 1A shows a configuration of a transmission device. In FIG. 1A, a transmission data sequence applied to input terminal 101A is sent to error detection encoding circuit 102 and frame memory 103. The frame memory 103 holds data of the number of bits to be transmitted in one frame time. On the other hand, the error detection coding circuit 102
Is an error detection code for one frame of transmission data (for example,
CRC code). Next, the multiplexing circuit 104 adds the calculated error detection code immediately before the transmission data, and sequentially outputs a data sequence for each frame.

FIGS. 2A and 2B show the state of the data sequence output from the multiplexing circuit 4. FIG. FIG. 2A shows a case where the transmission rate of transmission data is the maximum, and FIG. 2B shows a case where the transmission rate is smaller than the maximum rate. As can be seen from FIG. 2B,
When transmitting at a transmission rate smaller than the maximum rate, a vacant time (a blank portion without data) is created in the frame. Then, the error detection code is inserted into a fixed position of one frame. For example, in FIG. 2A and FIG. 2B, it is arranged at the head of the frame.

Returning to FIG. 1A, the data sequence for one frame to which the error detection code has been added is subjected to error correction coding in error correction coding circuit 105 and input to interleave circuit 106.
The interleave circuit 106 has a control unit 106A and a frame memory 106B.

FIG. 3 shows the frame memory 106B of the interleave circuit 106.
FIG. The frame memory 106B has two of A and B.
FIG. 3 shows only one of the surfaces. An example of the interleaving process will be described with reference to FIG.
The control unit 106A reads a data sequence for one frame in a direction different from the direction in which the data sequence is written to the frame memory 106B. That is, control unit 106A reads out the transmission data written in the row direction of frame memory 106B in the column direction. The data series interleaved in this way is stored again on another surface of the frame memory 106B. The numbers (# 1- # N) given to the left side of the frame memory 106B in FIG.
This number indicates the data write order, which will be described in a sixth embodiment described later.

FIG. 4 shows a frame configuration of a data sequence output from the frame memory 106B. A data section corresponding to a column of the frame memory 106B is called a slot. Therefore, as shown in FIG. 3, one frame of the frame memory 106B
Assuming that Μ bits / row × N rows, one slot is composed of N bits and one frame is composed of Μ slots. The number of bits in one frame is N × Μ bits. In this way, the transmission data is transmitted to the error correction encoding circuit 105.
After performing the error correction coding in step (1), the signal is interleaved by the interleave circuit 106, so that the probability that the burst error can be corrected by the error correction code increases.

The frame memories 103 and 106B in FIG. 1A each have a two-sided (A-side and B-side) configuration so as to hold data for two frames. The first sent 1
The data for the frame is first written to the A side of the frame memory 103, subjected to error correction coding and interleave processing, and then written to the A side of the frame memory 106B. Subsequently, one frame worth of data transmitted is written to the B side of the frame memory 103, subjected to error correction coding and interleave processing, and then written to the B side of the frame memory 106B. As described above, by alternately using the A-side and the B-side, it becomes possible to continue the processing for a series of data series.

FIG. 5 shows a state of processing using a two-sided frame memory. As can be seen from FIG. 5, after writing the input data sequence for one frame to the frame memory 103, error correction coding and interleaving are collectively processed, and the processed data is written to the frame memory 106B. Therefore, the transmission data sequence results in a delay of one frame and a processing delay. After the data sequence output from the frame memory 106B is phase-modulated by the primary modulator 108, the secondary modulator 109 generates a chip having an integral multiple (usually several tens to several hundreds) of the transmission rate of the transmission data. The signal is phase-modulated (spread) by a spreading code sequence having a rate, and transmitted from an output terminal 110. It is assumed that the modulation by the primary modulator 108 is not performed in an empty section in the slot.

By the above processing, the transmitting device transmits a variable number of bits in a fixed frame time. In other words,
Apparently, spread data is transmitted at a variable transmission rate.

FIG. 1B is a block diagram showing a receiving device. This receiving apparatus converts the spread data supplied from the input terminal 150 into 2
The next demodulator 151 performs despreading. The despread data is detected by primary demodulator 152 and supplied to deinterleave circuit 153. The deinterleave circuit 153 has a control unit 153A and a two-sided frame memory 153B, and operates in a procedure in which the input and output of the interleave circuit 106 on the transmission side are reversed. That is, the control unit 153A writes data to the frame memory 153B for each column (for each slot) and reads data for each row. By such an operation, the original data sequence for one frame is reproduced, and an error detection code and a subsequent data sequence are obtained.

The error detection code and the data sequence are subjected to error correction decoding by the error correction
Supplied to 55. Separation circuit 155 separates an error detection code always located at a fixed position of a frame from a transmission data sequence. This is performed by synchronizing the frames in the separation circuit 155. The separated error detection code is supplied to and held in the error detection code memory 157.
On the other hand, the data series is output from output terminal 159 as received data, and is also input to error detection encoding circuit 156. The error detection coding circuit 156 performs the same error detection coding on the input data sequence as on the transmitting side again. The error detection code obtained in this way is compared in a comparison circuit 158.
The data sequence held in the error detection code memory 157 is compared with each code bit. The comparison circuit 158 outputs a match signal from the terminal 160 when all code bits match. If no error occurs in the middle of transmission, a match signal will be output with the correct number of bits of transmission data, and output from the output terminal 159, if the reception data sequence in the reception frame is valid. I can judge.

When data transmission is performed using the transmission / reception device configured as described above, it is not necessary to transmit information indicating the number of transmission bits in a frame from the transmission side to the reception side. For this reason, even if the transmission side changes the number of transmission bits in a frame (that is, an apparent transmission rate) for each frame, the reception side can correctly respond to this. That is, it is possible to perform variable rate transmission such that the apparent transmission rate changes for each frame during communication. In addition,
Since the length of the frame is always constant, even if there is a frame without any transmission data, the receiving side can always correctly recognize the frame.

By the way, when there is an error in the transmission data, the comparison circuit 158 detects a coincidence signal at an incorrect position (erroneous detection).
There is a possibility that. In this case, the separation circuit 155 outputs only a part of the valid data in the frame as valid data, or outputs data in which meaningless data is added after all the valid data. However, in the transmission / reception apparatus of the present embodiment, the error detection code is arranged at a fixed position in the frame. If it is a number, the probability of this erroneous detection can be made very small. If the number of transmission bits in the frame is limited (for example, set in units of 2 bits), the position at which the match signal of the comparison circuit 158 is obtained is limited. The output probability can be further reduced.

Embodiment 2 FIGS. 6A and 6B are block diagrams showing a second embodiment of the transmission / reception apparatus using the variable rate transmission method according to the present invention. The second embodiment differs from the first embodiment in that transmission rate information is notified from the transmission side to the reception side. Specifically, the following points are different.

(1) The transmission rate information memory 113 is provided in the transmission device.

The transmission rate information memory 113 is a memory for storing the transmission rate information of the frame data held in the frame memory 103, that is, information indicating the number of bits of the frame data. This information is stored in terminal 101B for each frame.
Are input to the transmission rate information memory 113. As a result, the transmitting apparatus transmits data with a variable number of bits together with transmission rate information in a fixed frame time.

(2) The point that the multiplexing circuit 104 inserts transmission rate information before the error detection code.

7A and 7B show the output of the multiplexing circuit 104. FIG.
Indicates the case where the transmission rate of the transmission data is the maximum, and FIG.
Indicates that the transmission rate of the transmission data is smaller than the maximum rate. In the case of FIG. 7B, the idle time in the frame,
That is, there is a blank portion without data. As shown in these figures, each frame is composed of transmission rate information, an error detection code, and transmission data. The difference from the first embodiment is that transmission rate information is arranged before the error detection code.

(3) The transmission rate information memory 161 is also provided in the receiving device.

The transmission rate information memory 161 includes an error correction coding circuit 154.
The transmission rate information is extracted from the received data supplied from the server and stored.

According to such a configuration, from the transmission device, data as shown in FIG. 7A and FIG. 7B is interleaved,
Modulated, spread and transmitted.

The receiving apparatus performs despreading, demodulation, and deinterleaving as in the first embodiment. Thereby, the original data sequence for one frame is reproduced, and transmission rate information, an error detection code, and a transmission data sequence are obtained. These are sent to the error correction decoding circuit 154, where they are error correction decoded.

Of the decoded output from the error correction decoding circuit 154, transmission rate information is input to and held in the transmission rate information memory 161 and output from the terminal 162. On the other hand, after the transmission data sequence and the error detection code are separated by the separation circuit 155, the transmission data is output as reception data from the terminal 159, and the error detection coding circuit 15
Entered in 6. On the other hand, the error detection code is input to and stored in the error detection code memory 157.

The error detection coding circuit 156 performs the same error detection coding on the input data sequence as on the transmission device side up to the last bit again. The difference from the first embodiment is that the last bit is supplied from the transmission rate information memory 161. Hereinafter, similarly to the first embodiment, the comparison circuit 158
The error detection code output from the error detection encoding circuit 156 is compared with the contents of the error detection code memory 157 for each code bit, and when all code bits match, a match signal is output to the terminal.
Output from 160. If no error occurs during transmission, a match signal is output to terminal 160. At this time, it can be determined that the transmission data sequence in the frame output from terminal 159 and the transmission rate information output from terminal 162 have been correctly received. In this embodiment, when the convolutional code is used as the error correction code and the maximum likelihood decoding method is used as the decoding method, the decoding result of the transmission rate information is once obtained by sequential maximum likelihood decoding, and Error correction decoding is performed on the transmission data up to the specified last bit. In this case, due to the nature of the decoder, the reliability of the decoding result of the transmission rate information increases as the length of the input signal accumulated therein, that is, the length of the subsequent coded data sequence increases. For this reason, it is desirable to arrange a fixed-length data sequence such as an error detection code other than the transmission data as continuously as possible immediately after the transmission rate information.

Further, in order to decode the transmission data up to the last bit, the following method may be used. That is, the transmitting device may add a tail bit immediately after the last bit and perform error correction coding, and the receiving device may complete the error correction decoding process using the tail bit. In the transmitting device, a tail bit is inserted after the transmission rate information and transmitted. After the decoding operation in the receiving device is once completed to obtain the transmission rate information, the decoding operation is started again and the transmission data is transmitted. Can be decoded to the last bit.

In the above-described series of operations, the input data sequence is written into the memory 153A of the deinterleave circuit 153 for one frame, and then processes such as deinterleave, error correction decoding, and error detection encoding are collectively performed. For this reason, the transmission data sequence receives a deinterleave delay and a processing delay for one frame.

In order to avoid such a delay, the following method can be adopted. First, the transmitting apparatus adds the transmission rate information of the transmission data in the current frame, which is stored in the transmission rate information memory 113, to the beginning of the immediately preceding frame and transmits the frame. On the other hand, the receiving apparatus obtains the last bit position of the transmission data of the current frame based on the transmission rate information in the immediately preceding frame stored in the transmission rate information memory 161.

8A and 8B show the multiplexing circuit 104 of the transmitting apparatus at this time.
3 shows a state of a data sequence output from the. When the transmission rate information is transmitted by the preceding frame, the receiving apparatus can know the number of bits of valid data before deinterleaving the current frame, and can eliminate frame delay due to deinterleaving. Therefore, even when it is necessary to measure the power of the received signal with a short delay time, such as in data transmission that performs transmission power control, and to provide feedback to the transmission side, the received signal power during the period in which valid data is transmitted can be accurately estimated It becomes possible to measure.

When transmitting the transmission rate information in the preceding frame, a dummy frame for transmitting the transmission rate information of the first frame is required when starting a series of data transmission.

According to the above-described transmitting device and receiving device, the receiving device performs re-encoding of the error detection code and coincidence detection,
Whether or not the transmission data is valid is checked for each frame. For this reason, even if the received transmission rate information (that is, information indicating the number of transmission bits in a frame) is incorrect, the possibility of outputting transmission data having a different length (erroneous detection) is extremely reduced. be able to. As a result, highly reliable variable rate data transmission can be performed.

In the transmission / reception apparatus of the first embodiment or the second embodiment, when trying to transmit a data sequence at a low transmission rate, transmission data per frame decreases. Since the frame length is constant, in such a case, burst transmission in which a short data sequence is intermittently transmitted is performed. The number of bits transmitted in one frame (the total number of bits including the error detection code and the data sequence) is 1 / K of the maximum number of bits.
(K is a predetermined positive integer) or less, it is known in advance that each bit of the data sequence after error correction coding is generated and transmitted K times by repeating the data sequence. Extreme burst transmissions can be avoided. An embodiment that realizes such data transmission will be described below.

Third Embodiment FIGS. 9A and 9B are block diagrams showing a third embodiment of a transmitting apparatus and a receiving apparatus using the variable rate transmission method according to the present invention.

The main points of this embodiment different from the first embodiment shown in FIGS. 1A and 1B are as follows.

(1) On the transmitting side, a repeat circuit 121 is inserted immediately after the error correction encoding circuit 105.

As shown in FIG. 10C, the repeat circuit 121 has a function of repeating each bit in the frame K times (two times in FIG. 10C). That is, a new data sequence is generated in which each bit of the output data from the error correction encoding circuit 105 shown in FIG.

(2) A multiplier 123 for controlling transmission power is arranged between the primary modulator 108 and the secondary modulator 109.

The data output from the repeat circuit 121 is interleaved by the interleave circuit 106, and then subjected to primary and secondary modulation and transmitted. In this case, since the same bit is transmitted K times, the average transmission power becomes K times larger than in the case where no repeat is performed.
The magnitude of the average transmission power is proportional to the magnitude of the interference power given to other users. Therefore, in order to prevent the average transmission power from increasing even if the repeat is performed, the multiplier 123 is provided after the primary modulator 108 in the configuration of FIG.
The output of 108 is multiplied by a power factor = 1 / K.

(3) On the receiving side, an integrating circuit 171 and a thinning-out circuit 172 are inserted immediately after the deinterleave circuit 153.

The integration circuit 171 calculates an integration value for each of the K consecutive symbols of the deinterleaved received data sequence. Subsequent thinning circuit 172 thins out the integrated output at intervals of K symbols and outputs the result. Both circuits 171 and 172 perform this operation only on the repeated transmission data portion, and pass the other additional bits as they are.

The operation of this embodiment will be described. FIG. 10A shows the output of the multiplexing circuit 104. Thus, if there is a free space in the frame, burst transmission is performed. For this reason, the error detection code and the transmission data (FIG. 10B) output from the error correction coding circuit 105 are input to the repeat circuit 121, and the repeat coefficient K is determined so as to fill the frame (as shown in the figure). Is K = 2), and each bit is K-multiplexed (FIG. 10).
(C)). Transmitting this does not result in a burst transmission.

On the receiving side, on the other hand, the same data sequence as the output of the error correction coding circuit 105 of the transmitting device is obtained through the integrating circuit 171 and the thinning circuit 172. After that, a final received data sequence is obtained in the same manner as in the first embodiment.

It should be noted that the number of repetitions K used in the receiving device must be the same as the value in the transmitting device, and therefore needs to be transmitted to the receiving side prior to data transmission.

According to the present embodiment, even when the data transmission rate is considerably lower than the maximum rate, variable rate transmission can be realized while avoiding burst transmission.

Fourth Embodiment FIGS. 11A and 11B are block diagrams showing a fourth embodiment of a transmitting apparatus and a receiving apparatus using the variable rate transmission method according to the present invention.

This embodiment has a configuration in which the second embodiment and the third embodiment are combined. That is, in the third embodiment, the transmission rate information memory 113 is added to the transmitting device side, and the transmission rate information memory 161 is added to the receiving device side.

FIG. 12 is a diagram corresponding to FIG. 10 of the second embodiment. The point that the transmission rate information is inserted immediately before the transmission data,
This is a feature of the present embodiment. Other operations can be easily understood from the second and third embodiments, and thus detailed description is omitted.

Embodiment 5 In the above-described third and fourth embodiments, each bit is repeated K times for each bit, but the present invention is not limited to this. As shown in FIG. 13, predetermined bits (four bits in FIG. 13) are grouped together and K
(Two times in FIG. 13). In this case, on the receiving side, as shown in FIG. 25, a relocation circuit 173 is connected between the deinterleave circuit 153 and the integration circuit 171 and the same bit is extracted by the relocation circuit 173. Integrate K bits at a time. Other configurations are the same as those in FIG. 9B.

According to this embodiment, effects similar to those of the fourth embodiment can be obtained.

In the first to fifth embodiments described above, pilot symbols are not handled. The pilot symbol is
It has a predetermined pattern and is inserted into transmission data periodically and transmitted intermittently or continuously through a dedicated channel. The receiving side extracts pilot symbols of a known pattern, estimates fading in the transmission path, and compensates for fluctuations in the received signal due to fading. The following embodiment relates to a variable rate transmission system including such pilot symbols.

Sixth Embodiment FIGS. 14A and 14B are block diagrams showing a sixth embodiment of the transmission device and the reception device using the variable rate transmission method according to the present invention.

The difference between the transmitting apparatus of FIG. 14A and the transmitting apparatus of FIG. 1A is as follows.

(1) A pilot symbol insertion circuit 130 for inserting a pilot symbol includes a primary modulator 108 and a secondary modulator 10
9 is connected between. Pilot symbol insertion circuit 130 will be described later with reference to FIG. 15A.

(2) Control data is supplied from the input terminal 101B to the multiplexing circuit 104. This control data is important data used for line connection and the like.

(3) The user data is omitted from the frame memory 103, and the user data is directly supplied to the multiplexing circuit 104 from the input terminal 101A.

On the other hand, the difference between the receiving apparatus of FIG. 14B and the receiving apparatus of FIG. 1B is as follows.

(1) The configuration of the primary demodulator 152 is different from that of FIG. 1B.
This will be described later with reference to FIG. 15B.

(2) In the present embodiment, the position of the error detection code in the frame is not specified as in the first embodiment. Therefore, each circuit after the separation circuit 155 in FIG. 1B is omitted, and an error detection circuit 144 is connected to the output terminal of the error correction decoding circuit 154.

This error detection circuit 144 converts the data in each frame into
While shifting one bit at a time, the data is sequentially divided by predetermined data, and it is determined that an error detection code has been detected at the time of division. In this embodiment, since the data length of the error detection code is known in advance, the position of the last bit of the transmission data can be estimated by identifying the error detection code. That is, transmission data can be extracted.

Returning to FIG. 14A, the user data sequence applied to the input terminal 101 is first collected into data for each predetermined frame time Tf. The error detection code circuit 102 calculates a check code (for example, a CRC code) for one frame of the user data and supplies it to the multiplexing circuit 104. The multiplexing circuit 104 has an input terminal 10 at the beginning of the user data collected in one frame.
The control data from 1A is added, and the check code from the error detection code circuit 102 is added to the end of the data in the frame to create data for one frame.

FIG. 16 shows data output from the multiplexing circuit 104.
As shown in FIG. 16, the empty space in the frame is caused by the fact that the total number of data bits (transmission rate) including the control data, the user data and the check code is greater than the maximum number of bits (maximum rate) that can be transmitted in one transmission sequence. When is small.

The transmission data for one frame is sent to the error correction encoding unit 105.
, And is supplied to the interleave circuit 106. As shown in FIG. 17, the interleave circuit 106 reads one frame of data written in the interleave memory 106B in a direction different from the written direction. That is, one frame of transmission data written in the row direction is read at a predetermined speed in the column direction.

The read data is phase-modulated by the primary modulator 108 and supplied to the pilot symbol insertion circuit 130. Pilot symbol insertion circuit 130 periodically inserts pilot symbols of a known pattern into the supplied data to form a modulation symbol sequence.

FIG. 15A is a block diagram showing a configuration of pilot symbol insertion circuit 130. Pilot symbols having a known pattern periodically generated by pilot generation circuit 131 are supplied to multiplexing circuit 132. The multiplexing circuit 132
The data supplied from the next modulator 108 and pilot symbols are multiplexed to generate a modulation symbol sequence.

FIG. 18 shows the configuration of a modulation symbol sequence. In FIG. 18, a section sandwiched by pilot symbols that are periodically inserted is called a slot. 1 slot is N bits, 1
If a frame is a Μslot, one frame is composed of N × Μ bits.

This modulation symbol sequence is supplied to the secondary modulator 109. Secondary modulator 109 multiplies the modulation symbol sequence by a spreading code sequence having a chip rate that is an integral multiple (several tens to several hundreds times) of the symbol rate, and outputs the result from output terminal 110 to the transmission power amplifier.

When a pilot symbol of a known pattern is periodically inserted into data and transmitted, the receiving side estimates and corrects the phase of each symbol in a slot using the pilot symbol. That is, the phase of each symbol that fluctuates due to fading during transmission is compensated. This processing is performed by the primary demodulator 152.

FIG. 15B is a block diagram showing a configuration of primary demodulator 152. The despread signal supplied from the secondary demodulator 151 is supplied to the quasi-synchronous detection circuit 181. The quasi-synchronous detection circuit 181 performs quasi-synchronous detection of the despread signal using a carrier having the same frequency as the transmitting side, and supplies a detection output to the separation circuit 182. Separation circuit 182 separates the data obtained by the quasi-synchronous detection into a data symbol and a pilot symbol, supplies the data symbol to compensation circuit 183, and supplies the pilot symbol to transfer function estimation circuit 184.

The transfer function estimating circuit 184 estimates the transfer function of the propagation path from the pilot symbols, and
Supply to The compensation circuit 183 compensates for the phase of the data symbol based on the estimated transfer function, and supplies a compensation output to the decision circuit 185. The determination circuit 185 determines the compensated data and outputs a data symbol. The details are disclosed in the above-mentioned paper by S. Sampei.

As described above, when a pilot symbol is periodically inserted and transmitted, and synchronous detection is performed using the pilot symbol, the accuracy of channel estimation becomes highest near the pilot symbol. Thus, in this embodiment, a configuration is adopted in which data requiring high-quality transmission is arranged and transmitted in the vicinity of the pilot symbol. Therefore, by controlling writing / reading to / from the frame memory 106B of the interleave circuit 106 in FIG. 14A, important data requiring high-quality transmission such as control data is arranged near the pilot signal. To

Hereinafter, this processing will be described with reference to FIG. 3 and FIG.

As described above, FIG. 3 shows the data arrangement of one frame in the frame memory 106B in the interleave circuit 106. It is assumed that the number of bits in one row of the frame memory 106B is equal to the number of slots constituting one frame. Also,
The number of bits in one column (that is, the number of rows) is N, which is equal to the number of bits in one slot. In the two-dimensional frame memory 106B, data for one frame including a check code for error detection is written bit by bit in the row direction. In this case, the data is alternately written to the frame memory 106B from the top and bottom for one frame for each row. The line numbers shown in FIG. 3 indicate the order of writing. As shown in FIG. 16, since the control data is at the head of the frame, it is written in the row with the lower number. That is, this important data is written to the beginning and end of one frame in the frame memory 106B.

On the other hand, when reading data from the frame memory 106B, one bit is read in the column direction. In this case, the column numbers (1 to Μ) correspond to the slot numbers in FIG. When such data is read from the frame memory 106B, important data (control data) is mapped in the vicinity of the pilot symbol in each slot, as shown in FIG. In FIG. 19, there is an empty space in one slot, which corresponds to an empty space in one frame in FIG.

On the receiving side, a deinterleave circuit 153 is provided corresponding to the interleave circuit 106. The deinterleave circuit 153 restores the data decomposed into slots into data having a frame configuration. The deinterleave circuit 106 restores data by performing an operation reverse to that of the interleave circuit 106.

When data is transmitted in this way, important control data can be transmitted using the least error-prone portion near the pilot symbol.

By the way, the error rate of the received data decreases as the received power increases. Therefore, the following seventh embodiment aims to reduce the data error rate by changing the transmission power according to the importance of the transmission data and transmitting the data.

Seventh Embodiment FIG. 20 is a block diagram showing a seventh embodiment of the transmitting apparatus using the variable rate transmission method according to the present invention. This transmitting apparatus differs from the transmitting apparatus of the sixth embodiment shown in FIG. 14A in that a multiplier 141
Is the point where is arranged. Multiplier 141 multiplies the output of pilot symbol insertion circuit 130 as shown in FIG. 19 by a predetermined power coefficient. In this case, the multiplier 141 applies a larger power multiplier to the data that is heavier. For example, an important pilot symbol and control data in the vicinity thereof are multiplied by the maximum power coefficient.

FIG. 21 is a conceptual diagram showing the relationship between data types and power coefficients. Each data is assigned a predetermined number of bits for each type, excluding free data. A specific code is written in the empty data portion to distinguish it from other portions. This empty data portion is multiplied by zero and is not transmitted. That is, when the code indicating the empty data is read, the power coefficient is set to zero so as not to transmit.

In FIG. 20, the power coefficient multiplier 141 is inserted before the secondary modulator 109, but may be inserted after the secondary modulator 109.

FIG. 21 shows how transmission power is controlled according to the importance of data. When the transmission power is controlled in this manner, important data is transmitted with a large transmission power, so that the error rate can be reduced. In addition, since free data is not transmitted, it is not necessary to use extra transmission power. As a result, interference to other users is reduced, and more users can be accommodated in a given frequency band.

Embodiment 8 An embodiment in which data is transmitted and received at different transmission rates without transmitting transmission rate information indicating the number of bits of data in each frame to the other party has already been described in the first embodiment. Another embodiment that does not transmit to the receiving side will be described with reference to FIG. 22 and FIG.

The transmitting device of this embodiment is the same as the transmitting device of the seventh embodiment shown in FIG. In this transmitting apparatus, when the transmission transmission rate is lower than the maximum transmission data, the transmission bit sequence written in the frame memory of the transmission side interleaving circuit 106 is as shown in FIG. An error detection code (check code) is added to the end of the transmission data in each frame, and subsequent data is empty data.

At the time of transmission, transmission data in the frame memory 106B is read out at a constant speed for each column, and each is sequentially mapped to each slot and transmitted. In FIG. 22, a blank portion where no transmission data exists corresponds to a blank portion in each slot. The primary modulator 108 does not perform primary modulation on this blank portion. As a result, transmission data of a variable number of bits is transmitted at a constant transmission rate in a constant frame time.

FIG. 23 shows a main part of a receiving apparatus for receiving data transmitted in this way. On the receiving side, a deinterleave circuit 153 is provided, and the data in one frame is reproduced by the reverse operation of the interleave circuit 106 on the transmission side. this is,
This is the same as the first embodiment.

One frame of data is supplied to an error detection circuit 144 connected to the output side of the deinterleave circuit 106. The error detection circuit 144 detects the last bit of the transmission data as described above. That is, the error detection circuit 14
4 is to sequentially divide by predetermined data while shifting the data in the frame one bit at a time, and when it is divisible, judge that an error detection code has been received, and at that time judge that there is no error in the transmission data. I do. When it is determined that there is no error, when the data received so far is output, it is the transmitted original data.

When such transmission and reception are performed, it is not necessary to transmit transmission rate information indicating the number of data of each frame each time.
Further, even if the number of data to be transmitted for each frame (apparent transmission rate) is changed, the reception side can correctly receive the data. This is because the frame time is fixed,
This is because the frame can be recognized on the receiving side even if the transmission data has not been transmitted.

By doing so, it becomes possible to perform variable rate transmission in which the apparent transmission rate (actually, the number of data bits) changes for each frame without transmitting the transmission rate information to the receiving side. In the conventional variable rate transmission of the type in which the transmission rate information is not transmitted in advance, it is necessary to preliminarily determine possible values of the transmission rate, so that only a limited transmission rate can be handled. On the other hand, in this embodiment, transmission at any rate can be freely performed.

By the way, if there is an error during transmission, it may be detected that there is no error at an incorrect position. In such a case,
Whether only part of the transmission data is output as valid data,
Alternatively, meaningless random data is added to the transmission data and output as valid data. Therefore, when the possible value of the number of data to be transmitted is limited to discrete values, the position where an error is detected is restricted, so that the probability of erroneously outputting data can be reduced.

Embodiment 9 This embodiment corresponds to the third embodiment, and is an embodiment for avoiding burst transmission which occurs when short data is transmitted intermittently. When the transmission rate is 1 / K (K is a predetermined positive integer) or less of the maximum rate that can be transmitted in one transmission sequence, after error correction coding, each bit is repeated K times to generate transmission frame data. I do. The repetition value K is first transmitted to the receiving side.

FIG. 24 shows the configuration of this transmitting apparatus. In this embodiment, FIG.
The differences from the transmitting apparatus of the seventh embodiment shown in FIG. 20 are as follows.

(1) On the output side of the error correction encoding unit 105, a repeat circuit 1
Point where 21 was inserted.

(2) A multiplier 141 for multiplying the transmission power coefficient is provided on the output side of the pilot symbol insertion circuit 130, and compared with the case of the seventh embodiment shown in FIG. The point that the transmission power is controlled to 1 / K as compared with the case where no repeat is performed K times.

The data transmitted by this transmitting device is demodulated by a receiving device similar to that shown in FIG. 9B. As a result, the transmitted data is reproduced.

After that, writing / reading is performed in the deinterleave circuit 204 in a manner opposite to that at the time of transmission, and data for each slot is returned to data of a frame. Then, in the data thinning circuit 205,
Data that has been repeated K bits is reproduced as original data without repetition.

In this manner, by repeatedly transmitting K times for each bit, burst transmission can be avoided. Further, the eighth embodiment can be used together with the ninth embodiment.
In this case, if the repetition rate K is transmitted at the beginning of the communication, the transmission data can be reproduced on the receiving side based on the error detection information even if the transmission rate changes for each frame. As a result, extreme burst transmission can be avoided.

Embodiment 10 At the time of high-speed data transmission, it is necessary to transmit data of N × Μ bits or more per frame. In this case, it is possible to cope with the problem by transmitting in parallel using a plurality of channels. The tenth embodiment is for performing such high-speed data transmission.

FIG. 26 shows a tenth embodiment of the transmitting apparatus using the variable rate transmission method according to the present invention, and FIG. 27 shows the structure of a frame to be transmitted.

FIGS. 26 and 27 show a case where three frames are transmitted simultaneously (three streams). When transmitting data at a higher speed, it is necessary to increase the number of streams. The number of the channel used for high-speed data transmission has been notified to the receiving side before the start of transmission. The capacity of the frame memory of the interleave circuit 106 shown in FIG. 26 needs to be at least twice as large as that of frames of all streams transmitted simultaneously. In addition, it is necessary to be able to simultaneously read out data for a plurality of streams. Note that the phase control circuit 146b
And 146c will be described in the following eleventh embodiment. In the tenth embodiment, a case where the phase control is not performed will be described.

In FIG. 26, an interleave circuit 106 sequentially writes data to be transmitted to a frame memory at a high speed to form a plurality of transmission frames. Since the control data is arranged at the head of each frame, the control data is written in the frame portion of the sequence a in the frame memory of the interleave circuit 106.
Then, when the a-sequence portion of the frame memory is full,
The data is written to the frame portion of the b series in the frame memory 106. When the b-sequence portion of the frame memory becomes full, it is written to the c-frame portion of the frame memory.
Writing to these frame memories is fast and faster than the normal transmission speed (in this case, three times or more the normal transmission speed).

The speed at which a plurality of frames are simultaneously read from the frame memory at the same time is read at a normal transmission speed. The method of writing and reading each frame in these frame memories is the same as in the sixth embodiment.

The data for each sequence is subjected to primary modulation by primary modulators 108a-108c, and then to secondary modulators using different spreading code sequences.
The signals are spread by 109a-109c and transmitted by the addition circuit 148 for the three systems.

Here, only the a-sequence is inserted with pilot symbols, and the other sequences are compensated on the receiving side by using pilot symbols of the a-sequence. By doing so, it is sufficient to insert pilot symbols only in the a-sequence. Here, the power coefficient is controlled in the same manner as in the seventh embodiment.

FIG. 27 shows a frame configuration of each transmission sequence in a case where high-speed transmission is performed by simultaneously transmitting a plurality of sequences. As shown in this figure, even if a plurality of transmission sequences are used, control data and pilot symbols are transmitted only in one sequence. In other streams, portions corresponding to pilot symbols and control data are not transmitted. As a result, interference power given to other users can be reduced.

In order to receive data transmitted using a plurality of sequences, the same number of reception sequences as those on the transmission side are required. The receiving side uses the pilot symbols sent in one sequence to compensate for received signals in other sequences. In addition, control of each stream is performed using control data sent in one stream. A deinterleave circuit corresponding to the interleave circuit 106 on the transmission side performs writing / reading in the opposite direction to that on the transmission side. The frame memory of the deinterleave circuit on the receiving side is
A plurality of series of data must be able to be written at the same time, and the written plurality of series of data can be read at high speed (in this example, three times normal).

Embodiment 11 At the time of high-speed data transmission, as described in the tenth embodiment, transmission data is divided into a plurality of transmission sequences, each of which is subjected to primary modulation, and then spread by a plurality of spreading codes into a wideband signal and transmitted. . Describing with two-phase modulation, the phase after the primary modulation of each transmission sequence is 0 (transmission data is “1”) or π radian (transmission data is “0”). When this is subjected to two-phase modulation with a spreading code sequence, the spread signal also takes a phase of 0 or π radians. Therefore, if a plurality of spread signals are synthesized as they are, the amplitude of the N sequence becomes N times. Therefore, a transmission power amplifier having a high peak power is required.

In order to avoid this, phase control is performed by the phase control circuits 146b and 146c shown in FIG. In this regard, FIG.
This will be described with reference to FIG. FIG. 28 illustrates a case where N sequences are transmitted simultaneously. At this time, the phase of the primary or secondary modulation signal of the n-th sequence is rotated by nπ / N radians. In this case, when N = 2, the composite amplitude is 1.
When it is 4 times and N = 4, the composite amplitude is 2.6 times. Therefore, the peak of the transmission power can be suppressed as compared with the case of simply combining.

Since the embodiment of FIG. 26 has three series, the phase control circuit 146b rotates the phase by π / 3, and the phase control circuit 146c rotates the phase by 2π / 3. In FIG. 26, the phase control circuits 146b and 146c
They are inserted before the secondary modulators 109b and 109c, respectively. However, it is not limited to this. Since the phase of the secondary-modulated carrier may be shifted, the secondary modulator 10
After 9b and 109c, phase control circuits 146b and 146c may be provided. On the other hand, since the receiving side knows the phase difference for each sequence, it is necessary to correct the phase difference by a phase control circuit for each sequence and receive the signal. After correcting the phase difference of each sequence, compensation for other sequences can be performed using pilot symbols sent in one sequence, as in the tenth embodiment.

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-5-344162 (JP, A) JP-A-6-216963 (JP, A) JP-A-3-250935 (JP, A) JP-A-3-3 261255 (JP, A) JP-A-5-48577 (JP, A) JP-A-5-327580 (JP, A) JP-A-6-501349 (JP, A) (58) Fields investigated (Int. Cl. ⁶ , DB name) H04J 13/04 H04L 12/56 H04L 1/00 H04J 3/00

Claims (59)

(57) [Claims] 1. A variable rate transmission method in which an average transmission rate is changed by storing transmission data of a variable length in each frame of a fixed time length and transmitting the data, wherein a transmission side comprises: Calculating the error detection code of the transmission data; and transmitting the transmission data and the error detection code in each of the frames at a predetermined constant transmission rate; and in each of the frames, The transmission data and the blank portion where the error detection code does not exist are a step of stopping transmission, and a step of receiving the respective frames based on the constant transmission rate on the receiving side, and a step of receiving the respective frames in the respective frames. Detecting an error detection code, and restoring the variable-length transmission data in each frame based on a detection result of the error detection code. Variable rate transmission method characterized by comprising the processes. 2. The variable-rate transmission method according to claim 1, wherein the step of detecting the error detection code is performed by shifting data in each received frame by one bit. A variable rate transmission method, wherein data is sequentially divided, and when the remainder becomes zero, it is determined that the error detection code is detected. 3. The variable rate transmission method according to claim 2, wherein the step of restoring the transmission data is performed by a number of bits before the error detection code from the time when the error detection code is detected. A variable rate transmission method, wherein a time point is determined as a last bit position of the transmission data. 4. The variable rate transmission method according to claim 1, wherein the transmitting side periodically inserts a known pilot symbol into each of said frames, and transmits important data in said transmission data. At the receiving end, detecting the pilot symbol, and compensating the received transmission data and the error detection code with the detected pilot symbol. And a step of returning the received transmission data to the original arrangement. 5. The variable rate transmission method according to claim 4, wherein the step of arranging the important data in the vicinity of the pilot symbol comprises: storing the transmission data in an N-row × Μ-column memory. From the end, a step of writing alternately for each row, a step of sequentially reading the written transmission data for each column, and a step of inserting the pilot symbol each time one column is read. A variable-rate transmission method, wherein data is arranged in advance at the head of the transmission data. 6. The variable rate transmission method according to claim 4, wherein the transmitting side performs primary modulation of the transmission data and the error detection code, and spreads the primary modulated signal. A variable rate transmission method characterized by code division multiple access (CDMA) comprising a step of performing secondary modulation with a sequence code. 7. The variable rate transmission method according to claim 6, wherein transmission power of said pilot symbol and said important data is increased. 8. The variable rate transmission method according to claim 1, wherein, on the transmitting side, the total number of data of the transmission data and the error detection code is 1 / the maximum number of data that can be transmitted in one frame. If K (K is a positive integer) or less, a step of informing the receiving side that the transmission is repeated K times, and generating a frame in which the transmission data and the error detection code are repeated K times for each bit. And transmitting each of the generated frames at a transmission power of 1 / K as compared with a case where bits are not repeated.At the receiving side, a value K notified from the transmitting side is calculated. Using the received transmission data and the error detection code to restore the original data by thinning out the data. 9. The variable rate transmission method according to claim 8, wherein, on the transmitting side, a step of periodically inserting a known pilot symbol into each of said frames, and transmitting important data in said transmission data. At the receiving end, detecting the pilot symbol, and compensating the received transmission data and the error detection code with the detected pilot symbol. And a step of returning the received transmission data to the original arrangement. 10. The variable rate transmission method according to claim 1, wherein the transmitting side divides the transmission data into respective frames of a plurality of channels and assigns the divided data to each frame of a plurality of channels. Periodically inserting the important data in the transmission data in the vicinity of the pilot symbol; and separate spreading sequences assigned to the plurality of channels. Using a code to simultaneously spread the transmission data and transmit through each of the channels, wherein, on the receiving side, simultaneously receiving the plurality of channels; and pilot symbols of the one channel. Detecting, using the detected pilot symbols, each received signal of the plurality of channels. A variable rate transmission method, comprising: compensating; and returning the received transmission data to its original configuration. 11. The variable rate transmission method according to claim 10, wherein, when simultaneously transmitting a plurality of channels on the transmission side, the transmission is performed by shifting the phase of each carrier of said channels. Rate transmission method. 12. The variable rate transmission method according to any one of claims 1 to 7, 9 and 11, wherein the important data is control data. Variable rate transmission method. 13. The variable rate transmission method according to claim 1, further comprising the step of: arranging the error detection code at a fixed position in each of the frames on a transmitting side; Comprises a step of separating the error detection code at a fixed position of each frame, and a step of obtaining the number of bits of the transmission data based on the error detection code. Transmission method. 14. The variable rate transmission method according to claim 13, wherein the transmitting side primary-modulates the transmission data and the error detection code in each frame, and the primary modulation. Transmitting the data in the frame after performing secondary modulation on the spread code sequence using the spread code sequence. 15. The variable rate transmission method according to claim 14, further comprising a step of, on the transmission side, performing error correction coding and interleaving of the transmission data before performing the primary modulation, and A variable rate transmission method comprising: a step of performing primary demodulation on the received transmission data; and a step of deinterleaving and error correcting decoding the primary demodulated transmission data. 16. The variable rate transmission method according to claim 13, wherein, on the transmitting side, a total data length of the transmission data and the error detection code in each of the frames is equal to each of the frames. If the maximum number of bits that can be transmitted is 1 / K or less (K is a positive integer),
Each bit of the transmission data and the error detection code is K
And a step of setting the transmission power of each frame to 1 / K as compared with the case where the bit is not repeated, on the receiving side, the received transmission data and the error detection code. A variable bit transmission method, comprising: performing a K-bit interval integration; and performing a decimation process on the integrated data every K bits to restore the transmission data. 17. The variable rate transmission method according to claim 1, wherein: on the transmission side, transmission rate information indicating the number of bits of data in each frame and the error detection code are transmitted in the frame. A step of obtaining the last bit position of the transmission data based on the transmission rate information for each of the received frames; and Calculating an error detection code with respect to the transmission data up to, and comparing the calculated error detection code with the received error detection code. Deciding that the transmission data up to a position is correct data. 18. The variable rate transmission method according to claim 17, wherein the transmitting side primary-modulates the transmission data and the error detection code in each of the frames, and the primary modulation. Transmitting the data in the frame after performing secondary modulation on the spread code sequence using the spread code sequence. 19. The variable rate transmission method according to claim 18, wherein, on the transmission side, the transmission data, the transmission rate information, and the error detection code in each of the frames before the primary modulation. Error correcting coding, and interleaving the error correcting coded data in each of the frames and then supplying the data to a primary modulation process. Despreading the data in each frame using a spreading code sequence, primary demodulating the despread signal, deinterleaving the transmission data after primary demodulation, the transmission rate Error correcting and decoding information and the error detection code; and error correcting and decoding the transmission data up to the last bit based on a result of the error correction decoding. A variable rate transmission method, comprising: 20. The variable rate transmission method according to claim 17, wherein, on the transmission side, a step of adding the transmission rate information in a current frame to a fixed position in a previous frame is provided. A receiving side for extracting the transmission rate information received in the immediately preceding frame, and determining a final bit position of data in a current frame based on the extracted transmission rate information. And a variable rate transmission method. 21. The variable rate transmission method according to claim 20, wherein, on the transmission side, a step of performing error correction coding on each data in each of the frames; a step of interleaving each of the frames; A step of performing primary modulation on each of the interleaved frames; and performing a secondary modulation of spreading transmission data in each of the primary-modulated frames with a spreading code sequence. Firstly demodulating the transmission data thus obtained, deinterleaving the transmission data after the first demodulation, the transmission rate information transmitted in the immediately preceding frame,
And a step of performing error correction decoding of the error detection code in the current frame, and a step of performing error correction decoding of the transmission data up to the last bit based on a result of the error correction decoding. Variable rate transmission method. 22. The variable rate transmission method according to claim 17, wherein the number of bits of the transmission data is 1 / K (1 / K) of the maximum number of bits that can be transmitted in each frame. If K is a positive integer or less, the transmitting side transmits each frame at 1 / K of power compared to a process of repeating each bit of the transmission data K times and a case of not repeating K times. And at the receiving side, a step of integrating the received data in each of the frames over a K-bit interval, and thinning out the integrated data for each K-bit.
Restoring the transmission data. 23. A transmitting apparatus for changing an average transmission rate by transmitting variable-length transmission data in each frame having a fixed time length, wherein the memory stores the transmission data for each frame; Means for calculating an error detection code of the transmission data for each frame; pilot symbol insertion means for periodically inserting a known pilot symbol into each frame; and transmission data stored in the memory. Important data, data rearrangement means for arranging the vicinity of the pilot symbol, and the rearranged transmission data and the error detection code, while transmitting at a predetermined constant transmission rate, in each of the frames, Transmitting means for stopping transmission of a blank portion in which the transmission data and the error detection code do not exist. Transmitting apparatus according to claim Rukoto. 24. The transmitting apparatus according to claim 23, wherein said data rearrangement means sets the number of bits of a slot interposed by said pilot symbols to N, and sets the number of slots included in each frame to Μ. In this case, the transmission data is written in the memory in row units of bit length, and the written transmission data is read out from the memory in column units of N bit length, whereby the important data is arranged in the vicinity of the pilot symbol. A transmitting device. 25. The transmission device according to claim 24, wherein said data relocation means, when writing to said memory, writes said important data from the beginning and end of said memory for each line. A transmission device which performs the transmission alternately. 26. The transmission device according to claim 23, wherein: a primary modulator that modulates data in each frame including the transmission data; A secondary modulator for performing secondary modulation for spreading data of each frame by using a spreading sequence code, wherein the pilot symbol inserting unit is provided between the primary modulator and the secondary modulator. A transmitting apparatus which is connected and periodically inserts the pilot symbol between the slots. 27. A transmission apparatus according to claim 25, wherein transmission power control means is inserted after said pilot symbol insertion means, and transmission power is controlled in accordance with importance of data in each of said frames. A transmitting device. 28. In the transmitting apparatus according to claim 27, when the number of bits of the transmission data is less than the maximum number of bits of each frame, a predetermined specific code is written in a blank portion thereof. The transmission power control means sets transmission power of the blank portion to zero. 29. The transmission device according to claim 28, wherein a repeater for repeating the transmission data and the error detection code K times for each bit is disposed in a preceding stage of the memory, and the transmission power The transmitting device, wherein the control unit sets the transmission power of each frame to 1 / K as compared with the case where the K times are not repeated. 30. A transmitting apparatus for changing an average transmission rate by transmitting variable-length transmission data in each frame of a fixed time length and transmitting the data, wherein an error detection of the transmission data is performed for each frame. Means for calculating a code; means for periodically inserting a known pilot symbol into each of the frames; means for storing the transmission data; wherein a plurality of series of transmission data can be read simultaneously. A memory, rearranged so that important data in the transmission data written in the memory is located near the pilot symbol, and data rearrangement means written in the memory; and a plurality of data read from the memory. A plurality of primary modulators for respectively performing primary modulation on transmission data of a sequence, and output from each of the primary modulators A plurality of transmission power control means for controlling the transmission power of each frame, and a plurality of secondary modulators for spreading the data in each of the frames output from each of the transmission power control means using different spreading codes. An adder circuit for combining a plurality of secondary-modulated signals, wherein the data rearrangement unit divides the transmission data and writes the divided transmission data in the memory, and converts the divided transmission data sequences into the plurality of transmission data sequences. Reading simultaneously from a memory and supplying the same to the plurality of primary modulators, wherein the pilot symbol inserting means is connected after any one of the plurality of primary modulators, In between, the pilot symbol is periodically inserted, and the transmission power control means increases transmission power and transmits the transmission data and the important data when transmitting the important data. Blank portion where the absence of error detection code, the transmission apparatus characterized by stopping the transmission. 31. The transmitting apparatus according to claim 30, further comprising a plurality of phase control circuits inserted after said plurality of primary modulators to shift a phase of a carrier of said secondary modulator. A transmission device characterized by the above-mentioned. 32. A transmitting apparatus for changing an average transmission rate by transmitting variable-length transmission data in each frame of a fixed time length and transmitting the data, wherein an error in the transmission data is detected for each frame. Means for calculating a code; means for adding the error detection code to a fixed position in a frame; and transmission of the transmission data and the error detection code in each frame at a predetermined constant transmission rate. And transmitting means for stopping transmission of a blank portion in which the transmission data and the error detection code do not exist in each of the frames. 33. The transmission apparatus according to claim 32, wherein: means for error correction encoding data in each frame; means for interleaving error correction encoded data; and interleaved data. A transmission device comprising: means for performing primary modulation on the data; and means for performing secondary modulation on the primary-modulated data using a spreading code sequence. 34. The transmitting apparatus according to claim 32, wherein data in each of said frames is 1 / K (K is a positive integer) of a maximum number of bits that can be transmitted in one frame. In the following cases,
Means for repeating each bit of data in each of the frames K times, and transmission power control means for setting the transmission power of each frame to 1 / K as compared with the case of not repeating K times. Transmitting device. 35. A transmitting apparatus for changing an average transmission rate by transmitting variable-length transmission data in each frame of a fixed time length and transmitting the data, wherein an error in the transmission data is detected for each frame. Means for calculating a code, transmission rate information indicating the total number of bits of data in each frame, and an addition means for adding the error detection code to a fixed position in the frame, and The transmission data, the transmission rate information and the error detection code, while transmitting at a predetermined constant transmission rate, in each frame, a blank portion where the transmission data and the like do not exist, transmission means to stop transmission A transmission device comprising: 36. The transmission apparatus according to claim 35, wherein: transmission data in each of the frames, the transmission rate information,
Means for performing error correction coding on the error detection code; means for interleaving error corrected coded data; primary modulation means for performing primary modulation on the interleaved data; and data after the primary modulation. And a secondary modulation means for spreading the signal using a spreading code sequence. 37. The transmitting apparatus according to claim 35, further comprising means for adding said transmission rate information of data in a current frame to a fixed position in a previous frame. Transmission device. 38. The transmission device according to claim 37, wherein: transmission data in each frame, said transmission rate information,
Means for performing error correction coding on the error detection code; means for interleaving error corrected coded data; primary modulation means for performing primary modulation on the interleaved data; and data after the primary modulation. And a secondary modulation means for spreading the signal using a spreading code sequence. 39. The transmitting apparatus according to claim 35, wherein the data in each frame is 1 / K of the maximum number of bits that can be transmitted in one frame (K is a positive number). Is an integer) or less,
Means for repeating each bit of data in each of the frames K times, and transmission power control means for setting the transmission power of each frame to 1 / K as compared with the case of not repeating K times. Transmitting device. 40. A means for receiving a frame including transmission data and an error detection code based on a fixed transmission rate; means for detecting the error detection code in each of the frames; Means for determining a variable data length transmitted on the basis of the above, and restoring variable-length transmission data in each of the frames, wherein the means for detecting the error detection code comprises: Shifting bit by bit to increase the error detection range, then repeating division by a predetermined value,
A receiving apparatus for determining that the error detection code has been detected when the remainder becomes zero. 41. A means for receiving a frame including transmission data and an error detection code based on a fixed transmission rate, means for detecting the error detection code in each of the frames, and a detection result of the error detection code A means for restoring the variable-length transmission data in each frame, a means for detecting a known pilot symbol that is inserted into each frame and transmitted periodically, and A memory for storing data, and when receiving data in each of the frames in which important data is arranged near the pilot symbol, rearrange the data written in the memory to return to the original data arrangement. A receiving device comprising: data relocation means. 42. The receiving apparatus according to claim 41, wherein said data rearrangement means sets the number of bits of slots interposed between said pilot symbols to N, and sets the number of slots included in each frame to フ レ ー ム. In this case, the data in each frame is written in the memory in N-bit column units, and the written data is read out from the memory in Μ-bit length row units, so that the data in each frame is restored to the original. A receiving device, which is returned to an arrangement. 43. A receiving apparatus according to claim 42, wherein said data rearrangement means alternately reads data from said memory line by line from the beginning and end of said memory. Transmission device. 44. The receiving apparatus according to claim 41, wherein: a secondary demodulator that despreads received data using a spreading sequence code; and A compensating circuit for compensating data in each of the frames, and a primary demodulator for demodulating the data compensated by the compensating circuit. 45. A receiving apparatus according to claim 44, wherein: means for integrating the received data in each frame in a K-bit section; and thinning out the integrated data for each K-bit. Process,
Means for restoring the transmission data. 46. A plurality of secondary demodulators for respectively despreading a plurality of sequences of frames transmitted simultaneously through a plurality of channels, and a frame transmitted through one of the plurality of channels to: Compensation circuit for compensating for data in the plurality of series of frames using periodically inserted pilot symbols, a plurality of primary demodulators for demodulating the compensated data, transmission data and an error detection code Means for receiving a frame based on a fixed transmission rate, means for detecting the error detection code in each frame, and the variable length in each frame based on the detection result of the error detection code. Means for restoring transmission data; a memory capable of simultaneously writing the plurality of series of data; and a memory for storing the plurality of series of data for each frame. A data rearrangement unit for simultaneously writing data to the memory and reading the data in a different order from the writing, thereby returning important data arranged near the pilot symbol to the original data arrangement. 47. The receiving apparatus according to claim 46, further comprising a phase control circuit provided for each of said channels and for correcting each phase of said plurality of series of data. 48. The receiving apparatus according to claim 40, wherein: a secondary demodulator for despreading the received spread signal and outputting a despread signal; and a data in each of the frames from the despread signal. Restore 1
A second demodulator; an error detection code memory for storing the error detection code at a fixed position in each frame; a unit for calculating an error detection code from data in each frame; and the calculated error detection. Comparing means for comparing a code with an error detection code stored in the error detection code memory, and obtaining a number of bits of data in each of the frames based on the comparison result, thereby making it possible to vary each frame. A receiving device for receiving data of a bit number. 49. The receiving apparatus according to claim 48, further comprising: means for deinterleaving the data output from said primary demodulator; and means for performing error correction decoding on said deinterleaved data. A receiving device, comprising: 50. A receiving apparatus according to claim 48 or 49, wherein a means for integrating the received data in each of said frames in a section of K bits, and Decimation processing for each bit,
Means for restoring the transmission data. 51. A means for receiving a frame containing transmission data and an error detection code based on a fixed transmission rate, means for detecting the error detection code in each of the frames, and a detection result of the error detection code Means for restoring the variable-length transmission data in each frame, based on the transmission rate information indicating the number of bits of transmission data in each frame, which is arranged at a fixed position of each received frame. Means for determining the last bit position of the transmission data based on the above, means for calculating an error detection code of the transmission data up to the last bit, and transmitting the calculated error detection code as data in the frame. Means for comparing with the error detection code obtained, and when the comparison result matches, the data up to the last bit position is transmitted data in the frame. Receiving apparatus characterized by comprising a the determining means is. 52. The receiving apparatus according to claim 51, wherein: a secondary demodulator for despreading the received spread signal and outputting a despread signal; and A primary demodulator for restoring data; a unit for deinterleaving data output from the primary demodulator; and an error correction decoding of the transmission rate information and the error detection code output from the deinterleaving unit. And a means for error correction decoding the transmission data up to the last bit based on the result of the correction decoding. 53. The receiving apparatus according to claim 51, wherein said means for determining the last bit position is based on said transmission rate information received in the immediately preceding frame. A receiving device for determining a last bit position. 54. A receiving apparatus according to claim 53, further comprising: a secondary demodulator for despreading the received spread signal and outputting a despread signal; A primary demodulator for restoring data; a means for deinterleaving data output from the primary demodulator; and a data output from the deinterleaving means,
Means for error correcting and decoding the transmission rate information and the error detection code; and error correction of the transmission data to the last bit based on the result of error correction decoding of the transmission rate information received in the immediately preceding frame. And a means for performing correction decoding. 55. The receiving apparatus according to claim 51, wherein the number of bits of data in said frame is equal to the maximum number of bits that can be transmitted in one frame.
When 1 / K or less (K is a positive integer) or less, means for integrating the received data in each of the frames in a K-bit interval, and thinning out the integrated data for each K-bit;
Means for restoring the transmission data. 56. A transmitting side comprising a step of periodically inserting a known pilot symbol into each frame and a step of arranging important data in transmission data near the pilot symbol. Comprises a step of detecting the pilot symbol, a step of compensating the received transmission data with the detected pilot symbol, and a step of returning the received transmission data to an original arrangement. Variable rate transmission method. 57. The variable rate transmission method according to claim 56, wherein the step of arranging the important data in the vicinity of the pilot symbol comprises: transmitting the transmission data to a head of an N-row × Μ-column memory. From the end, a step of writing alternately for each row, a step of sequentially reading the written transmission data for each column, and a step of inserting the pilot symbol each time one column is read. A variable-rate transmission method, wherein data is arranged in advance at the head of the transmission data. 58. A variable rate transmission method according to claim 56, wherein said transmitting side performs a primary modulation of said transmission data, and said primary modulated signal is secondarily modulated with a spreading sequence code. A variable rate transmission method using code division multiple access (CDMA) comprising a step of modulating. 59. The variable rate transmission method according to claim 58, wherein the transmission power of said pilot symbol and said important data is increased.