JP2851124B2 - Multiplex transmission method - Google Patents

Multiplex transmission method

Info

Publication number
JP2851124B2
JP2851124B2 JP2113751A JP11375190A JP2851124B2 JP 2851124 B2 JP2851124 B2 JP 2851124B2 JP 2113751 A JP2113751 A JP 2113751A JP 11375190 A JP11375190 A JP 11375190A JP 2851124 B2 JP2851124 B2 JP 2851124B2
Authority
JP
Japan
Prior art keywords
multiplex
transmission
transmission line
voltage
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP2113751A
Other languages
Japanese (ja)
Other versions
JPH0410828A (en
Inventor
敦彦 鈴木
圭 井上
恭介 橋本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Furukawa Electric Co Ltd
Original Assignee
Furukawa Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Furukawa Electric Co Ltd filed Critical Furukawa Electric Co Ltd
Priority to JP2113751A priority Critical patent/JP2851124B2/en
Priority to KR1019910006771A priority patent/KR910019368A/en
Priority to CA002041309A priority patent/CA2041309A1/en
Priority to EP91303879A priority patent/EP0454505B1/en
Priority to DE69131082T priority patent/DE69131082T2/en
Publication of JPH0410828A publication Critical patent/JPH0410828A/en
Priority to US08/024,815 priority patent/US5321689A/en
Application granted granted Critical
Publication of JP2851124B2 publication Critical patent/JP2851124B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks
    • H04L12/40169Flexible bus arrangements
    • H04L12/40176Flexible bus arrangements involving redundancy
    • H04L12/40182Flexible bus arrangements involving redundancy by using a plurality of communication lines
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks
    • H04L12/40006Architecture of a communication node
    • H04L12/40013Details regarding a bus controller
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks
    • H04L12/407Bus networks with decentralised control
    • H04L12/413Bus networks with decentralised control with random access, e.g. carrier-sense multiple-access with collision detection [CSMA-CD]
    • H04L12/4135Bus networks with decentralised control with random access, e.g. carrier-sense multiple-access with collision detection [CSMA-CD] using bit-wise arbitration
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/14Channel dividing arrangements, i.e. in which a single bit stream is divided between several baseband channels and reassembled at the receiver
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks
    • H04L2012/40208Bus networks characterized by the use of a particular bus standard
    • H04L2012/40215Controller Area Network CAN

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Power Engineering (AREA)
  • Small-Scale Networks (AREA)
  • Dc Digital Transmission (AREA)

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、共通の伝送線に接続された多重ノード間
で、データの伝送を行う多重伝送方式に関する。
Description: TECHNICAL FIELD The present invention relates to a multiplex transmission system for transmitting data between multiple nodes connected to a common transmission line.

(従来の技術) 従来、この種の多重伝送方式には、CSMA/CD(Carrier
Sence Multiple Acess/Collision Detection)と、AMP
(Arbitration on Message Priority)とを用いたLAN
(Local Area Network)の伝送方式がある。例えばその
代表的なものに自動車内のデータ伝送に用いられるCAN
(Controller Area Network)等がある。
(Prior art) Conventionally, this type of multiplex transmission system includes CSMA / CD (Carrier
Sence Multiple Acess / Collision Detection) and AMP
(Arbitration on Message Priority)
(Local Area Network) transmission system. For example, a typical example is CAN used for data transmission in automobiles.
(Controller Area Network).

第10図は、その従来例の構成ブロック図であり、2つ
の伝送線A,Bの両端に終端抵抗RE,REを接続すると共に、
上記伝送線A、Bに並列に多重ノード11〜13が接続され
ている。多重ノード11〜13は、それぞれ同一の構成なの
で、説明の都合上、多重ノード11について説明する。
FIG. 10 is a configuration block diagram of the conventional example, in which terminating resistors R E and R E are connected to both ends of two transmission lines A and B,
Multiplex nodes 11 to 13 are connected to the transmission lines A and B in parallel. Since the multiplex nodes 11 to 13 have the same configuration, the multiplex node 11 will be described for convenience of explanation.

多重ノード11は、通信制御装置21と、通信制御装置21
より送信信号を受け取り、伝送線A,Bに送信する送信回
路と、伝送線A、Bより信号を受信し、通信制御装置21
に送出する受信回路とからなっている。
The multiplex node 11 includes a communication control device 21 and a communication control device 21.
A transmission circuit for receiving a transmission signal from the transmission lines A and B;
And a receiving circuit for transmitting the signal to the receiver.

受信回路は、抵抗R3〜R9からなり、伝送線A,Bより受
信した信号を通信制御装置21のコンパレータ21aに出力
し、上記コンパレータ21aに適当なスレッシュホルド電
圧を与えることにより、伝送信号の振幅を許容できるま
で小さくして、受信回路のコモンモード入力電圧範囲を
広げ、ノイズによる影響を受けづらくしている。
Receiving circuit, a resistor R 3 to R 9, the transmission line A, and outputs a signal received from the B to the comparator 21a of the communication control device 21, by providing the appropriate Suresshuhorudo voltage to the comparator 21a, the transmission signal Of the receiving circuit is reduced to an acceptable level, thereby widening the common mode input voltage range of the receiving circuit, thereby making it less likely to be affected by noise.

送信回路は、電界効果トランジスタ(FET)22,23と、
ダイオードD1,D2と抵抗R1,R2からなる回路で構成されて
おり、FET22はダイオードD1と抵抗R1を介して伝送線A
に接続し、FET23はダイオードD2と抵抗R2を介して伝送
線Bに接続している。
The transmission circuit includes field effect transistors (FETs) 22 and 23,
The FET 22 is composed of a circuit comprising diodes D 1 and D 2 and resistors R 1 and R 2 , and the FET 22 is connected to the transmission line A via the diode D 1 and the resistor R 1.
Connected to, FET 23 is connected to the transmission line B via the diode D 2 and resistor R 2.

従って、多重ノード11がパッシブ時、すなわちCSMA/C
D+AMPの伝送方式において、劣性ビットを出力する時
は、FET22,23は共にオフで、伝送線Aと伝送線Bの間に
は、電位差が生ぜずハイインピータンス状態になる。ま
た、多重ノード11がドミナント時、すなわち優性ビット
を出力する時は、FET22,23は共にオンであり、伝送線A
に電流を供給し、伝送線Bからの電流を取り込む。この
ため、ドミナント時には伝送線A,Bの間には電位が生
じ、伝送線A、Bに接続されている受信回路は電位差を
検知し、コンパレータ21aを反転させ、ドミナントを検
知するものがあった。
Therefore, when the multi-node 11 is passive, that is, CSMA / C
In the D + AMP transmission method, when the recessive bit is output, the FETs 22 and 23 are both off, and the transmission line A and the transmission line B are in a high impedance state without any potential difference. When the multiplex node 11 is dominant, that is, when it outputs a dominant bit, both the FETs 22 and 23 are on and the transmission line A
And the current from the transmission line B is taken in. For this reason, at the time of dominant, a potential is generated between the transmission lines A and B, and a receiving circuit connected to the transmission lines A and B detects a potential difference, inverts the comparator 21a, and detects a dominant. .

(発明が解決しようとする課題) ところが、上記伝送方式では、例えば伝送線の一方が
断線又は短絡する等の故障が発生した場合、各伝送線間
の電位が変化してしまい、伝送線の全ての多重ノード間
のデータ伝送ができなくなるという問題点があった。
(Problems to be Solved by the Invention) However, in the above-described transmission system, when a failure such as disconnection or short-circuit of one of the transmission lines occurs, the potential between the transmission lines changes, and all of the transmission lines are changed. There is a problem that data transmission between multiple nodes becomes impossible.

本発明は、上記問題点に鑑みなされたものであって、
伝送線上の故障が生じても各多重ノード間でデータ伝送
を効率的に行うことができる多重伝送方式を提供するこ
とを目的とする。
The present invention has been made in view of the above problems,
It is an object of the present invention to provide a multiplex transmission system capable of efficiently performing data transmission between multiplex nodes even if a failure occurs on a transmission line.

(課題を解決するための手段) 上記目的を達成するために、本発明では、共通の信号
伝送線を介して相互に接続された少なくとも2つの多重
ノードを有し、当該各多重ノードはいずれかの多重ノー
ドの送信要求に応じて所定の送信データを送信する多重
伝送方式において、前記信号伝送線は少なくとも3つの
信号伝送線からなり、前記各多重ノードは該信号伝送線
のうち少なくとも1つの信号伝送線の電圧を検知し、該
電圧値に応じて各信号伝送線の状態を特定し、かつ、少
なくとも1つの多重ノードは前記各多重ノードと通信し
て故障を検知した際には、前記信号伝送線の電圧を変化
させて前記各信号伝送線の状態を変化させ、各多重ノー
ド間のデータ伝送を行う多重伝送方式が提供される。
(Means for Solving the Problems) In order to achieve the above object, the present invention has at least two multiplex nodes connected to each other via a common signal transmission line, and each of the multiplex nodes is any one of the multiplex nodes. In the multiplex transmission system for transmitting predetermined transmission data in response to a transmission request of the multiplex node, the signal transmission line includes at least three signal transmission lines, and each of the multiplex nodes includes at least one signal transmission line among the signal transmission lines. Detecting the voltage of the transmission line, specifying the state of each signal transmission line according to the voltage value, and communicating at least one multiplex node with each of the multiplex nodes to detect a failure, A multiplex transmission method is provided in which the state of each signal transmission line is changed by changing the voltage of the transmission line to perform data transmission between each multiplex node.

(作用) 多重ノードのうち、少なくとも1つの多重ノードは、
信号伝送線の故障を検知すると、信号伝送線の電圧を変
化させることによって各信号伝送線の状態をデータ伝送
可能な状態に変化させる。
(Operation) At least one of the multiple nodes is
When the failure of the signal transmission line is detected, the state of each signal transmission line is changed to a state in which data can be transmitted by changing the voltage of the signal transmission line.

従って、各多重ノードは、信号伝送線の断線や短絡に
よる故障が生じても、信号伝送線の間には所定の電位が
生じ、各多重ノード間のデータ伝送が可能になる。
Accordingly, even if a failure occurs due to disconnection or short circuit of the signal transmission line, a predetermined potential is generated between the signal transmission lines, and data transmission between the multiple nodes becomes possible.

(実施例) 以下、本発明の実施例を第1図乃至第9図の図面に基
づき詳細に説明する。
(Example) Hereinafter, an example of the present invention will be described in detail with reference to the drawings of FIGS.

第1図は、本発明に係る多重伝送方式の構成を示す構
成ブロック図である。図において、各多重ノード30,40,
50,60は、それぞれ3本の伝送線A、B、Cに接続され
ており、各多重ノード間でのデータ信号の伝送を行って
いる。各多重ノードのうち、伝送線の終端部以外に接続
されている多重ノード30,40は、それぞれ同一の構成ブ
ロックになっているので、ここでは説明の都合上代表し
て多重ノード30の構成を説明する。
FIG. 1 is a block diagram showing a configuration of a multiplex transmission system according to the present invention. In the figure, each multiplex node 30, 40,
Reference numerals 50 and 60 are connected to three transmission lines A, B and C, respectively, and transmit data signals between the multiplex nodes. Of the multiplex nodes, the multiplex nodes 30 and 40 connected to other than the end of the transmission line have the same configuration blocks, respectively. explain.

多重ノード30は、通信処理制御を行う通信制御装置31
と、通信制御装置31から送信信号を受け取り、伝送線に
送出する送信制御回路32と、伝送線から取り込んだ受信
信号を通信制御装置31に与える受信制御回路33と、上記
信号伝送線のうちの1つ、例えば伝送線Cの電圧を検知
して伝送線Cの状態を上記通信制御装置31等に知らせる
電圧検知回路34とから構成されている。
The multiplex node 30 includes a communication control device 31 that performs communication processing control.
A transmission control circuit 32 that receives a transmission signal from the communication control device 31 and sends it out to the transmission line, a reception control circuit 33 that provides a reception signal fetched from the transmission line to the communication control device 31, For example, it comprises a voltage detection circuit 34 that detects the voltage of the transmission line C and notifies the communication control device 31 and the like of the state of the transmission line C.

また、伝送線の終端部に接続された多重ノード50,60
は、多重ノード30と同様の機能である通信制御装置51,6
1と、送信制御回路52,62と、受信制御回路53,63と、電
圧検知回路54,64とをそれぞれ有すると共に、伝送線A,
B,Cの両端に終端抵抗を接続した終端回路54,64が付加さ
れている。また、終端部に接続された多重ノード50,60
のうちの一方、例えば多重ノード50には、伝送線Cに電
圧を印加する電圧発生回路56も付加されている。
In addition, the multiplex nodes 50 and 60 connected to the end of the transmission line
Are communication control devices 51 and 6 having the same function as that of the multiplex node 30.
1, transmission control circuits 52 and 62, reception control circuits 53 and 63, and voltage detection circuits 54 and 64, respectively, and transmission lines A and
Terminating circuits 54 and 64 having terminating resistors connected to both ends of B and C are added. Also, the multiplex nodes 50 and 60 connected to the termination unit
For example, a voltage generating circuit 56 for applying a voltage to the transmission line C is added to one of the multiple nodes 50, for example.

上記各電圧検知回路は、第2図に示すような回路構成
になっており、電圧比較回路CM1,CM2の一方の端子に
は、伝送線Cの電圧V0が抵抗R10とコンデンサC10とから
なるフィルタ回路を介して印加し、他方の端子には、分
圧抵抗R11〜R13によって電源電圧VCCを分圧して得た基
準電圧V1,V2が印加しており、伝送線Cの電圧値が上記
基準電圧V1,V2の範囲内かどうか検知している。すなわ
ち電圧V0が基準電圧V1,V2の範囲内にある場合には、正
常状態として出力端子K1,K2には“0"、“0"がそれぞれ
出力され、電圧V0が基準電圧V1,V2の範囲を越えた場
合、例えば伝送線Aが断線した場合には、異常状態とし
て出力端子K1,K2には“1"、“0"がそれぞれ出力され、
また電圧V0が基準電圧V1,V2の範囲を越えた場合、例え
ば伝送線B、Cが短絡した場合にも、異常状態として出
力端子K1,K2には“0"、“1"がそれぞれ出力される。
Each voltage detection circuit is adapted to circuit configuration as shown in FIG. 2, the one terminal of the voltage comparator circuit CM 1, CM 2, the voltage V 0 which transmission line C is resistor R 10 and capacitor C 10 and a reference voltage V 1 , V 2 obtained by dividing the power supply voltage V CC by the voltage dividing resistors R 11 to R 13 is applied to the other terminal. It is detected whether the voltage value of the transmission line C is within the range of the reference voltages V 1 and V 2 . That is, when the voltage V 0 is within the range of the reference voltage V 1, V 2 is the output terminal K 1, K 2 as a normal state "0", "0" is output, respectively, the voltage V 0 reference When the voltage exceeds the range of the voltages V 1 and V 2 , for example, when the transmission line A is broken, “1” and “0” are output to the output terminals K 1 and K 2 as abnormal states, respectively.
Also, when the voltage V 0 exceeds the range of the reference voltages V 1 and V 2 , for example, when the transmission lines B and C are short-circuited, “0” and “1” are output to the output terminals K 1 and K 2 as an abnormal state. Is output.

送信制御回路は、第3図に示すように、第8図の従来
例と同様、FET35,36と、ダイオードD1,D2と抵抗R14,R15
からなるフィルタ回路とから構成されており、FET35は
ダイオードD10と抵抗R14からなるフィルタ回路を介して
伝送線Aに接続し、FET36はダイオードD11と抵抗R15
らなるフィルタ回路を介して伝送線Bに接続して送信信
号を送信している。
As shown in FIG. 3, the transmission control circuit includes FETs 35 and 36, diodes D 1 and D 2 and resistors R 14 and R 15 as in the conventional example of FIG.
It is composed of a filter circuit composed of, FET 35 is connected to the transmission line A through a filter circuit comprising a diode D 10 and the resistor R 14, via a filter circuit FET36 is a diode D 11 and a resistor R 15 The transmission signal is transmitted by connecting to the transmission line B.

受信制御回路では、第4図に示すように、伝送線A,B,
Cには、抵抗R16,R17,R18を介して電源電圧1/2VCCが印加
している。伝送線A,B,Cの一端と、電圧比較回路CM3の入
力端子とは、図に示すスイッチ端子S1〜S4とによって接
続している。上記スイッチ素子S1〜S4は、通信制御装置
によってオン/オフ制御されており、通信制御装置は電
圧検知回路のK1,K2から入力する信号に応じてスイッチ
素子S1〜S4を以下に示す第1表の組合せで、オン/オフ
制御している。なお、抵抗R16〜R23は、分圧及びスレッ
シュホルド電圧設定用の抵抗である。
In the reception control circuit, as shown in FIG. 4, the transmission lines A, B,
A power supply voltage of 1/2 V CC is applied to C via resistors R 16 , R 17 , and R 18 . Transmission lines A, B, and one end and C, the input terminal of the voltage comparator circuit CM 3 are connected by the switch terminals S 1 to S 4 shown in FIG. The switch elements S 1 to S 4 are on / off controlled by a communication control device, and the communication control device switches the switch elements S 1 to S 4 according to signals input from K 1 and K 2 of the voltage detection circuit. On / off control is performed by the combinations shown in Table 1 below. The resistance R 16 to R 23 is the resistance of the voltage divider and Suresshuhorudo voltage setting.

また、受信制御回路は、K1,K2が“0"、“0"の正常状
態では、伝送線Aを正論理、伝送線Bを負論理により平
衡伝送するもの、すなわち伝送線Aは電圧が高い場合に
ドミナント、伝送線Bは電圧が低い場合にドミナントと
して受信するものとする。また、K1,K2が“1"、“0"の
異常状態では、伝送線Cを固定電位線、伝送線Bを負論
理の不平衡伝送として受信し、K1,K2が“0"、“1"の異
常状態では、伝送線Cを固定電位線、伝送線Aを正論理
の不平衡伝送として受信する。伝送状態では、どの状態
においても伝送線Cには、伝送波形の高周波成分をほと
んど含んでおらず、伝送線Cが外側をとりまく伝送線
A、Bを中心とした線を利用することができるため、従
来の2芯シールド線と同等で伝送線のコストが上がらな
い。
The reception control circuit performs balanced transmission of the transmission line A by positive logic and transmission line B by negative logic when K 1 and K 2 are in the normal state of “0” and “0”. Is high, and the transmission line B is received as a dominant when the voltage is low. In the abnormal state where K 1 and K 2 are “1” and “0”, the transmission line C is received as a fixed potential line, the transmission line B is received as unbalanced transmission of negative logic, and K 1 and K 2 are set to “0”. In the abnormal state of "1", the transmission line C is received as a fixed potential line, and the transmission line A is received as unbalanced transmission of positive logic. In the transmission state, the transmission line C contains almost no high-frequency component of the transmission waveform in any state, and the transmission line C can use a line centered on the transmission lines A and B surrounding the outside. In addition, the cost of the transmission line is not increased because it is equivalent to the conventional two-core shielded line.

終端回路55は、第5図に示すように、伝送線A,Bの両
端に接続された抵抗REを伝送線CでRE/2に分割し、伝送
線Cを抵抗R24を介してスイッチ素子S5,S6に接続して構
成されている。なお、抵抗R24は、終端抵抗に比べ十分
小さい。スイッチ素子S5は、K1が“1"のとき、またスイ
ッチ素子S6は、K2が“1"のとき、それぞれオンするよう
に構成されている。また、終端回路55は、伝送線Cの電
圧発生回路56の代わりにもなっており、例えば多重ノー
ド50において、強制的にK1,K2を“1"、“0"の状態にし
たいときには、通信制御装置51の制御によってスイッチ
素子S5をオンにし、また強制的にK1,K2を“0"、“1"の
状態にしたいときには、通信制御装置51の制御によって
スイッチ素子S6をオンにする。
Termination circuit 55, as shown in FIG. 5, through a transmission line A, to divide the both ends connected resistors R E and B to R E / 2 in the transmission line C, the resistance R 24 of the transmission line C It is configured to be connected to the switch elements S 5 and S 6 . The resistor R 24 is sufficiently smaller than the terminating resistor. Switching element S 5, when the K 1 is "1", also switching element S 6, when the K 2 is "1", and is configured to turn on, respectively. The terminating circuit 55 is also used in place of the voltage generating circuit 56 of the transmission line C. For example, when it is desired to force K 1 and K 2 to “1” and “0” at the multiplex node 50, , when to turn on the switching element S 5 under the control of the communication control device 51, also forces the K 1, K 2 "0", like in a state of "1", the switch element S 6 under the control of the communication control device 51 Turn on.

なお、本実施例では、終端回路55と、電圧発生回路56
が多重ノード50内で共通になっているため、伝送状態を
制御する多重ノード50が強制的にK1,K2を“0"、“1"の
状態からK1,K2を“0"、“0"の状態に変化させる場合、
電圧発生回路56のみを制御しても、例えば多重ノード60
のように、伝送状態を制御せず、かつ、終端回路を有し
ている多重ノードについては、K1,K2が“0"、“1"の状
態を保持してしまうので、伝送線より信号を送出して多
重ノード60の電圧検知回路64の出力状態にかかわらず伝
送状態を強制的にK1,K2が“0"、“0"の状態にできるも
のとする。
In this embodiment, the termination circuit 55 and the voltage generation circuit 56
Since There are common in the multi-node 50, a multi-node 50 which controls the transmission status is forcibly K 1, K 2 "0", "1" to K 1, K 2 from the state of "0" , To change to the “0” state,
Even if only the voltage generating circuit 56 is controlled, for example,
For a multiplex node that does not control the transmission state and has a termination circuit, K 1 and K 2 maintain “0” and “1” as shown in FIG. It is assumed that K 1 and K 2 can be forcibly changed to “0” and “0” in the transmission state regardless of the output state of the voltage detection circuit 64 of the multiplex node 60 by transmitting a signal.

次に、多重ノード50による信号線の故障処理の動作を
第6図のフローチャートに基づき説明する。なお、多重
ノード50においては、受信制御回路53は第4図に示した
スイッチ素子S1〜S4のうち、S1,S4をオン、S2,S3をオフ
にセットし、電圧検知回路54のK1,K2からの出力は
“0"、“0"の正常状態にあるものとする。
Next, the operation of the signal line failure processing by the multiplex node 50 will be described with reference to the flowchart of FIG. Incidentally, in the multiplex node 50, among the switching elements S 1 to S 4 shown in Figure 4 is the reception control circuit 53 sets the S 1, S 4 on and off S 2, S 3, the voltage detection It is assumed that outputs from the circuits K 1 and K 2 of the circuit 54 are in a normal state of “0” and “0”.

まず、通信制御装置51は、各受信多重ノードが正常に
フレームを送信できるかどうかにより、送信信号のフレ
ームを受信したときに返送送信が可能かどうか判断する
(ステップ101)。
First, the communication control device 51 determines whether return transmission is possible when a frame of a transmission signal is received, based on whether each reception multiplex node can normally transmit a frame (step 101).

次に全ての多重ノードと通信可能かどうか、上記同様
全ての多重ノードからのACK信号の受信を確認して判断
し(ステップ102)、通信が可能の場合には、K1,K2
“0"、“0"の正常状態を維持して(ステップ103)、再
びステップ101の判断を行う。
Next, it is determined whether communication with all multiplex nodes is possible by confirming reception of ACK signals from all multiplex nodes (step 102). If communication is possible, K 1 and K 2 are set to “ 1 ”. The normal state of “0” and “0” is maintained (step 103), and the determination of step 101 is performed again.

また、ステップ101で送信が不可能な場合、或いはス
テップ102で全ての多重ノードとの通信が不可能な場合
には、受信制御回路53の第4図に示したスイッチ素子S1
〜S4のうち、S1,S3をオン、S2,S4をオフにセットし、次
に強制的に終端回路55のスイッチ素子S5をオンにして、
K1,K2を“1"、“0"の状態へ変える(ステップ104)。こ
のとき伝送線Cの電圧はV1以上となり、接続されている
ノードは全てK1=1、K2=0となる。そして、受信多重
ノードとの送信が可能かどうか、ステップ101と同様に
判断する(ステップ105)。
If transmission is not possible in step 101, or if communication with all multiplex nodes is impossible in step 102, the switch element S 1 of the reception control circuit 53 shown in FIG.
Of to S 4, the S 1, S 3 ON, and sets off the S 2, S 4, then forced to turn on the switching element S 5 of the termination circuit 55,
The K 1, K 2 "1" , changing to the state of "0" (step 104). Voltage of the transmission line C at this time becomes V 1 or more, connected nodes are all K 1 = 1, K 2 = 0. Then, it is determined whether or not transmission with the reception multiplex node is possible in the same manner as in step 101 (step 105).

ここで、受信多重ノードとの送信が可能の場合には、
次に全ての多重ノードと通信可能かどうか、ステップ10
2と同様に判断し(ステップ106)、通信が可能の場合に
は、K1,K2が“1"、“0"の状態を維持して(ステップ10
7)、再びステップ105の判断を行う。
Here, if transmission with the receiving multiplex node is possible,
Next, whether communication with all multiplex nodes is possible, step 10
Judgment is made in the same manner as in step 2 (step 106). If communication is possible, K 1 and K 2 are maintained at “1” and “0” (step 10).
7), the determination of step 105 is performed again.

また、ステップ105で送信が不可能な場合、或いはス
テップ106で全ての多重ノードとの通信が不可能な場合
には、受信制御回路53の第4図に示したスイッチ素子S1
〜S4のうち、S1,S3をオフ、S2,S4をオンにセットし、次
に強制的に終端回路55のスイッチ素子S5をオフ、S6をオ
ンに制御して、K1,K2を“0"、“1"の状態へ変える(ス
テップ108)。このとき伝送線Cの電圧はV2以下とな
り、接続されているノードは全てK1=0、K2=1とな
る。そして、受信多重ノードとの送信が可能かどうか、
ステップ101と同様に判断する(ステップ109)。
If transmission is not possible in step 105, or if communication with all multiplex nodes is impossible in step 106, the switch element S 1 of the reception control circuit 53 shown in FIG.
Of S 4 , S 1 and S 3 are turned off, S 2 and S 4 are set to on, then the switch element S 5 of the termination circuit 55 is forcibly turned off and S 6 is controlled to be on, K 1 and K 2 are changed to “0” and “1” (step 108). Voltage of the transmission line C at this time becomes V 2 less, connected nodes are all K 1 = 0, K 2 = 1. And whether transmission with the receiving multiplex node is possible,
A determination is made in the same manner as in step 101 (step 109).

ここで、受信多重ノードとの送信が可能の場合には、
次に全ての多重ノードと通信可能かどうか、ステップ10
2と同様に判断し(ステップ110)、通信が可能の場合に
は、K1,K2が“0"、“1"の状態を維持して(ステップ11
1)、再びステップ109の判断を行う。
Here, if transmission with the receiving multiplex node is possible,
Next, whether communication with all multiplex nodes is possible, step 10
2 is determined (step 110), and if communication is possible, K 1 and K 2 are maintained at “0” and “1” (step 11).
1), the determination of step 109 is performed again.

また、ステップ109で送信が不可能な場合、或いはス
テップ110で全ての多重ノードとの通信が不可能な場合
には、伝送線の故障以外であると判断して、強制的に終
端回路55のスイッチ素子S5,S6を共にオフに制御して、K
1,K2を“0"、“0"の状態に戻して(ステップ112)、そ
の他の故障処理のルーチンに動作を移す(ステップ11
3)。
If transmission is not possible in step 109, or if communication with all multiplex nodes is impossible in step 110, it is determined that the transmission line is not faulty, and the termination circuit 55 is forcibly stopped. By turning off both the switch elements S 5 and S 6 , K
1, the K 2 "0", "0 " is returned to the state (step 112), moves the operation to a routine other failure process (step 11
3).

これにより、多重ノード50は、K1,K2が“0"、“0"の
正常状態の場合、第7図(a)に示すように、ドミナン
ト時には伝送線A、Bの間には電位が生じ、伝送線A、
Bに接続されている受信制御回路53は電位差を検知し、
通信制御装置51はドミナントを検知することができる。
また、伝送線の1本が一定電圧に固定された場合、伝送
線の1本が断線した場合、任意の伝送線の2本が短絡し
た場合には、まず受信制御回路53の第4図に示したスイ
ッチ素子S1〜S4のうち、S1,S3をオン、S2,S4をオフにセ
ットし、次に強制的に終端回路55のスイッチ素子S5をオ
ンにして、K1,K2を“1"、“0"の状態へ変え、この状態
で送信可能な時には、第7図(b)に示すように、ドミ
ナント時には伝送線C、Bの間には電位が生じ、伝送線
C、Bに接続されている受信制御回路53は電位差を検知
し、通信制御装置51はドミナントを検知することができ
る。なお、この場合、伝送線Aの電位は任意でよい。ま
た、上記K1,K2が“1"、“0"の状態の場合、送信が不可
能な時には、受信制御回路53の第4図に示したスイッチ
素子S1〜S4のうち、S1,S3をオフ、S2,S4をオンにセット
し、次に強制的に終端回路55のスイッチ素子S5をオフ、
S6をオンに制御して、K1,K2を“0"、“1"の状態へ変
え、この状態で送信可能な時には、第7図(c)に示す
ように、ドミナント時には伝送線A、Cの間には電位が
生じ、伝送線A,Cに接続されている受信制御回路53は電
位差を検知し、通信制御装置51はドミナントを検知する
ことができる。なお、この場合、伝送線Bの電位は任意
でよい。
As a result, when K 1 and K 2 are in the normal state of “0” and “0”, the multiplex node 50 sets the potential between the transmission lines A and B during the dominant state as shown in FIG. And transmission line A,
The reception control circuit 53 connected to B detects the potential difference,
The communication control device 51 can detect a dominant.
When one of the transmission lines is fixed at a constant voltage, one of the transmission lines is broken, and two of the arbitrary transmission lines are short-circuited, first, the reception control circuit 53 shown in FIG. Of the switch elements S 1 to S 4 shown, S 1 and S 3 are turned on, S 2 and S 4 are set to off, and then the switch element S 5 of the termination circuit 55 is forcibly turned on, and K 1, changing to the state of the K 2 "1", "0 ", at the time that can be sent in this state, as shown in FIG. 7 (b), the transmission line C, and the potential between the B occur in dominant when The reception control circuit 53 connected to the transmission lines C and B can detect a potential difference, and the communication control device 51 can detect a dominant. In this case, the potential of the transmission line A may be arbitrary. In the case where K 1 and K 2 are “1” and “0”, and transmission is impossible, among the switch elements S 1 to S 4 of the reception control circuit 53 shown in FIG. 1, S 3 off, is set to turn on S 2, S 4, then forced off the switching element S 5 of the termination circuit 55,
S 6 is turned on to change K 1 and K 2 to the state of “0” and “1”. When transmission is possible in this state, as shown in FIG. A potential is generated between A and C, the reception control circuit 53 connected to the transmission lines A and C detects a potential difference, and the communication control device 51 can detect a dominant. In this case, the potential of the transmission line B may be arbitrary.

なお、第8図は、本発明に係る受信制御回路の他の実
施例であり、この例では電圧比較回路をCM4〜CM6の3個
とし、各電圧比較回路からの出力信号(電位差)をセレ
クト回路SEに取り込み、ここでK1,K2からの出力に応じ
て上記取り込んだ出力信号を選択、すなわちK1=K2=0
の時には、セレクト回路SEはCM4からの出力信号を選択
し、K1=1の時には、CM5からの出力信号を選択し、K2
=1の時には、CM6からの出力信号を選択して通信制御
装置に出力するように構成することも可能である。この
場合には、複数のスイッチ素子が不要となり、部品点数
を削減することができる。
FIG. 8 shows another embodiment of the reception control circuit according to the present invention. In this embodiment, three voltage comparison circuits CM 4 to CM 6 are used, and output signals (potential differences) from the respective voltage comparison circuits are provided. In the select circuit SE, and selects the fetched output signal according to the outputs from K 1 and K 2 , that is, K 1 = K 2 = 0
, The select circuit SE selects the output signal from CM 4, and when K 1 = 1, selects the output signal from CM 5 and K 2
When = 1, an output signal from the CM 6 can be selected and output to the communication control device. In this case, a plurality of switch elements are not required, and the number of components can be reduced.

また、第9図は、本発明に係る多重ノードの他の実施
例であり、この例では通信制御装置70が各伝送線の通信
可能な状態をK1=K2=0、K1=1、K2=1の中から検知
できるようにしたもので、K1,K2の各状態を受信制御回
路72に出力して、受信制御回路71内の電圧比較回路から
の出力信号(電位差)を選択して、送信制御回路72から
の送信が可能な最適な伝送状態を検出することが可能と
なる。この場合には、電圧検知回路が不要となり、部品
点数を削減することができると共に、上記電圧検知回路
を備えたノードと、備えていないノードとを共存させる
ことが可能となる。
FIG. 9 shows another embodiment of the multiplex node according to the present invention. In this embodiment, the communication control device 70 sets the communicable state of each transmission line to K 1 = K 2 = 0 and K 1 = 1. , K 2 = 1, and outputs the respective states of K 1 and K 2 to the reception control circuit 72 and outputs an output signal (potential difference) from the voltage comparison circuit in the reception control circuit 71. Is selected, it is possible to detect an optimal transmission state in which transmission from the transmission control circuit 72 is possible. In this case, the voltage detection circuit becomes unnecessary, the number of components can be reduced, and a node having the voltage detection circuit and a node not having the voltage detection circuit can coexist.

従って、本実施例では、各多重ノードは、伝送線に故
障が生じても伝送線の間には所定の電位が生じ、各多重
ノード間のデータ伝送が可能になり、本発明を用いるシ
ステム全体の多重伝送の信頼性を高めることができる。
Therefore, in this embodiment, even if a failure occurs in the transmission line, each multiplex node generates a predetermined potential between the transmission lines, enabling data transmission between the multiplex nodes. Multiplex transmission reliability can be improved.

(発明の効果) 以上説明したように、本発明では、共通の信号伝送線
を介して相互に接続された少なくとも2つの多重ノード
を有し、当該各多重ノードはいずれかの多重ノードの送
信要求に応じて所定の送信データを送信する多重伝送方
式において、前記信号伝送線は少なくとも3つの信号伝
送線からなり、前記各多重ノードは該信号伝送線のうち
少なくとも1つの信号伝送線の電圧を検知し、該電圧値
に応じて各信号伝送線の状態を特定し、かつ、少なくと
も1つの多重ノードは前記各多重ノードと通信して故障
を検知した際には、前記信号伝送線の電圧を変化させて
前記各信号伝送線の状態を変化させ、各多重ノード間の
データ伝送を行うので、伝送線上の故障が生じても各多
重ノード間でデータ伝送を効率的に行うことができる。
(Effect of the Invention) As described above, the present invention has at least two multiplex nodes mutually connected via a common signal transmission line, and each of the multiplex nodes has a transmission request from any one of the multiplex nodes. In the multiplex transmission method for transmitting predetermined transmission data according to the following, the signal transmission line includes at least three signal transmission lines, and each of the multiplex nodes detects a voltage of at least one of the signal transmission lines. When the state of each signal transmission line is specified according to the voltage value, and at least one multiplex node detects a failure by communicating with each of the multiplex nodes, it changes the voltage of the signal transmission line. Since the state of each signal transmission line is changed to perform data transmission between the multiple nodes, data transmission between the multiple nodes can be efficiently performed even if a failure occurs on the transmission line.

【図面の簡単な説明】[Brief description of the drawings]

第1図は、本発明に係る多重伝送方式の構成を示す構成
ブロック図、第2図は第1図に示した電圧検知回路の一
実施例を示す回路図、第3図は同じく送信制御回路の一
実施例を示す回路図、第4図は同じく受信制御回路の一
実施例を示す回路図、第5図は同じく終端回路の一実施
例を示す回路図、第6図は第1図に示した多重ノードに
よる信号線の故障処理の動作を説明するためのフローチ
ャート、第7図は各伝送状態での伝送線の電位を示す
図、第8図は受信制御回路の他の実施例を示す回路図、
第9図は多重ノードの他の実施例を示す構成ブロック
図、第10図は従来の多重伝送方式の構成を示す構成ブロ
ック図である。 30,40,50,60……多重ノード、31,51,61,70……通信制御
回路、32,52,62,72……送信制御回路、33,53,63,71……
受信制御回路、34,54,64……電圧検知回路、55,65……
終端回路、56……電圧発生回路、A,B,C……伝送線。
FIG. 1 is a block diagram showing a configuration of a multiplex transmission system according to the present invention, FIG. 2 is a circuit diagram showing one embodiment of a voltage detection circuit shown in FIG. 1, and FIG. FIG. 4 is a circuit diagram showing an embodiment of a reception control circuit, FIG. 5 is a circuit diagram showing an embodiment of a termination circuit, and FIG. FIG. 7 is a flowchart for explaining the operation of signal line failure processing by the indicated multiplex node, FIG. 7 is a diagram showing the potential of the transmission line in each transmission state, and FIG. 8 shows another embodiment of the reception control circuit. circuit diagram,
FIG. 9 is a block diagram showing a configuration of another embodiment of a multiplex node, and FIG. 10 is a block diagram showing a configuration of a conventional multiplex transmission system. 30, 40, 50, 60 ... multiple nodes, 31, 51, 61, 70 ... communication control circuit, 32, 52, 62, 72 ... transmission control circuit, 33, 53, 63, 71 ...
Reception control circuit, 34, 54, 64… Voltage detection circuit, 55, 65…
Terminating circuit, 56: Voltage generating circuit, A, B, C ... Transmission line.

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】共通の信号伝送線を介して相互に接続され
た少なくとも2つの多重ノードを有し、当該各多重ノー
ドはいずれかの多重ノードの送信要求に応じて所定の送
信データを送信する多重伝送方式において、前記信号伝
送線は少なくとも3つの信号伝送線からなり、前記各多
重ノードは該信号伝送線のうち少なくとも1つの信号伝
送線の電圧を検知し、該電圧値に応じて各信号伝送線の
状態を特定し、かつ、少なくとも1つの多重ノードは前
記各多重ノードと通信して故障を検知した際には、前記
信号伝送線の電圧を変化させて前記各信号伝送線の状態
を変化させ、各多重ノード間のデータ伝送を行うことを
特徴とする多重伝送方式。
1. A communication system comprising at least two multiplex nodes interconnected via a common signal transmission line, wherein each of the multiplex nodes transmits predetermined transmission data in response to a transmission request from one of the multiplex nodes. In the multiplex transmission system, the signal transmission line includes at least three signal transmission lines, and each of the multiplex nodes detects a voltage of at least one of the signal transmission lines, and outputs each signal in accordance with the voltage value. When the state of the transmission line is specified, and at least one multiplex node communicates with each of the multiplex nodes and detects a failure, the voltage of the signal transmission line is changed to change the state of each signal transmission line. A multiplex transmission system characterized by performing data transmission between each multiplex node by changing the multiplex node.
【請求項2】前記各多重ノードは少なくとも3組の信号
伝送線の対のうち、所定の信号伝送線の対の電位を受信
する受信手段を有し、信号伝送線の故障により受信が不
可能な際には、前記所定の信号伝送線の対を他の組合せ
に切り換えることを特徴とする請求項1記載の多重伝送
方式。
2. Each of the multiplex nodes has receiving means for receiving a potential of a predetermined signal transmission line pair out of at least three signal transmission line pairs, and reception is impossible due to failure of the signal transmission line. 2. The multiplex transmission system according to claim 1, wherein said predetermined pair of signal transmission lines is switched to another combination.
JP2113751A 1990-04-27 1990-04-27 Multiplex transmission method Expired - Lifetime JP2851124B2 (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP2113751A JP2851124B2 (en) 1990-04-27 1990-04-27 Multiplex transmission method
KR1019910006771A KR910019368A (en) 1990-04-27 1991-04-26 Multi Transmission System
CA002041309A CA2041309A1 (en) 1990-04-27 1991-04-26 Multipath transmission system
EP91303879A EP0454505B1 (en) 1990-04-27 1991-04-29 Multipath transmission system
DE69131082T DE69131082T2 (en) 1990-04-27 1991-04-29 Reusable transmission system
US08/024,815 US5321689A (en) 1990-04-27 1993-03-01 Multipath transmission system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2113751A JP2851124B2 (en) 1990-04-27 1990-04-27 Multiplex transmission method

Publications (2)

Publication Number Publication Date
JPH0410828A JPH0410828A (en) 1992-01-16
JP2851124B2 true JP2851124B2 (en) 1999-01-27

Family

ID=14620203

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Application Number Title Priority Date Filing Date
JP2113751A Expired - Lifetime JP2851124B2 (en) 1990-04-27 1990-04-27 Multiplex transmission method

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Country Link
US (1) US5321689A (en)
EP (1) EP0454505B1 (en)
JP (1) JP2851124B2 (en)
KR (1) KR910019368A (en)
CA (1) CA2041309A1 (en)
DE (1) DE69131082T2 (en)

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WO1993011002A1 (en) * 1991-11-26 1993-06-10 Siemens Aktiengesellschaft Bus system
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US5321689A (en) 1994-06-14
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DE69131082T2 (en) 2000-01-05
EP0454505A3 (en) 1993-02-03
JPH0410828A (en) 1992-01-16
EP0454505A2 (en) 1991-10-30
CA2041309A1 (en) 1991-10-28
KR910019368A (en) 1991-11-30

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