JP2850659B2 - Semiconductor laser drive circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a driving circuit for a semiconductor laser used for optical communication and the like.

[0002]

2. Description of the Related Art An example of a conventional semiconductor laser driving circuit of this type is shown in FIG. Conventionally, as shown in FIG. 2, this type of semiconductor laser drive circuit has a field effect transistor in which a source terminal 6 is connected to ground and a drain terminal 7 is connected to a positive power supply (V _DD ) via a resistor 8. (F
ET) 4, a level shift circuit, and an FET 16 for driving the semiconductor laser 24. Since the anode terminal 26 of the semiconductor laser 24 is connected to the ground, the source terminal 18 of the FET 16 is connected to the negative power supply via the resistor 31. The level shift circuit uses a Zener diode 29, and the gate bias of the next stage FET 16 is set by the Zener voltage of the Zener diode 29. The source bias of the FET 16 is set to V _SS so as to set the optimum V _GS in correlation with the Zener diode 29, and is grounded in an AC manner by the capacitor 28. The zener current of the zener diode 29 is set by the resistor 30.

[0003] Reference numeral 1 denotes an IC for negative power supply operation, and 2 denotes a bipolar transistor. The collector of the bipolar transistor 2 is connected to the gate terminal 5 of the FET 4 and to the ground via a load resistor 3. Also, F
The drain terminal 21 of the ET 16 is connected to the resistor 2 connected in parallel.
2 and a capacitor 23 are connected to a cathode terminal 25 of a semiconductor laser 24.

[0004]

In this conventional semiconductor laser driving circuit, a Zener diode is used in the level shift circuit, so that the gate bias of the subsequent FET is determined by the Zener voltage. Also, the source bias of the latter-stage FET is forcibly set by another power supply ( _VSS ). Generally, the FET has a variation in pinch-off voltage due to the structure of the element. Therefore, in order to set the optimum bias, it is necessary to individually adjust the voltage of the Zener diode between the stages to obtain the optimum bias. For this reason, there is a problem that it is necessary to select an individual Zener diode according to the variation of the pinch-off voltage of the FET, and that much time is required for bias adjustment. The present invention has been made in order to solve such a problem, and an object of the present invention is to provide a semiconductor laser drive circuit which reduces labor costs required for adjusting a bias of an FET for driving a semiconductor laser and realizes cost reduction. Aim.

[0005]

A semiconductor laser driving circuit according to the present invention comprises a grounded source input buffer circuit of a field effect transistor, an output circuit for driving a semiconductor laser, and a connection between the input buffer circuit and the output circuit. In the semiconductor laser driving circuit constituted by a level shifting circuit, the level shifting circuit comprises a grounded base circuit of a PNP transistor, and the output circuit has a self-bias circuit of a field effect transistor.

[0006]

According to the present invention, an F driving the semiconductor laser is used.
The ET forms a self-biasing circuit, eliminating the time required for bias adjustment.

[0007]

FIG. 1 is a circuit diagram showing one embodiment of a semiconductor laser drive circuit according to the present invention. In FIG. 1, FIG.
Reference numerals 9 and 9 denote corresponding parts. Reference numeral 9 denotes a PNP transistor. The grounded base circuit of the PNP transistor 9 forms a level shift circuit. The emitter terminal 10 is connected to the drain terminal 7 of the FET 4 and the collector terminal 1
1 is connected to the gate terminal 17 of the FET 16, and the base terminal 12 is connected to the connection point of the resistors 14 and 15 connected in series between the positive power supply (V _DD ) and the ground, and to the ground via the capacitor 13. Have been. FET1
6 has a source terminal 18 connected to V _EE via a resistor 19 and a resistor 20 in series, and a gate terminal 17 of the FET 16 connected to a connection point between the resistor 19 and the resistor 20 via a resistor 27. Thus, an FET self-bias circuit is formed.

Next, the operation of the embodiment shown in FIG. 1 will be described. The signal output from the bipolar transistor 2 in the IC 1 operating in the negative power supply with an open collector is grounded via the load resistor 3 and is also introduced into the gate terminal 5 of the FET 4. Here, the source terminal 6 of the FET 4
Is connected to ground, and the drain terminal 7 is connected to a positive power supply (V _DD ) via a resistor 8. And
The signal output from the drain terminal 7 of the FET 4 is P
The voltage is applied to the emitter terminal 10 of the NP transistor 9, level-shifted, and output from the collector terminal 11. At this time, the base terminal 12 of the PNP transistor 9 is connected to the ground via the capacitor 13 and is grounded in an AC manner. Further, the bias of the base terminal 12 of the PNP transistor 9 is set by the voltage division of the resistors 14 and 15. The signal output from the collector terminal 11 of the PNP transistor 9 is introduced to the gate terminal 17 of the FET 16.

Here, the source terminal 18 of the FET 16
Is connected to a negative power supply via a resistor 19 and a resistor 20 in series. A drain terminal 21 of the FET 16 is connected to a resistor 22 and a capacitor 2 connected in parallel for jitter suppression.
3 is connected to the cathode terminal 25 of the semiconductor laser 24. The anode terminal 26 of the semiconductor laser 24
Is connected to the ground. Further, since the degree of freedom of the bias of the subsequent-stage FET is increased, the gate terminal 17 of the FET 16 is connected between the resistor 19 and the resistor 20 via the resistor 27, and the FET 16 is a level shift circuit using the PNP transistor 9. Irrespective of this, a self-biasing circuit is formed. The source terminal 18 of the FET 16 is AC grounded by a capacitor 28. Here, the resistor 19 has a resistance value of about 10Ω, and the resistor 27 has a resistance value of about 1KΩ.

[0010]

As described above, according to the present invention, since the FET for driving the semiconductor laser forms a self-bias circuit, the labor for bias adjustment can be eliminated and the cost can be reduced. This has the effect that it can be realized.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing one embodiment of a semiconductor laser drive circuit according to the present invention.

FIG. 2 is a circuit diagram showing an example of a conventional semiconductor laser drive circuit.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 IC 2 bipolar transistor 4 FET (field effect transistor) 9 PNP transistor 16 FET 19, 20 resistor 24 semiconductor laser 27 resistor

Claims (1)

(57) [Claims] 1. A semiconductor laser drive circuit comprising a grounded source input buffer circuit of a field effect transistor, an output circuit for driving a semiconductor laser, and a level shift circuit connecting the input buffer circuit and the output circuit. 3. The semiconductor laser drive circuit according to claim 1, wherein the level shift circuit comprises a grounded base circuit of a PNP transistor, and the output circuit has a self-bias circuit of a field effect transistor.