JP2847467B2 - Image coding method and apparatus having scalability - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a scalable (hierarchical) moving picture coding method and apparatus. More specifically, an object of the present invention is to provide a method and apparatus having a simple configuration for encoding hierarchical image data.

[0002]

2. Description of the Related Art A multi-layer data-compressed moving image signal which is hierarchized in a descending order of priority suitable for high-speed reproduction or the like has come to be used. For example, in high-speed reproduction, if the search speed is increased, even if the high-frequency component data representing the details of the screen is lacking, it is sufficient if the rough skeleton of the entire screen can be grasped, so that the low-frequency component data may be searched. Therefore, low-band component data is transmitted or stored in the priority channel, high-band component data is transmitted or stored in the non-priority channel, and the priority channel is used in the high-speed search. In reproduction, both data of the priority and non-priority channels are used. Alternatively, when transmitting a multi-layer data-compressed moving image signal through a noisy transmission line, a high-precision channel with a high error correction capability for transmitting a rough skeleton and a high-definition portion for transmitting A system (referred to as graceful degradation) capable of transmitting only a rough skeleton using data of only the priority channel even when noise increases using a non-priority channel is provided. These can be formed not only in two layers but also in multiple layers according to the purpose.

FIG. 2 shows an encoding apparatus having a two-layer structure. The upper half of the figure shows a priority channel for encoding data representing a rough skeleton of an image, and the lower half shows a non-priority channel for encoding data representing a fine portion of the image.

In FIG. 1, 1 is an input terminal of a moving image signal, 2 is a subtractor of a priority channel, 3 is a converter of a priority channel which is an orthogonal transformer such as a discrete cosine converter, and 4 is a quantum of a priority channel. coder (Q _L), 5 the inverse quantizer preferred channel (Q _L ^-1), inverse transformer priority channel 6 to the reverse operation to that of the converter 3, 7 of the preferred channel adder, 8 is a frame memory (M) of the priority channel, and 10 is an output terminal of the priority channel.

Similarly, 22 is a non-priority channel subtractor,
Reference numeral 23 denotes a non-priority channel converter (T) which is an orthogonal transformer such as a discrete cosine converter , 31 denotes a non-priority channel subtractor, and 24 denotes a non-priority channel quantizer (Q
_H ), 25 are the inverse quantizers (Q _H ^-1 ) of the non-priority channels
32 is a non-priority channel adder, 26 is a non-priority channel inverse transformer (T ^-1 ), 27 is a non-priority channel adder,
28 is a frame memory (M) for a non-priority channel.

First, the priority channel will be described. Image signal of the current frame applied to the input terminal 1 is subtracted a prediction signal E _L is an image signal of the previous frame stored in the frame memory 8 in one frame before treatment, the difference is as a prediction error signal It is sent to the converter 3. Therefore, for example, the signal subjected to the discrete cosine transform is quantized by the quantizer 4 and output from the output terminal 10 as encoded data of the priority channel. The signal quantized by the quantizer 4 is inversely quantized by the inverse quantizer 5 and inversely cosine-transformed by the inverse transformer 6 by inverse processing of the transformer 3, for example, and includes a quantization error. The output signal of the frame memory 8 is added to the output signal of the frame memory 8 as a prediction error signal in the adder 7 to obtain a locally decoded signal, which is stored in the frame memory 8.
Initially, the operation of the frame memory 8 is initialized by storing an image signal obtained by intra-frame encoding.

The image signal of the previous frame output from the frame memory 8 is the previous frame in the processing order for the image signal of the current frame applied to the input terminal 1, and is the display order when displaying an image. Does not always match the frame before the current frame in. This is because the order of images input to the input terminal 1 does not always match the order of display in order to perform prediction between the previous and next frames.

Next, the non-priority channel will be described.
The image signal of the current frame applied to the input terminal 1 is subtracted from the image signal of the previous frame stored in the frame memory 28 in the processing of the previous frame, and the difference is converted to the converter 23.
Sent to Therefore, for example, the signal subjected to the discrete cosine transform is subtracted by the subtractor 31 from the output signal of the inverse quantizer 5 of the priority channel, and the difference is quantized by the quantizer 24 to obtain encoded data of the non-priority channel. It is output from the output terminal 40. The signal quantized by the quantizer 24 is inversely quantized by the inverse quantizer 25, the inversely quantized output of the priority channel is added to the inversely quantized output by the adder 32, and converted by the inverse transformer 26. By the inverse processing of the adder 23, for example, an inverse discrete cosine transform is performed and added as a prediction error signal including a quantization error to the output signal of the frame memory 28 in the adder 27, and a high-definition local signal representing the details of the screen is displayed. The decoded signal is obtained and stored in the frame memory 28.

Here, the quantizer 24 and the inverse quantizer 25 process fine components from which the rough components have been removed in the subtractor 31 as compared with the quantizer 4 and the inverse quantizer 5, so that the fine components are not processed. The configuration is suitable for the processing of. When the signal at the output terminal 10 for the priority channel is decoded, the image becomes inferior in definition. However, when the signal is decoded using the output of the output terminal 40 for the non-priority channel, a high-definition image is obtained. Hierarchical structure that can be decrypted (scalability)
Having.

The operation of the non-priority channel will be further examined. The input signal of the input terminal 1 is represented by x, the output signal of the inverse quantizer 5 of the priority channel is represented by t _L , and the output signal which is the prediction error signal of the inverse transformer 6 is represented by Δx. signals t _H output signal of the inverse quantizer 25 q, an output signal of the inverse transformer 26 [Delta] y, the output signal of the adder 27 y _1, the output signal of the frame memory 28 y
_Set to ₀ .

The function of the converter 23 is to temporarily convert the input signal into z
, The output signal undergoes a conversion represented by T (z). The function of the inverse transformer 26 is to perform an inverse transform represented by T ^-1 (z) if the input signal is represented by z. Assuming that z is an input signal and this conversion and inverse conversion are performed, T ｛T ^-1 (z)｝ = z is obtained.

Then, the input signal t _L of the inverter 6 is expressed as t _L = T (Δx). Since the output signal of the subtractor 22 is x−y ₀ , the output signal t _H of the converter 23 is t _H = T (xy ₀ ), and the output signal t _H −t _L of the subtractor 31 is t _H −t _L = T (xy ₀ ) −T (Δx)

This is passed through a quantizer 24 and an inverse quantizer 25 to obtain an output q of the inverse quantizer 25, which is expressed as q = q ｛T (xy ₀ ) -T (Δx)｝. And the output signal of the adder 32 is represented by q ｛T (xy ₀ ) −T (Δx)｝ + T (Δx).

The output signal Δy obtained by inversely converting the signal by the inverse converter 26 becomes Δy = T ⁻¹ [q ｛T (xy ₀ ) −T (Δx)｝ + T (Δx)], where T ⁻¹ [ T (Δx)] = Δx, the output signal Δy is as follows: Δy = T ⁻¹ [q ｛T (xy ₀ ) −T (Δx)｝] + Δx.

Therefore, the output signal y of the adder 27
₁ becomes y ₁ = T ⁻¹ [q {T (xy ₀ ) −T (Δx)}] + Δx + y ₀ .

[0016]

The number of adders and subtractors in a non-priority channel is large. These adders and subtractors perform addition or subtraction for many pixels, and the internal configuration thereof is complicated, and the large number of such adders and subtractors complicates the configuration of the encoding device. There was a problem that had to be solved.

[0017]

Without using the output t _L of the inverse quantizer 5 preferred channel SUMMARY OF THE INVENTION, using the prediction error signal Δx is the output of the inverse transformer 6, which frame memory (M) (Y ₀ ) and the new adder, so that the subtractor 31 and the adder 32 are omitted.

[0018]

The circuit configuration is simplified because the total number of adders and subtracters is reduced.

[0019]

FIG. 1 shows an embodiment of the present invention.
Components corresponding to the components shown in FIG. 2 are denoted by the same reference numerals, and different points will be described.

The priority channel is the same as in FIG. 2 shown in the conventional example, and differs in the non-priority channel. That is, the subtractor 31 and the adder 32 of FIG. 2 are omitted, and the output signal y ₀ of the frame memory (M) 28 is converted into the inverse converter 6.
Adder 3 that adds output signal Δx which is a prediction error signal of
Three have been added.

To explain this operation, the output signal e _H of the adder 33 is e _H = Δx + y ₀ and is used as a prediction signal. Thus, the output signal x−Δx of the subtractor 22
Get the -y _0. The output signal of the subtractor 22 is output from a converter 23.
And outputs an output signal t _H ′. This output signal t _H ′ is expressed as t _H ′ = T (x−Δx−y ₀ ). When the output signal t _H ′ is inversely transformed by the inverse transformer 26 via the quantizer 24 and the inverse quantizer 25, the output signal Δy includes Δy = T ⁻¹ [q ｛T (x−Δx −y ₀ )｝].

[0022] In the adder 27, since the output signal [Delta] x + y ₀ of the output signal [Delta] y 'and the adder 33 of the inverter 26 are added, the local decoded signal y which is the output signal
₁ becomes y ₁ = T ⁻¹ [q {T (x−Δx−y ₀ )}] + Δx + y ₀ . In the image encoding device, the operation of the converter 23 is as follows. If the input signal is (ab), the output signal is T (ab), which is a linear orthogonal transform. , And the difference between the orthogonal transforms T (a) and T (b) of the signals a and b, that is, T (ab) = T (a) −T (b).

Then, the local decoded signal y ₁ output from the adder 27 becomes y ₁ = T ⁻¹ [q ［T (xy ₀ ) −T (Δx)｝] + Δx + y ₀ , and the adder shown in FIG. the same to the output signal y ₁ of 27. That is, it can be seen that the circuit configuration of FIG. 1 performs exactly the same function as the circuit configuration of FIG.

In the above description, the case of two layers of the priority channel and the non-priority channel has been described. However, the number of layers can be further increased, and the output signal of the inverter of the higher priority layer is obtained. The sum of the prediction error signal Δx and the output signal y ₀ of the lower-priority frame memory is
It may be configured to obtain a local decoded signal y ₁ is an addition signal by adding the output signal [Delta] y 'of the inverter in the hierarchy.

[0025]

As described above, the required total number of adders and subtractors can be reduced, so that the configuration of a hierarchical coding apparatus can be simplified. Therefore, the effect of the present invention is extremely large.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention.

FIG. 2 is a circuit configuration diagram showing a conventional example.

[Explanation of symbols]

1 input terminal 2 subtracter 3 converter (T) 4 quantizer (Q _L) 5 inverse quantizer (Q _L ^-1) 6 inverter (T ^-1) 7 adder 8 the frame memory 10 the output terminal Reference Signs List 22 subtractor 23 transformer (T) 24 quantizer (Q _H ) 25 inverse quantizer (Q _H ^-1 ) 26 inverse transformer (T ^-1 ) 27 adder 28 frame memory 31 subtractor 32, 33 Adder 40 output terminal

Continuation of the front page (56) References JP-A-7-22961 (JP, A) WO 93/20650 (WO, A) (58) Fields investigated (Int. Cl. ⁶ , DB name) H04N 7/24 -7/68

Claims (2)

(57) [Claims] 1. An input image signal (x) and a prediction signal (e _L ,
e _H ) and perform a linear orthogonal transformation (3, 2).
3), quantization (4.24), and inverse quantization (5.2)
5) Perform linear inverse orthogonal transformation (6, 26) to obtain a prediction error signal and accumulate the sum with the image signal of the previous frame (8, 26).
28) By obtaining the prediction signal (e _L , e _H ), a signal obtained in the quantization is converted into a coded signal by expressing a component representing a rough skeleton of an image in a higher priority layer as compared with a lower priority layer. In a scalable image coding method having a plurality of layers that are output as the following, the prediction error signal (Δx) obtained in the low-priority layer and the high-priority layer is used as the image signal (y ₀ ) of the previous frame. (33) added to the prediction signal (e _H )
An image coding method having scalability, which is used as a method. 2. An input image signal (x) and a prediction signal (e _L ,
e _H ) and perform a linear orthogonal transformation (3, 2).
3), quantization (4.24), and inverse quantization (5.2)
5) Perform linear inverse orthogonal transformation (6, 26) to obtain a prediction error signal and accumulate the sum with the image signal of the previous frame (8, 26).
28) By obtaining the prediction signal (e _L , e _H ), a signal obtained in the quantization is converted into a coded signal by expressing a component representing a rough skeleton of an image in a higher priority layer as compared with a lower priority layer. In a scalable image coding apparatus having a plurality of layers which are output as the following, the prediction error signal (Δx) obtained in the low-priority layer in the high-priority layer is the image signal (y ₀ ) of the previous frame. A scalable image coding apparatus including a prediction signal means (33) for obtaining the prediction signal (e _H ) in addition to the above.