JP2834317B2 - Semiconductor device replacement method - Google Patents
Semiconductor device replacement methodInfo
- Publication number
- JP2834317B2 JP2834317B2 JP32140590A JP32140590A JP2834317B2 JP 2834317 B2 JP2834317 B2 JP 2834317B2 JP 32140590 A JP32140590 A JP 32140590A JP 32140590 A JP32140590 A JP 32140590A JP 2834317 B2 JP2834317 B2 JP 2834317B2
- Authority
- JP
- Japan
- Prior art keywords
- chip
- substrate
- conductive adhesive
- defective
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は基板に接続した半導体装置の不良品の交換方
法に関し、詳しくはICチップを基板に導電性接着剤にて
実装する半導体装置における不良ICチップの交換方法に
関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for replacing a defective semiconductor device connected to a substrate, and more particularly, to a method for replacing a defective semiconductor device in which an IC chip is mounted on a substrate with a conductive adhesive. It relates to a method for replacing an IC chip.
従来、導電性接着剤を用いた半導体装置の接続方法
は、この導電性接着剤を温度100℃〜150℃の加熱で硬化
させるか、或いは紫外線を照射することにより硬化が可
能で、液晶パネルのガラス基板上に突起電極を有するIC
チップを基板の導電パターンに実装することが実用化さ
れている。Conventionally, a method for connecting a semiconductor device using a conductive adhesive is such that the conductive adhesive is cured by heating at a temperature of 100 ° C. to 150 ° C., or can be cured by irradiating ultraviolet rays. IC with protruding electrodes on glass substrate
Mounting a chip on a conductive pattern on a substrate has been put to practical use.
この実装方法は、液晶パネルのガラス基板の導電パタ
ーンとしては透明導電膜である酸化・インジウム・スズ
(ITO)で良く、このITO上に特別の金属膜形成を必要と
せず、液晶パネルコストの上昇をもたらさないで可能で
ある。In this mounting method, the conductive pattern of the glass substrate of the liquid crystal panel may be a transparent conductive film of indium tin oxide (ITO), and no special metal film needs to be formed on the ITO, which increases the cost of the liquid crystal panel It is possible without bringing.
しかし、この実装方法の課題は接続工程での不良、或
いは不良ICチップを実装した場合、この不良ICチップの
交換が難しいことである。不良のICチップを基板から無
理に剥すとICチップ、或いは基板を損傷し再生が不可能
となり、結果として歩留まりの低下をきたしている。However, the problem with this mounting method is that, when a defective IC chip is mounted in a connection process or a defective IC chip is mounted, it is difficult to replace the defective IC chip. If a defective IC chip is forcibly peeled off from the substrate, the IC chip or the substrate is damaged and cannot be reproduced, resulting in a decrease in yield.
本発明の目的とするところは、ICチップを導電性接着
剤を用いて基板に実装後、不良ICチップを交換すると
き、基板及びICチップに損傷を与えず剥離する方法を提
供することである。SUMMARY OF THE INVENTION An object of the present invention is to provide a method of peeling an IC chip after mounting the IC chip on the substrate using a conductive adhesive without damaging the substrate and the IC chip when replacing a defective IC chip. .
上記目的を達成するため、本発明における熱硬化型あ
るいは、光硬化型の導電性接着剤を用いて、ICチップを
基板に実装するICチップの交換方法は、この導電性接着
剤が半硬化状態で特性測定を行い、不良のICチップを取
り外し、その後ICチップを基板に実装する。In order to achieve the above object, the method of exchanging an IC chip for mounting an IC chip on a substrate by using a thermosetting or light-curing conductive adhesive according to the present invention includes the steps of: The characteristic is measured by, the defective IC chip is removed, and then the IC chip is mounted on the substrate.
次に本発明の実施例を図面にて説明する。第1図は本
発明に用いるICチップを実装した状態を示す平面図、第
2図は要部断面図、第3図は接続部の拡大断面図であ
る。Next, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a plan view showing a state where an IC chip used in the present invention is mounted, FIG. 2 is a sectional view of a main part, and FIG. 3 is an enlarged sectional view of a connecting portion.
液晶パネルのガラスからなる基板1は、一部を延長し
この延長部に液晶駆動用のICチップ2を搭載する。ICチ
ップ2には突起電極3を設ける。ICチップ2の突起電極
3を、導電性接着剤4によって基板1の導電パターン5
へ実装する。A substrate 1 made of glass of a liquid crystal panel is partially extended, and an IC chip 2 for driving a liquid crystal is mounted on the extended portion. The IC chip 2 is provided with a protruding electrode 3. The protruding electrodes 3 of the IC chip 2 are connected to the conductive pattern 5
To implement.
本実施例では液晶パネルの基板1に3個のICチップ2
を接続している。このうち一箇所でも接続工程で不良と
なったり、特性測定後不良ICチップを発見したときは、
液晶パネルブロック全体が不良となるため不良ICチップ
の交換が必要となる。In this embodiment, three IC chips 2 are mounted on the substrate 1 of the liquid crystal panel.
Are connected. If even one of them becomes defective in the connection process or if you find a defective IC chip after measuring the characteristics,
Since the entire liquid crystal panel block becomes defective, it is necessary to replace a defective IC chip.
熱硬化型、或いは、光硬化型の導電性接着剤は、第4
図に示す如く時間とともに硬化反応が進む。第4図のグ
ラフは横軸に硬化時間、縦軸に接着強度を表わす。第4
図に示したものは一例として熱硬化型エポキシ系の導電
性接着剤である。この例では導電性接着剤を硬化させる
ための焼成炉の炉中温度110℃での経過時間と接着強度
との関係を示している。炉投入後5分程の接着強度が10
(kg/cm2)では導電性接着剤は充分硬化していない。ま
た、硬化時間と接続抵抗の関係を示す第5図のグラフに
示すように、炉投入後5分ほどで導電性接着剤の接続抵
抗は、1Ω以下となる。本発明は上記の第4図と第5図
に示す点に着目してなされたものである。すなわち、導
電性接着剤の接続抵抗が低くICチップの特性測定が可能
な時点で、かつ接着強度が低い導電性接着剤が半硬化状
態で測定検査する。その後不良ICチップは、導電性接着
剤が半硬化状態で接着強度が低いため容易に取り外すこ
とができる。基板に導電性接着剤が残っている場合、基
板の表面が凹凸になるので導電性接着剤を有機溶剤にて
取り除く。このときの基板上に残っている導電性接着剤
は半硬化であるため容易に除去することができる。その
後、新しいICチップを再度導電性接着剤で実装する。こ
の際、導電性接着剤の半硬化状態の条件を管理すれば量
産時にも安定したICチップ2の交換が可能となる。尚、
本実施例では液晶パネルを構成するガラスの基板を用い
て説明したが他の基板を用いた場合でも本発明の方法は
有効である。さらにICチップを導電性接着剤を用いてダ
イボンディングするときにも、本発明の方法は適用でき
る。The thermosetting or photo-curing conductive adhesive is the fourth type.
As shown in the figure, the curing reaction proceeds with time. In the graph of FIG. 4, the horizontal axis represents the curing time, and the vertical axis represents the adhesive strength. 4th
What is shown in the figure is, for example, a thermosetting epoxy-based conductive adhesive. This example shows the relationship between the elapsed time at a furnace temperature of 110 ° C. in a firing furnace for curing the conductive adhesive and the adhesive strength. Adhesive strength of about 10 minutes after furnace loading
(Kg / cm 2 ), the conductive adhesive was not sufficiently cured. Further, as shown in the graph of FIG. 5 showing the relationship between the curing time and the connection resistance, the connection resistance of the conductive adhesive becomes 1Ω or less in about 5 minutes after the furnace is put into the furnace. The present invention has been made by paying attention to the points shown in FIGS. 4 and 5. That is, at the time when the connection resistance of the conductive adhesive is low and the characteristics of the IC chip can be measured, the conductive adhesive having a low adhesive strength is measured and inspected in a semi-cured state. Thereafter, the defective IC chip can be easily removed because the conductive adhesive has a semi-cured state and a low adhesive strength. If the conductive adhesive remains on the substrate, the surface of the substrate becomes uneven, so the conductive adhesive is removed with an organic solvent. The conductive adhesive remaining on the substrate at this time can be easily removed because it is semi-cured. After that, the new IC chip is mounted again with the conductive adhesive. At this time, if the condition of the semi-cured state of the conductive adhesive is managed, the IC chip 2 can be stably replaced even during mass production. still,
Although the present embodiment has been described using a glass substrate constituting a liquid crystal panel, the method of the present invention is effective even when another substrate is used. Further, the method of the present invention can be applied to die bonding of an IC chip using a conductive adhesive.
以上の説明で明らかなように、導電性接着剤が半硬化
状態で不良ICチップを剥離する本発明の交換方法に於い
ては、基板及びICチップに損傷を与えないでICチップの
交換が可能となる。したがって装置の歩留まりが向上
し、低コスト化が可能となる。As is clear from the above description, in the replacement method of the present invention, in which the defective IC chip is peeled off when the conductive adhesive is in a semi-cured state, the IC chip can be replaced without damaging the substrate and the IC chip. Becomes Therefore, the yield of the device is improved, and the cost can be reduced.
第1図は本発明の半導体装置の交換方法に於ける実施例
を示す平面図、第2図は本発明の半導体装置の交換方法
を示す要部断面図、第3図は本発明の半導体装置の交換
方法を示す接続部の拡大断面図、第4図は導電性接着剤
の硬化時間と接着強度の関係を示すグラフ、第5図は導
電性接着剤の硬化時間と接続抵抗の関係を示すグラフで
ある。 1……基板、 2……ICチップ、 3……突起電極、 4……導電性接着剤、 5……導電パターン。FIG. 1 is a plan view showing an embodiment of a method for replacing a semiconductor device according to the present invention, FIG. 2 is a cross-sectional view of a main part showing a method for replacing a semiconductor device according to the present invention, and FIG. FIG. 4 is a graph showing the relationship between the curing time of the conductive adhesive and the adhesive strength, and FIG. 5 is a graph showing the relationship between the curing time of the conductive adhesive and the connection resistance. It is a graph. 1 ... substrate, 2 ... IC chip, 3 ... protruding electrode, 4 ... conductive adhesive, 5 ... conductive pattern.
Claims (1)
電性接着剤を形成する工程と、 温度110℃で時間およそ5分から7分の加熱処理をおこ
ない上記導電性接着剤を接着強度が低く上記ICチップと
基板との接続抵抗が低い半硬化状態とする工程と、 上記ICチップの特性測定をおこない、不良のICチップを
取り外す工程と、 ICチップを上記基板に実装する工程とを有する ことを特徴とする半導体装置の交換方法。1. A step of forming a thermosetting conductive adhesive between an IC chip and a substrate; and performing a heat treatment at a temperature of 110 ° C. for about 5 to 7 minutes to bond the conductive adhesive to the adhesive strength. Lowering the connection resistance between the IC chip and the substrate to a semi-cured state, measuring the characteristics of the IC chip, removing the defective IC chip, and mounting the IC chip on the substrate. A method for replacing a semiconductor device, comprising:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP32140590A JP2834317B2 (en) | 1990-11-26 | 1990-11-26 | Semiconductor device replacement method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP32140590A JP2834317B2 (en) | 1990-11-26 | 1990-11-26 | Semiconductor device replacement method |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH04196143A JPH04196143A (en) | 1992-07-15 |
JP2834317B2 true JP2834317B2 (en) | 1998-12-09 |
Family
ID=18132185
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP32140590A Expired - Lifetime JP2834317B2 (en) | 1990-11-26 | 1990-11-26 | Semiconductor device replacement method |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2834317B2 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH10200241A (en) * | 1997-01-06 | 1998-07-31 | Fujitsu Ltd | Conductive adhesive and method of mounting components, using the same |
-
1990
- 1990-11-26 JP JP32140590A patent/JP2834317B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH04196143A (en) | 1992-07-15 |
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