JP2832024B2 - Code transmission method - Google Patents
Code transmission methodInfo
- Publication number
- JP2832024B2 JP2832024B2 JP1067364A JP6736489A JP2832024B2 JP 2832024 B2 JP2832024 B2 JP 2832024B2 JP 1067364 A JP1067364 A JP 1067364A JP 6736489 A JP6736489 A JP 6736489A JP 2832024 B2 JP2832024 B2 JP 2832024B2
- Authority
- JP
- Japan
- Prior art keywords
- code
- matrix
- correction
- error detection
- information
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2903—Methods and arrangements specifically for encoding, e.g. parallel encoding of a plurality of constituent codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
- H03M13/2909—Product codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
- H03M13/2921—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes wherein error correction coding involves a diagonal direction
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/31—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining coding for error detection or correction and efficient use of the spectrum
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0057—Block codes
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Theoretical Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Error Detection And Correction (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
Description
【発明の詳細な説明】 [産業上の利用分野] 本発明は符号伝送方法に関し、特に積符号を構成する
誤り検出又は訂正用冗長符号を付加して符号伝送を行な
う符号伝送方法に関する。Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a code transmission method, and more particularly, to a code transmission method for performing code transmission by adding a redundant code for error detection or correction constituting a product code.
[従来の技術] 従来デジタル符号の伝送、特に磁気記録などにおいて
は、記録されるデジタル符号の低域成分を抑圧する必要
があった。そのための手法として例えば、8ビットの符
号を9ビットに変換(8/9変換)して低域成分を含まな
い符号のみを使用する手法がある。ところが、この方式
では符号の冗長度が高くなってしまい、伝送するデータ
の量が増加するという問題があった。[Prior Art] Conventionally, in the transmission of digital codes, particularly in magnetic recording and the like, it has been necessary to suppress low-frequency components of the recorded digital codes. For example, there is a method for converting an 8-bit code into 9 bits (8/9 conversion) and using only a code that does not include a low-frequency component. However, this method has a problem that the redundancy of the code is increased, and the amount of data to be transmitted is increased.
そこで、冗長度を上げない手法としては、例えばマッ
ピング符号化などがある。マッピング符号化は符号間に
相関性の高い符号列についてのみ適用できる手法で、こ
の相関を利用して符号系列の低周波成分を抑圧するもの
である。例えば、入力されて符号を差分符号化し、その
差分符号が0レベル付近に集中することを利用して0レ
ベル近傍の符号をDSV(Digital Sum Value)の小さい符
号に変換することによって、符号列の低周波成分を抑圧
することができる。例えば4ビットの差分符号を4ビッ
トの符号に変換する4/4マッピング符号化方式などが知
られている。Therefore, as a method of not increasing the redundancy, there is, for example, mapping coding. Mapping coding is a method that can be applied only to a code sequence having a high correlation between codes, and suppresses low-frequency components of a code sequence by using this correlation. For example, the input code is differentially encoded, and the code near the 0 level is converted into a code with a small DSV (Digital Sum Value) by utilizing the fact that the differential code is concentrated near the 0 level, so that Low frequency components can be suppressed. For example, a 4/4 mapping coding method for converting a 4-bit differential code into a 4-bit code is known.
ところがこのマッピング符号化は符号列の相関性を利
用するので、相関性のない符号については低周波成分の
抑圧効果は得られない。例えば、誤り検出又は訂正符号
については上述の如きマッピング符号化によって低周波
成分を抑圧することは困難である。そのため、情報符号
と誤り検出又は訂正符号とを含む符号系列全体としても
低周波抑圧効果は小さくなり、復号時の符号誤り率を増
加させることにもなる。However, since this mapping coding utilizes the correlation of a code sequence, the effect of suppressing low-frequency components cannot be obtained for codes having no correlation. For example, it is difficult to suppress low-frequency components of the error detection or correction code by the mapping coding as described above. Therefore, the low-frequency suppression effect is reduced even for the entire code sequence including the information code and the error detection or correction code, and the code error rate at the time of decoding is increased.
第3図はこの種の符号系列を形成するデータフレーム
の構成例を示す図であり、図中の情報データは前記マッ
ピング符号化された情報符号系列であり、同じく誤り検
出又は訂正符号は例えばハミング符号、リードソロモン
符号などの検査点、即ち、冗長符号を表わしている。FIG. 3 is a diagram showing a configuration example of a data frame forming this kind of code sequence. The information data in the figure is the information code sequence subjected to the mapping coding. Similarly, the error detection or correction code is, for example, Hamming. A check point such as a code and a Reed-Solomon code, that is, a redundant code is shown.
第4図は第3図に示す如きデータフレームにおいて内
符号を構成し、このようなデータフレームを複数縦に配
置し、縦方向に外符号を構成し、全体で積符号となるよ
うに構成したデータマトリクスを示す図である。このよ
うに構成した場合には検査符号が2次元的に配置される
ため、画像データなどを取扱う場合に適している。FIG. 4 shows an inner code in a data frame as shown in FIG. 3, a plurality of such data frames arranged vertically, an outer code formed vertically, and a product code as a whole. It is a figure showing a data matrix. In the case of such a configuration, the check codes are two-dimensionally arranged, which is suitable for handling image data and the like.
しかしながら、第4図の如きデータマトリクスにおい
て、各行(各データフレーム)を順次に伝送することを
考えると、内符号、外符号が連続して伝送される部分に
おいてデータの相関性がないため、マッピング符号化に
よる低周波成分の抑圧効果を期待することができない。
特に、外符号及び内符号の検査点のみにより構成されて
いるデータフレームにおいては検査点が長時間連続して
しまうことになり、この近傍において符号系列の低周波
成分の抑圧効果が著しく低下してしまうという問題があ
った。However, considering that each row (each data frame) is sequentially transmitted in a data matrix as shown in FIG. 4, since there is no data correlation in a portion where an inner code and an outer code are continuously transmitted, mapping is performed. The effect of suppressing low frequency components by encoding cannot be expected.
In particular, in a data frame composed of only the outer code and inner code check points, the check points are continuous for a long time, and in this vicinity, the suppression effect of the low-frequency component of the code sequence is significantly reduced. There was a problem that it would.
これに対して、本出願人は先に出願した特願昭60−16
9420号において、各データフレームの検査点を第5図に
示す如く各データフレームの情報符号中に分散配置する
ことにより、符号列の低周波成分を抑圧する手法につい
て開示した。On the other hand, the applicant of the present application has filed Japanese Patent Application No.
No. 9420 discloses a technique for suppressing the low-frequency components of a code string by distributing test points of each data frame in information codes of each data frame as shown in FIG.
また、同様に先に出願した特願昭60−291172号におい
ては積符号を構成する外符号についてはこのデータマト
リクスの各列において付加する行を切換える手法につい
て開示した。Similarly, Japanese Patent Application No. 60-291172 filed earlier discloses a method of switching a row to be added in each column of this data matrix for an outer code constituting a product code.
[発明が解決しようとしている問題点] ところが、検査点を各データフレームの情報符号中に
分散配置する上述の手法のみでは、第4図の如く積符号
を構成する外符号に対しては何等の対策も施すことがで
きず、外符号及び内符号の検査点のみにより構成されて
いるデータフレームにおいては符号系列の低周波成分の
抑圧効果が著しく低下してしまうという問題が残る。[Problems to be Solved by the Invention] However, only the above-described method of distributing the check points in the information code of each data frame has no effect on the outer code constituting the product code as shown in FIG. No countermeasure can be taken, and there remains a problem that the effect of suppressing the low-frequency component of the code sequence is significantly reduced in a data frame including only the check points of the outer code and the inner code.
また、積符号を構成する外符号をデータマトリクスの
各列において付加する行を切換える手法ではこの問題が
解決できるが、各列毎に外符号の生成法を変化させなけ
ればならず外符号の生成以外に、外符号の符号化開始点
を変化させるなどの処理が必要になる。特に、生成され
た外符号の検査点が多数存在する場合には行方向にこの
外符号検査点を連続させないパターンを選択する必要が
ありかなり複雑な処理が必要となる。In addition, this technique can be solved by switching the row to which the outer code forming the product code is added in each column of the data matrix. However, the method of generating the outer code must be changed for each column. In addition, processing such as changing the coding start point of the outer code is required. In particular, when there are a large number of generated outer code check points, it is necessary to select a pattern in which the outer code check points do not continue in the row direction, which requires considerably complicated processing.
本発明は、斯かる問題点に鑑みてなされ、積符号を構
成する誤り検出又は訂正用冗長符号を付加して情報符号
を伝送する場合において、複雑な処理を伴うことなく低
周波成分を効果的に抑圧することのできる符号伝送方法
を提供することを目的とする。The present invention has been made in view of such a problem, and when transmitting an information code by adding an error detection or correction redundant code constituting a product code, it is possible to effectively reduce low frequency components without complicated processing. It is an object of the present invention to provide a code transmission method capable of suppressing the above.
[問題点を解決するための手段] 斯かる目的下において、本発明によれば情報符号に誤
り検出又は訂正用冗長符号を付加して伝送する符号伝送
方法において、情報符号を2次元配列したマトリクス上
の斜め方向に情報符号を抽出して第1の誤り検出又は訂
正符号を形成し、該マトリクスの行方向に付加し、第1
の誤り検出又は訂正用冗長符号の付加されたマトリクス
の各行の符号を抽出して第2の誤り検出又は訂正符号を
形成し、該マトリクスの行方向に付加した後、第2の誤
り検出又は訂正用冗長符号の付加されたマトリクスの各
行の符号を順次伝送するものである。[Means for Solving the Problems] Under such a purpose, according to the present invention, in a code transmission method for adding an error detection or correction redundant code to an information code for transmission, a matrix in which information codes are two-dimensionally arranged The information code is extracted in the upper oblique direction to form a first error detection or correction code, and is added in the row direction of the matrix to form a first error detection or correction code.
After extracting the code of each row of the matrix to which the redundant code for error detection or correction has been added to form a second error detection or correction code and adding it in the row direction of the matrix, the second error detection or correction is performed. The code of each row of the matrix to which the redundant code is added is sequentially transmitted.
また本発明の好適なる実施態様としては、第1の誤り
検出又は訂正用冗長符号及び、第2の誤り検出又は訂正
用冗長符号を第2の誤り検出又は訂正用冗長符号の付加
されたマトリクスの各行の情報符号中に分散配置するも
のである。Further, as a preferred embodiment of the present invention, the first redundant code for error detection or correction and the second redundant code for error detection or correction are replaced with a second redundant code for error detection or correction. They are distributed and arranged in the information code of each row.
[作用] 上述の如き本発明の符号伝送方法によれば、情報符号
を2次元配列したマトリクス上の斜め方向に情報符号を
抽出して第1の誤り検出又は訂正用冗長符号を生成し、
且つ、第1の誤り検出又は訂正用冗長符号の付加された
マトリクスの各行の符号を抽出して第2の誤り検出又は
訂正用冗長符号を生成するので、積符号を構成する第1
の誤り検出又は訂正用冗長符号、第2の誤り検出又は訂
正用冗長符号の何れについても情報符号を2次元配列し
たマトリクスの行方向に付加することが可能となり、各
行が誤り検出又は訂正用冗長符号のみで構成されること
はなく、第2の誤り検出又は訂正用冗長符号の付加され
たマトリクスの各行の符号を順次伝送すれば低周波成分
を抑圧できる。[Operation] According to the code transmission method of the present invention as described above, an information code is extracted in a diagonal direction on a matrix in which information codes are two-dimensionally arranged to generate a first error detection or correction redundant code,
Further, since the code of each row of the matrix to which the first error detection or correction redundant code is added is extracted to generate the second error detection or correction redundant code, the first code constituting the product code is generated.
The information code can be added in the row direction of the matrix in which the two-dimensionally arranged error detection or correction redundant code and the second error detection or correction redundancy code are used, and each row has an error detection or correction redundancy code. The low frequency component can be suppressed by sequentially transmitting the code of each row of the matrix to which the second error detection or correction redundant code is added, instead of being composed of only the code.
また、上記方法によれば、本発明の好適なる実施態様
として示したように、第1の誤り検出又は訂正用冗長符
号及び、第2の誤り検出又は訂正用冗長符号を第2の誤
り検出又は訂正用冗長符号の付加されたマトリクスの各
行の情報符号中に分散配置することが容易に行なえるの
で、より低周波抑圧効果の高い伝送符号をも簡単な処理
にて得ることができるものである。Further, according to the above method, as shown in the preferred embodiment of the present invention, the first redundant code for error detection or correction and the second redundant code for error detection or correction are replaced with the second redundant code for error detection or correction. Since it is easy to disperse and arrange in the information code of each row of the matrix to which the correction redundant code is added, a transmission code with a higher low-frequency suppression effect can be obtained by simple processing. .
[実施例] 以下、本発明の一実施例について説明する。Example An example of the present invention will be described below.
第2図は本発明の一実施例としての符号伝送装置であ
るデジタル記録装置の概略構成を示すブロック図であ
る。図中1はマッピング符号化回路であり、前述したよ
うに入力されたデジタル情報の相関性を利用した低周波
成分抑圧を行なう変調回路である。また2はマッピング
符号化回路を介した情報符号を2次元配列に展開するた
めのメモリであり、3はこのメモリ2のアドレスを制御
するためのアドレス制御回路である。FIG. 2 is a block diagram showing a schematic configuration of a digital recording device which is a code transmission device as one embodiment of the present invention. In the figure, reference numeral 1 denotes a mapping encoding circuit, which is a modulation circuit that performs low-frequency component suppression using the correlation of digital information input as described above. Reference numeral 2 denotes a memory for expanding the information codes via the mapping encoding circuit into a two-dimensional array, and reference numeral 3 denotes an address control circuit for controlling the addresses of the memory 2.
このメモリ2にて2次元配列された情報符号に同期デ
ータを付加したデータマトリクスを第6図に示す。図中
の矢印は符号伝送順を示している。このデータマトリク
スに対して本実施例の装置においては、伝送路上で発生
する誤りを検出または訂正する誤り検出又は訂正符号を
内符号及び外符号による鎖状符号構成とする場合を考え
る。第2図中の4は該外符号符号化回路、5は該内符号
符号化回路、6は同期信号付加回路、7は記録部であ
る。FIG. 6 shows a data matrix in which synchronous data is added to the information codes arranged two-dimensionally in the memory 2. The arrows in the figure indicate the code transmission order. For this data matrix, in the device of the present embodiment, a case is considered in which an error detection or correction code for detecting or correcting an error occurring on the transmission path has a chain code configuration of an inner code and an outer code. In FIG. 2, 4 is the outer coding circuit, 5 is the inner coding circuit, 6 is a synchronization signal adding circuit, and 7 is a recording unit.
ここで、外符号符号化回路4の動作について説明す
る。本実施例の伝送装置においては、該符号を生成する
ため情報符号(データ)の抽出方向は伝送する方向、即
ち第6図のデータマトリクスのデータフレーム(行)の
方向に対して斜めの方向とし、第1図(A)の矢印に示
す如く情報符号を走査・抽出するものとする。尚、第6
図、第1図(A)において示される同期データは後段の
同期付加回路6にて付加されるものであるが、伝送方向
を明らかにするために示している。Here, the operation of the outer code encoding circuit 4 will be described. In the transmission apparatus of this embodiment, the information code (data) is extracted in a direction oblique to the transmission direction, that is, the direction of the data frame (row) of the data matrix in FIG. 6 in order to generate the code. It is assumed that the information code is scanned and extracted as shown by the arrow in FIG. The sixth
The synchronization data shown in FIG. 1 and FIG. 1 (A) is added by the synchronization addition circuit 6 at the subsequent stage, but is shown in order to clarify the transmission direction.
このように走査・抽出した情報符号により、一般的な
方法で外符号(第1の誤り検出又は訂正符号)を生成し
た場合には、第1図(B)に示す如く各データフレーム
(行)の最後にこのデータフレームの方向(行方向)に
付加されることになる。When an outer code (first error detection or correction code) is generated by a general method using the information code scanned and extracted as described above, each data frame (row) is generated as shown in FIG. Is added at the end of the data frame in the direction (row direction) of the data frame.
以下、これをガロア体GF(2)上の既約多項式(X4+
X+1)を生成多項式とし、(11,7)短縮化巡回ハミン
グ符号を用いて説明する。ここで(X15−1)の根のベ
クトルを(0010)とする。この場合における符号語の誤
り検出訂正用の検査行列H1は となる。これを(4×4)の単位行列I4とその他の部分
(4×7)の行列Pとに分割して考えると H1=P1I4 …(2) と表わすことができる。Hereinafter, this is represented by the irreducible polynomial (X 4 +) on the Galois field GF (2).
X + 1) will be described as a generator polynomial using a (11,7) shortened cyclic Hamming code. Here, the root vector of (X 15 -1) is (0010). In this case, the parity check matrix H 1 for error detection and correction of the code word is Becomes When this is divided into a (4 × 4) unit matrix I 4 and another part (4 × 7) matrix P, it can be expressed as H 1 = P 1 I 4 (2).
このとき、上記(11,7)短縮化巡回ハミング符号の生
成行列G1は、 G1H1 T=0 …(3) (H1の右肩のTは行列の転置を表わす記号である。)を
満足するもので、 となる。このG1行列により符号語の誤り検出・訂正用の
符号が付加され第1図(B)に示したようなデータフレ
ーム構成となる。尚、H1行列の部分行列I4は符号語の検
査点に対応し、G1行列の部分行列I7は符号語の情報点に
対応している。At this time, the generator matrix G 1 of the (11,7) shortened cyclic hamming code is G 1 H 1 T = 0 (3) (T at the right shoulder of H 1 is a symbol representing the transposition of the matrix. ) Becomes The G the data frame structure as shown in Figure 1 is added code for detection and error correction code words (B) by 1 matrix. Incidentally, the partial matrix I 4 of an H 1 matrix corresponds to the inspection point of the code word, the partial matrix I 7 in G 1 matrix corresponds to the information point of the code word.
単に、上述の如き生成行列G1にて外符号を生成するこ
とによって、外符号検査点は1つのデータフレーム内に
集中することなくマトリクス上の各データフレーム
(行)に均一に分配することができるが、本実施例では
更に、この外符号の検査点が各データフレーム内におい
ても分散配置する様にした。Simply by generating the outer code in such above generator matrix G 1, the outer code inspection point to be uniformly distributed to each data frame on the matrix instead of being concentrated in one data frame (line) Although it is possible, in the present embodiment, the check points of the outer code are further dispersedly arranged in each data frame.
即ち、本実施例では外符号検査点を、この外符号の生
成のために抽出した情報符号内に分散配置させる。これ
は従来の様に積符号を構成する外符号を生成するために
情報符号をデータマトリクス上において各列毎(縦)に
抽出するのではなく、斜めに取ることによって後述の如
き大なる効果を生起するものである。以下、このように
外符号検査点を抽出した情報符号内に分散配置させる具
体的な方法について説明する。That is, in this embodiment, the outer code check points are distributed and arranged in the information code extracted for generating the outer code. This is because, instead of extracting information codes for each column (vertically) on a data matrix in order to generate an outer code that constitutes a product code as in the prior art, the information codes are obliquely taken, thereby providing a great effect as described later. What happens. Hereinafter, a specific method of distributing the outer code check points in the extracted information code will be described.
まず、検査行列H1は符号語のMSB側が行列の最左端に
対応している。従って、第5図の様なフレーム構成に符
号を構成するために、第5図の検査点に対応する列の夫
々が単位行列の一部となる様に単位行列を検査行列H1中
に分散配置された新たな行列H1′を考える。この行列
H1′は行列H1に行列の基本行操作を施せば得られ、得ら
れた行列H1′は勿論G1の符号体系と同一の符号体系上に
ある。First, the check matrix H 1 corresponds to the leftmost of the code word on the MSB side is a matrix. Accordingly, the fifth to such frame structure diagram for configuring the code, dispersed in a test matrix H 1 part a unit matrix as comprised in each column is the identity matrix corresponding to the check points of FIG. 5 Consider the new matrix H 1 ′ that has been placed. This matrix
H 1 'are obtained if Hodokose basic row operations of the matrix to the matrix H 1, the resulting matrix H 1' of course is on the coding scheme the same coding scheme and the G 1.
前記(11,7)短縮化巡回ハミング符号を例にとった場
合、符号語の左から1,4,7,10ビット目に検査点を分散配
置することを考える。第1図(C)にこの場合の符号語
の構成を示す。In the case of the (11,7) shortened cyclic Hamming code as an example, consider distributing check points at 1, 4, 7, and 10 bits from the left of a codeword. FIG. 1C shows the structure of the code word in this case.
この時、行列H1′は という形になるまで前記行列H1′に基本行操作を加える
と を得る。尚、行列H1′の第1,4,7,10列を合わせると単位
行列I4になる。At this time, the matrix H 1 ′ The basic row operation is added to the matrix H 1 ′ until Get. The first , fourth, seventh and tenth columns of the matrix H 1 ′ are combined to form a unit matrix I 4 .
次に、行列H1から行列G1を得たと同様の方法で行列
H1′から行列G1′を作成する。式(2)における単位行
列I4は上記行列H1′の第1,4,7,10列を表わし、P1は第2,
3,5,6,8,9,11列からなる(4×7)行列である。Next, the matrix in the same manner as the matrix H 1 to obtain a matrix G 1
A matrix G 1 ′ is created from H 1 ′. The unit matrix I 4 in the equation (2) represents the first , fourth, seventh and tenth columns of the matrix H 1 ′, and P 1 represents the second,
It is a (4 × 7) matrix composed of 3, 5, 6, 8, 9, and 11 columns.
以上の様に分散配置された単位行列I4分散配置された
ままの状態でI7に変換し、分割された行列P1もまた、そ
のままの状態で転置してP1 Tを作りこれを合わせると、 を得る。ここで行列G1と同様に、行列G1′中の分割され
た部分行列I7(第2,3,5,6,8,9,11列)は符号語の情報点
に対応する。As described above, the unit matrix I 4 distributed as described above is converted to I 7 in the state of being dispersed and the divided matrix P 1 is also transposed as it is to form P 1 T and match this When, Get. Here as with matrix G 1, it divided partial matrix I 7 (No. 2,3,5,6,8,9,11 column) in the matrix G 1 'corresponds to the information point of the code word.
この行列G1′で符号語を生成すれば得られる符号語は
第1図(C)の構成となり、誤り検出・訂正用の検査点
が分散配置される。また、この符号語に対する検査行列
は行列H1′、行列H1のいずれを用いても誤り検出・訂正
を行なうことが可能で、行列G1により生成される符号語
も、行列G1′で生成される符号語も、同一の符号体系上
にある。If the code word is generated by this matrix G 1 ′, the obtained code word has the configuration shown in FIG. 1C, and the check points for error detection and correction are distributed. Further, the check matrix for the code word matrix H 1 ', using either a matrix H 1 can perform error detection and correction, the codeword generated by the matrix G 1 also, the matrix G 1' in The codewords generated are also on the same coding scheme.
この様にして生成された外符号検査点は、メモリ2上
の2次元配列においては第1図(D)に示す如く配置さ
れることになる。但し、各外符号は斜めに構成されてい
る。このように外符号を付加したデータマトリクスを横
方向(各行毎)に走査して次段へ送出することにより外
符号検査点が時間軸上で分散されることになる。The outer code check points thus generated are arranged in a two-dimensional array on the memory 2 as shown in FIG. 1 (D). However, each outer code is formed obliquely. By scanning the data matrix to which the outer code is added in the horizontal direction (for each row) and sending it to the next stage, the outer code check points are dispersed on the time axis.
さて次に内符号に対しても同様の操作を行なうのであ
るが、第1図(D)に示すデータマトリクスを横方向に
走査した外符号を含むデータ列を、内符号符号化回路の
入力データとして扱う。前記外符号の検査点の分散配置
に続いて、内符号の検査点を生成し分散配置することを
考える。Next, a similar operation is performed on the inner code. The data string including the outer code obtained by scanning the data matrix shown in FIG. 1D in the horizontal direction is converted into the input data of the inner code encoding circuit. Treat as Following the distributed arrangement of the outer code check points, consider the generation and the distributed arrangement of inner code check points.
外符号符号語を内符号の情報符号とするわけであるか
ら、内符号は(15,11)巡回ハミング符号を考えれば良
い。同じく、(X4+X+1)を生成多項式とした従来の
検査行列H2は となる。外符号と同様にしてこの行列H2に対する生成行
列G2は、 となる。ところが、この行列G2を用いた場合にはやはり
内符号検査点が符号語の後半に集中する。この点を更に
改善して、更に検査点に起因する低周波成分の発生を抑
圧するために、本実施例では、内符号検査点を先に生成
した外符号検査点とも連続せずに第1図(D)のマトリ
クスの各行の符号中に分散配置する。即ち、既に付加さ
れている外符号検査点の隣接する2つの中間にこの内符
号検査点が配置されるように第1図(E)の如き符号語
の構成を考える。図中P11〜P14は先に付加されている外
符号検査点を示し、P21〜P24は今回付加する内符号検査
点を示す。またD1〜D7は情報符号である。Since the outer codeword is used as the information code of the inner code, the inner code may be a (15,11) cyclic Hamming code. Similarly, a conventional parity check matrix H 2 in which (X 4 + X + 1) is a generator polynomial is Becomes Generator matrix G 2 for the matrix H 2 in the same manner as the outer code, Becomes However, also an inner code inspection point in the case of using the matrix G 2 is concentrated in the second half of the code word. In order to further improve this point and further suppress the occurrence of low-frequency components caused by the check points, in the present embodiment, the inner code check points are not continuous with the outer code check points generated earlier, and the first code check points are not consecutive. The code is distributed and arranged in the code of each row of the matrix in FIG. In other words, consider the configuration of the code word as shown in FIG. 1E such that the inner code check point is arranged between two adjacent adjacent outer code check points. Figure P 11 to P 14 represents the outer code check points added to the previously, P 21 to P 24 represents a code check points among the addition time. The D 1 to D 7 are information symbols.
第1図(E)に示すように検査点を分散配置させた符
号に対応する検査行列H2′は、 という形になるまで前記行列H2(式(7))に基本行操
作を行なったもので、 として表わされる。ここで、第3,7,11,15列が単位行列I
4を表わしている。外符号の場合と同様にこの行列H2′
より行列G2′を求めると、 を得る。ここで行列G1′と同様に行列G2′中の分割され
た部分行列I11(第2,4,6,8,10,12,14列)は符号語の情
報点に対応する。更に第1,5,9,13列は外符号検査点に対
応している。この行列G2′を用いて生成した符号語の2
次元配置を第1図(F)に示す。この図において横方向
(行方向)に走査して伝送路へ送出することにより、外
符号検査点及び内符号検査点が共に時間軸上で分散され
ることが分かる。As shown in FIG. 1 (E), a check matrix H 2 ′ corresponding to a code in which check points are dispersedly arranged is The basic row operation is performed on the matrix H 2 (Equation (7)) until the form becomes Is represented as Here, the third, seventh, eleventh, and fifteenth columns are unit matrices I
Represents 4 . As in the case of the outer code, this matrix H 2 ′
From the matrix G 2 ′, Get. Here division of 'Similarly matrix G 2 and the' in the matrix G 1 submatrix I 11 (first 2,4,6,8,10,12,14 column) corresponds to the information point of the code word. Further, the first, fifth, ninth, and thirteenth columns correspond to outer code check points. 2 of the code word generated using this matrix G 2 ′
The dimensional arrangement is shown in FIG. 1 (F). In this figure, it is understood that both the outer code check point and the inner code check point are dispersed on the time axis by scanning in the horizontal direction (row direction) and sending out to the transmission path.
上述の如く外符号検査点及び内符号検査点が時間軸上
で分散された符号列は記録部7に送出され記録媒体上に
記録される。これによって、再生時これを再生した場合
にも極めて符号誤りの生じ難くなる。The code string in which the outer code check points and the inner code check points are dispersed on the time axis as described above is sent to the recording unit 7 and recorded on the recording medium. This makes it very unlikely that a code error will occur during reproduction.
上述の如き実施例の符号伝送装置にあっては、伝送
(記録)される符号列の低周波成分は極めて少なくなっ
ており、伝送される符号列に誤りが生じる確率を極めて
小さくできる。また、処理的には従来に比べ誤り検出又
は訂正符号の生成処理過程も同様で、しかも何ら付加的
な処理を行なうこともない。In the code transmission apparatus according to the above-described embodiment, the low-frequency component of the transmitted (recorded) code sequence is extremely small, and the probability that an error occurs in the transmitted code sequence can be extremely reduced. In terms of processing, the process of generating an error detection or correction code is the same as that of the related art, and no additional processing is performed.
尚、上述の実施例においては、説明の簡単のため(1
1,7)短縮化巡回ハミング符号及び(15,11)巡回ハミン
グ符号を用いて説明した。そのため、最終的な符号列と
して検査点と情報符号とが単に1ビットずつ交互に伝送
される符号列となったが、勿論、情報符号を複数ビット
を単位としてワード単位で扱う多元符号を用いても同様
の操作を行なうことによって、検査点を分散配置するこ
とが可能である。In the above-described embodiment, for simplicity of explanation, (1
The description has been made using the shortened cyclic Hamming code and the (15,11) cyclic Hamming code. Therefore, the final code sequence is a code sequence in which the check points and the information code are simply transmitted alternately one bit at a time. Of course, using a multiple code that handles the information code in units of a plurality of bits in words. By performing the same operation, the inspection points can be distributed and arranged.
また、更に符号長の長い構成とし、複数ワードに対し
て検査点を1ワードずつ分散配置するように構成するこ
とにより、情報符号に施す低周波抑圧変調方式の効果を
ほとんど損なうことなく、誤り検出又は訂正符号を付加
することが可能である。In addition, by adopting a configuration in which the code length is longer and the check points are dispersedly arranged one word at a time for a plurality of words, error detection can be performed without substantially impairing the effect of the low frequency suppression modulation method applied to the information code. Alternatively, a correction code can be added.
[発明の効果] 以上説明したように、本発明の符号伝送方法によれ
ば、積符号を構成する誤り検出又は訂正用冗長符号を付
加して情報符号を伝送する場合において、複雑な処理を
伴うことなく低周波成分を効果的に抑圧することができ
る。[Effects of the Invention] As described above, according to the code transmission method of the present invention, when an information code is transmitted by adding an error detection or correction redundant code constituting a product code, complicated processing is involved. The low-frequency component can be effectively suppressed without the need.
第1図(A)〜(F)は本発明の一実施例としての符号
伝送装置における符号処理を説明するための図で、 第1図(A)は情報符号を2次元配列したマトリクス上
の外符号(第1の誤り検出又は訂正用冗長符号)生成時
の符号抽出の様子を示す図、 第1図(B)は通常の生成行列により外符号の付加され
たデータマトリクスを示す図、 第1図(C)は本実施例による外符号付加後の符号配列
を符号語について示す図、 第1図(D)は本実施例による外符号付加後のデータマ
トリクスを示す図、 第1図(E)は本実施例による内符号(第2の誤り検出
又は訂正用冗長符号)付加後の符号配列を符号語につい
て示す図、 第1図(F)は本実施例による内符号付加後のデータマ
トリクスを示す図ある。 第2図は本発明の一実施例としての符号伝送装置の概略
構成を示すブロック図、 第3図は一般的なデータフレームの構成を示す図、 第4図は積符号構成の誤り検出又は訂正用冗長符号を付
加した従来の一般的なデータマトリクスを示す図、 第5図は情報符号中に検査点を分散配置する様子を示す
図、 第6図は情報符号を2次元配列したマトリクス上の伝送
時の走査方向を示す図である。 図中、1はマッピング符号化回路、 2はメモリ、 3はアドレス制御回路、 4は外符号符号化回路、 5は内符号符号化回路、 6は同期付加回路、 7は記録部である。1 (A) to 1 (F) are diagrams for explaining a code process in a code transmission apparatus as one embodiment of the present invention, and FIG. 1 (A) is a diagram showing a matrix in which information codes are two-dimensionally arranged. FIG. 1B is a diagram showing a code extraction state when an outer code (first error detection or correction redundant code) is generated. FIG. 1B is a diagram showing a data matrix to which an outer code is added by a normal generation matrix; FIG. 1 (C) is a diagram showing a code array after adding an outer code according to the present embodiment for a codeword, FIG. 1 (D) is a diagram showing a data matrix after adding an outer code according to the present embodiment, FIG. FIG. 1E is a diagram showing a code array after the addition of an inner code (second error detection or correction redundant code) according to the present embodiment for a codeword. FIG. 1F is a diagram showing data after the addition of an inner code according to the present embodiment. FIG. 3 is a diagram showing a matrix. FIG. 2 is a block diagram showing a schematic configuration of a code transmission apparatus as one embodiment of the present invention, FIG. 3 is a diagram showing a general data frame configuration, and FIG. 4 is an error detection or correction of a product code configuration. FIG. 5 is a diagram showing a conventional general data matrix to which redundant codes are added, FIG. 5 is a diagram showing a state where test points are dispersedly arranged in information codes, and FIG. 6 is a matrix on which information codes are two-dimensionally arranged. FIG. 3 is a diagram illustrating a scanning direction during transmission. In the figure, 1 is a mapping encoding circuit, 2 is a memory, 3 is an address control circuit, 4 is an outer encoding circuit, 5 is an inner encoding circuit, 6 is a synchronization addition circuit, and 7 is a recording unit.
Claims (4)
付加して伝送する情報伝送方法であって、 前記情報符号を2次元配列したマトリクス上の斜め方向
に前記情報符号を抽出して第1の誤り検出又は訂正用冗
長符号を形成し、該マトリクスの行方向に付加し、 前記第1の誤り検出又は訂正用冗長符号の付加されたマ
トリクスの各行の符号を行方向に抽出して第2の誤り検
出又は訂正用冗長符号を形成し、該マトリクスの行方向
に付加した後、 前記第2の誤り検出又は訂正用冗長符号の付加されたマ
トリクスの各行の符号を行方向に順次伝送することを特
徴とする符号伝送方法。An information transmission method for transmitting an information code by adding a redundant code for error detection or correction to the information code and transmitting the information code in a diagonal direction on a matrix in which the information codes are two-dimensionally arranged. One redundant code for error detection or correction is formed and added in the row direction of the matrix, and the code of each row of the matrix to which the first redundant code for error detection or correction is added is extracted in the row direction and After forming two error detection or correction redundant codes and adding them in the row direction of the matrix, the codes of each row of the matrix to which the second error detection or correction redundant code is added are sequentially transmitted in the row direction. A code transmission method characterized by the above-mentioned.
び、前記第2の誤り検出又は訂正用冗長符号を前記第2
の誤り検出又は訂正用冗長符号の付加されたマトリクス
の各行の情報符号中に分散配置することを特徴とする特
許請求の範囲第(1)項記載の符号伝送方法。2. The method according to claim 1, wherein the first redundant code for error detection or correction and the second redundant code for error detection or correction are stored in the second redundant code.
3. The code transmission method according to claim 1, wherein the code is distributed in the information code of each row of the matrix to which the redundant code for error detection or correction is added.
生成時に、検査行列中の単位行列を分散配置することに
より前記第1の誤り検出又は訂正用冗長符号を前記斜め
方向に抽出した情報符号中に分散配置することを特徴と
する特許請求の範囲第(2)項記載の符号伝送方法。3. The first redundant code for error detection or correction is extracted in the diagonal direction by distributing unit matrices in a parity check matrix when generating the redundant code for error detection or correction. The code transmission method according to claim 2, wherein the code transmission method is arranged in an information code in a distributed manner.
生成時に、検査行列中の単位行列を分散配置することに
より前記第2の誤り検出又は訂正用冗長符号を前記第1
の誤り検出又は訂正用冗長符号の付加されたマトリクス
の各行の符号中斜め方向に抽出した情報符号中に分散配
置することを特徴とする特許請求の範囲(2)項記載の
符号伝送方法。4. A method for generating a second redundant code for error detection or correction by distributing unit matrices in a parity check matrix at the time of generating the second redundant code for error detection or correction, thereby distributing the second redundant code for error detection or correction to the first redundant code.
The code transmission method according to claim 2, wherein the information is extracted and distributed in an information code extracted in an oblique direction in the code of each row of the matrix to which the redundant code for error detection or correction is added.
Priority Applications (2)
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JP1067364A JP2832024B2 (en) | 1989-03-18 | 1989-03-18 | Code transmission method |
US08/333,231 US5502734A (en) | 1989-03-18 | 1994-11-02 | Code transmitting method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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JP1067364A JP2832024B2 (en) | 1989-03-18 | 1989-03-18 | Code transmission method |
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JPH02246440A JPH02246440A (en) | 1990-10-02 |
JP2832024B2 true JP2832024B2 (en) | 1998-12-02 |
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---|---|---|---|---|
US5299208A (en) * | 1991-11-14 | 1994-03-29 | International Business Machines Corporation | Enhanced decoding of interleaved error correcting codes |
MY114512A (en) | 1992-08-19 | 2002-11-30 | Rodel Inc | Polymeric substrate with polymeric microelements |
US6198748B1 (en) * | 1997-09-02 | 2001-03-06 | Motorola, Inc. | Data transmission system and method |
JP3922819B2 (en) * | 1998-09-21 | 2007-05-30 | 富士通株式会社 | Error correction method and apparatus |
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US4281355A (en) * | 1978-02-01 | 1981-07-28 | Matsushita Electric Industrial Co., Ltd. | Digital audio signal recorder |
JPS574629A (en) * | 1980-05-21 | 1982-01-11 | Sony Corp | Data transmitting method capable of correction of error |
JPS6029073A (en) * | 1983-06-17 | 1985-02-14 | Hitachi Ltd | Digital signal configuration system |
JPH061605B2 (en) * | 1985-02-08 | 1994-01-05 | 株式会社日立製作所 | Digital signal recording and transmission method |
CA1258134A (en) * | 1985-04-13 | 1989-08-01 | Yoichiro Sako | Error correction method |
US4779276A (en) * | 1985-07-30 | 1988-10-18 | Canon Kabushiki Kaisha | Data transmission system |
JP2537178B2 (en) * | 1985-07-31 | 1996-09-25 | キヤノン株式会社 | Data processing device |
JPH069109B2 (en) * | 1985-12-23 | 1994-02-02 | キヤノン株式会社 | DATA TRANSMISSION METHOD AND DEVICE |
JPS62177768A (en) * | 1986-01-31 | 1987-08-04 | Sony Corp | Error correcting device |
JP2751201B2 (en) * | 1988-04-19 | 1998-05-18 | ソニー株式会社 | Data transmission device and reception device |
JPS63274222A (en) * | 1987-05-01 | 1988-11-11 | Matsushita Electric Ind Co Ltd | Interleaving method |
US4802171A (en) * | 1987-06-04 | 1989-01-31 | Motorola, Inc. | Method for error correction in digitally encoded speech |
US4958350A (en) * | 1988-03-02 | 1990-09-18 | Stardent Computer, Inc. | Error detecting/correction code and apparatus |
US4907233A (en) * | 1988-05-18 | 1990-03-06 | The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration | VLSI single-chip (255,223) Reed-Solomon encoder with interleaver |
-
1989
- 1989-03-18 JP JP1067364A patent/JP2832024B2/en not_active Expired - Fee Related
-
1994
- 1994-11-02 US US08/333,231 patent/US5502734A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JPH02246440A (en) | 1990-10-02 |
US5502734A (en) | 1996-03-26 |
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