JP2831006B2 - Method for manufacturing thin film transistor - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a method of manufacturing a thin film transistor, and is particularly effective when applied to the manufacture of a thin film transistor using a polycrystalline semiconductor thin film.

[Summary of the Invention]

The present invention relates to a method of manufacturing a thin film transistor, comprising: forming a polycrystalline semiconductor thin film by forming an amorphous semiconductor thin film containing no crystal grains and performing solid phase growth at a low temperature on the amorphous semiconductor thin film; Crystal defects in the polycrystalline semiconductor thin film are removed by heat-treating the thin film in an inert gas atmosphere, and then a gate oxide film is formed on the polycrystalline semiconductor thin film by thermally oxidizing the polycrystalline semiconductor thin film. Thereby, the interface between the polycrystalline semiconductor thin film and the gate oxide film can be flattened.

[Conventional technology]

A thin film transistor (TFT) is used, for example, as a pixel switching element of an active matrix type liquid crystal display. The polycrystalline Si TFT in which the active layer of this TFT is constituted by a polycrystalline silicon (Si) thin film is an a-Si TFT in which the active layer is constituted by an amorphous Si (a-Si) thin film.
It is well known that they have higher performance than. In particular, a polycrystalline Si TFT in which the active layer is formed of a polycrystalline Si of an ultrathin film of about several hundreds of meters (hereinafter referred to as an ultrathin polycrystalline Si TFT) has extremely high performance.

Conventionally, this ultra-thin polycrystalline Si TFT has been manufactured, for example, by the following method. That is, first, a polycrystalline Si thin film having a thickness of, for example, about 800
It is formed on the entire surface by the VD method. Next, the polycrystalline Si thin film is made amorphous by, for example, ion implantation of Si to form an amorphous Si thin film. Next, for example, in a nitrogen (N ₂ ) atmosphere
By performing a heat treatment (annealing) at a low temperature of about 600 ° C. for about 60 hours, for example, the amorphous Si thin film is grown in a solid phase. As a result, a polycrystalline Si thin film having a large crystal grain size is formed. Thereafter, the polycrystalline Si thin film is patterned into a predetermined shape by etching to form an island. FIG. 6A shows this state, in which an island-shaped polycrystalline Si thin film 102 is formed on a quartz glass substrate 101. Next, this polycrystalline Si
The thin film 102 is placed in an oxygen (O ₂ )
By thermal oxidation for 0 minutes, as shown in FIG. 6B,
Gate oxide film 1 consisting of SiO ₂ film on polycrystalline Si thin film 102
03, and the polycrystalline Si thin film 102 is
The thickness is reduced to about 00 to 300 °. After this, the gate electrode,
Through a process of forming a source region, a drain region, an electrode and the like, an intended ultra-thin polycrystalline Si TFT is completed.

The thin film semiconductor layer on the insulating substrate is subjected to a heat treatment to make the crystal grain size uniform beforehand, and then the thin film semiconductor layer is irradiated with a laser, melted, and cooled and solidified to form a thin film single crystal. A method of manufacturing a TFT using the same is known (JP-A-61-78120).

[Problems to be solved by the invention]

In the above-described conventional method for manufacturing an ultra-thin polycrystalline Si TFT, fine crystal defects are present in the crystal grain boundaries and inside the crystal grains 102a in the polycrystalline Si thin film 102 before thermal oxidation for forming the gate oxide film 103. Since there are many (dislocations, etc.), these crystal defects are easily oxidized faster than other parts during thermal oxidation. Due to this oxidation, the flatness of the interface between the polycrystalline Si thin film 102 and the gate oxide film 103 is considerably deteriorated as shown in FIG. As a result, there are disadvantages such as a low withstand voltage of the gate oxide film 103, a high threshold voltage, and a large gate voltage swing (a change amount of the gate voltage required to change the drain current by 10 times). The characteristics of the crystalline Si TFT were degraded.

Accordingly, an object of the present invention is to provide a method of manufacturing a thin film transistor that can make the interface between a polycrystalline semiconductor thin film and a gate oxide film flat.

[Means for Solving the Problems] In order to solve the above problems, the present invention forms an amorphous semiconductor thin film (3) containing no crystal grains, and forms the amorphous semiconductor thin film (3) in a solid phase at a low temperature. The polycrystalline semiconductor film (4) is formed by growing, and the polycrystalline semiconductor thin film (4) is heat-treated in an inert gas atmosphere to remove crystal defects in the polycrystalline semiconductor thin film. By thermally oxidizing (4), a gate oxide film (5) is formed on the polycrystalline semiconductor thin film (4).

Examples of the inert gas include N ₂ and argon (Ar)
And other rare gases can be used.

The temperature of the heat treatment is preferably 800 ° C. or less in order to sufficiently obtain the effect of reducing crystal defects in the polycrystalline semiconductor thin film (4), while being sufficiently lower than the heat resistant temperature of the substrate to be used. It is preferable that the temperature be 1100 ° C. or higher from the necessity, so that the temperature is preferably in the range of 800 to 1100 ° C. The time of this heat treatment is preferably 20 minutes or more in order to obtain the effect of reducing crystal defects.

The solid-phase growth of the amorphous semiconductor thin film (3) is performed by, for example, 50
It can be performed at a temperature in the range of 0-700 ° C.

[Action]

According to the above-mentioned means, fine crystal defects existing in the crystal grain boundaries and inside the crystal grains (4a) in the polycrystalline semiconductor thin film (4) are removed by heat treatment in an inert gas atmosphere. Abnormal oxidation does not occur at these crystal defects at the time of thermal oxidation of the crystalline semiconductor thin film (4). Therefore, the interface between the polycrystalline semiconductor thin film (4) and the gate oxide film (5) can be made flat.

〔Example〕

Hereinafter, an embodiment of the present invention will be described with reference to the drawings. This embodiment is an embodiment in which the present invention is applied to the production of an ultra-thin polycrystalline Si TFT.

In this embodiment, as shown in FIG. 1A, first, a polycrystalline Si thin film 2 having a thickness of, for example, about 800 ° is formed on the entire surface of a quartz glass substrate 1 by, for example, a low pressure CVD method.

Next, the polycrystalline Si thin film 2 is made amorphous by ion implantation of inert atoms such as Si, and as shown in FIG.
The Si thin film 3 is formed.

Next, the amorphous Si thin film 3 is subjected to solid phase growth by annealing in a N ₂ atmosphere at a low temperature of, for example, about 600 ° C., for example, for 60 hours, thereby forming a polycrystalline Si thin film as shown in FIG. 1C. A thin film 4 is formed. The grain size of the crystal grains in the polycrystalline Si thin film 4 can be extremely large, for example, about 1.5 to 2 μm.

Next, annealing is performed at a temperature of, for example, about 1000 ° C. for, for example, about 2 hours in an N ₂ atmosphere. By this annealing, fine crystal defects existing inside the crystal grain boundaries and crystal grains in the polycrystalline Si thin film 4 are removed.

Next, the polycrystalline Si thin film 4 is patterned into a predetermined shape by etching to form an island shape as shown in FIG. 1D.

Next, as shown in FIG. 1E, a gate oxide film 5 made of an SiO ₂ film is formed on the polycrystalline Si thin film 4 by performing thermal oxidation in an O ₂ atmosphere at, for example, 1000 ° C. for 40 minutes. At the same time, the polycrystalline Si thin film 4 is made ultrathin to a thickness of about 200 to 300 °.

Next, as shown in FIG. 1F, a film 6 for forming a gate electrode such as a polycrystalline Si thin film is formed on the entire surface by, for example, a low pressure CVD method.

Next, the gate electrode forming film 6 and the gate insulating film 5 are patterned into a predetermined shape by etching. As a result, as shown in FIG.
To form

Next, P or arsenic (As) is applied to the polycrystalline Si thin film 4 using the gate electrode 7 and the gate insulating film 5 as a mask.
Is ion-implanted at a high concentration. As a result, as shown in FIG. 1H, for example, an n ⁺ -type source region 8 and a drain region 9 are formed in a self-aligned manner with respect to the gate electrode 7. Thereafter, annealing for electrically activating the implanted impurities is performed.

Next, as shown I in FIG. 1, for example, phosphosilicate glass (PSG) film or an insulating film 10 such as a low C such as SiO ₂ film
After forming the entire surface by the VD method, predetermined portions of the insulating film 10 are removed by etching to form openings 10a and 10b. Thereafter, aluminum (Al) is formed on the source region 8 and the drain region 9 through the openings 10a and 10b, respectively.
The electrodes 11 and 12 are formed to complete the intended ultra-thin polycrystalline Si TFT. In addition, if necessary, polycrystalline S
After the i thin film 4 is formed, a hydrogenation treatment is performed to reduce traps existing at crystal grain boundaries in the polycrystalline Si thin film 4, but is omitted here.

As described above, according to the present embodiment, the gate oxide film 5 is formed by performing thermal oxidation after removing minute crystal defects in the polycrystalline Si thin film 4 by annealing in an inert gas atmosphere.
, Abnormal oxidation does not occur at these crystal defects. Therefore, the interface between the polycrystalline Si thin film 4 and the gate oxide film 5 can be made flat as shown in FIG. In FIG. 2, reference numeral 4a indicates a crystal grain. Thereby, in addition to the high-speed switching property of the ultra-thin polycrystalline Si TFT, remarkable performance improvement such as improvement of the breakdown voltage of the gate oxide film 5, lowering of the threshold voltage, and reduction of the gate voltage swing can be achieved.

Also, usually, since the oxidation reactor is configured to be able to introduce O _2, N _2, etc., N ₂ using the same oxidation furnace
After annealing the polycrystalline Si thin film 4 in the atmosphere first,
By changing the atmosphere from N ₂ to O ₂ and performing thermal oxidation at the same temperature, for example, the gate oxide film 5 can be formed.
For this reason, the increase in TFT manufacturing time due to the addition of an annealing step before thermal oxidation is extremely small.

The method of manufacturing an ultra-thin polycrystalline Si TFT according to the present embodiment includes:
For example, it can be applied to the manufacture of a liquid crystal display using a polycrystalline Si TFT as a pixel switching element and a peripheral scanning unit element.

Although the embodiments of the present invention have been specifically described above, the present invention is not limited to the above-described embodiments, and various modifications based on the technical idea of the present invention are possible.

For example, in the above embodiment, the ultra-thin polycrystalline Si
Although the quartz glass substrate 1 is used as the TFT substrate, another substrate made of a material whose heat-resistant temperature is higher than the annealing temperature and the thermal oxidation temperature may be used. In the above embodiment, the amorphous Si thin film 3 is formed by amorphizing the polycrystalline Si thin film 2. However, the amorphous Si thin film directly formed by a low-pressure CVD method or the like is used. It is also possible to use. Furthermore, the ultra-thin polycrystalline Si of the above embodiment
Although the TFT is an n-channel type, the present invention can be applied to the production of a p-channel type ultra-thin polycrystalline Si TFT. In addition, the present invention is not limited to an ultra-thin polycrystalline Si TFT, but also a polycrystalline Si TFT using a polycrystalline Si thin film having a larger thickness.
It is also possible to apply to the manufacture of TFT. Further, the present invention can be applied to the manufacture of a TFT using a polycrystalline semiconductor thin film other than the polycrystalline Si thin film.

The annealing of the polycrystalline Si thin film 4 in the above-described embodiment can be performed by using a pulse laser beam (wavelength: 308 nm) using a XeCl excimer laser or a pulse laser beam (wavelength: 248 nm) using a KrF excimer laser. It is. In this case, the pulsed laser beam having a wavelength in the ultraviolet region is almost absorbed from the surface of the polycrystalline Si thin film 4 within a range of about 100 to 200 ° in depth. For example, if the thickness is
If it is about 800 mm, the remaining 300 mm thick part is not sufficiently heated. In such cases, polycrystalline
It is effective to simultaneously irradiate a pulsed laser beam from the front and back surfaces of the Si thin film 4. FIG. 3 shows a laser beam irradiation device for that purpose. As shown in FIG. 3, the laser beam irradiation device includes a laser 13 such as an excimer laser, a beam splitter 14 such as a half mirror, and mirrors M ₁ , M ₂ and M ₃ .
Then, the pulse laser beam B oscillated from the laser 13 is split into _two pulse laser beams B ₁ and B ₂ by a beam splitter 14, and the pulse laser beam B ₁ is reflected by a mirror M ₁ to form a polycrystalline Si thin film 4. Incident on the surface of
On the other hand, the pulse laser beam B ₂ is reflected twice by the mirrors M ₂ and M ₃ to bend the direction of 180 ° to form the polycrystalline Si thin film 4.
Incident on the back surface of. In this case, a pulsed laser beam
B ₂ transmits almost completely through the quartz glass substrate 1. In this way, as shown in FIG. 4, pulsed laser beams B ₁ and B ₂ are simultaneously irradiated from the front and back surfaces of the polycrystalline Si. As a result, the polycrystalline Si thin film 4 is simultaneously heated from both front and back surfaces, so that even if the thickness of the polycrystalline Si thin film 4 is large to some extent, the entire film can be sufficiently heated, and the crystal in the polycrystalline Si thin film 4 can be heated. Defects can be effectively removed.

The pulse width of a pulsed laser beam from an excimer laser is about several tens of ns, but in applications such as annealing and CVD using a laser beam, an increase in the pulse width is required. Therefore, for example, in the case of annealing of a thin polycrystalline Si thin film 4 which can heat the entire film by irradiation of a pulse laser beam from only one side, as shown in FIG.
Way, for example, a high refractive index of the path of the B _2, and it is possible to effectively increase the pulse width by inserting the absorbing delay element 15 constituted by less material. That is, when the waveform of the pulsed laser beams B ₁ is as shown in A of FIG. 5, with respect to the pulsed laser beams B ₁ to the pulsed laser beam B ₂ through the delay element 15 shown in B of FIG. 5 Delay for a certain time. In this case, polycrystalline when viewed in Si thin film 4, the pulse er Heather beams B ₁ continuously pulsed laser beam subsequent to irradiation
B ₂ will be irradiated. That is, in this case, the pulse width can be effectively increased because it is the same as the case of irradiating a pulse laser beam having a large pulse width as shown in FIG. 5C. For example, if delayed by approximately the pulse width of the pulsed laser beam B ₂ by the delay element 15, it is possible to increase the pulse width to approximately twice effectively.

If only annealing by pulsed laser beam irradiation is performed, a low melting point glass substrate or the like can be used instead of the quartz glass substrate 1.

[Effects of the Invention] As described above, according to the present invention, heat treatment of a polycrystalline semiconductor thin film in an inert gas atmosphere removes crystal defects in the polycrystalline semiconductor thin film, and then removes the polycrystalline semiconductor thin film. Since the gate oxide film is formed on the polycrystalline semiconductor thin film by thermally oxidizing the thin film,
Abnormal oxidation caused by minute crystal defects existing in the polycrystalline semiconductor thin film does not occur, whereby the interface between the polycrystalline semiconductor thin film and the gate oxide film can be made flat.

[Brief description of the drawings]

1A to 1I are cross-sectional views for explaining a method of manufacturing an ultra-thin polycrystalline Si TFT according to an embodiment of the present invention in the order of steps, and FIG. 2 is a polycrystalline state in the state shown in FIG. FIG. 3 is an enlarged cross-sectional view near the interface between the Si thin film and the gate oxide film. FIG. 3 is a diagram showing a configuration of a laser beam irradiation device for irradiating a pulse laser beam from the front and back surfaces of the sample. FIG. 4 is a polycrystalline Si thin film. 5 is a cross-sectional view for explaining a method of simultaneously irradiating and heating a pulsed laser beam from the front and back surfaces of FIG.
6A and 6B are cross-sectional views for explaining a conventional method of manufacturing an ultra-thin polycrystalline Si TFT in the order of steps, and FIG. 7 is a cross-sectional view of the polycrystalline Si thin film and the gate oxide film in the state shown in FIG. 3 is an enlarged cross-sectional view near the interface of FIG. Description of main symbols in the drawings 1: quartz glass substrate, 2: 4: polycrystalline Si thin film, 3: amorphous Si thin film, 5: gate oxide film, 7: gate electrode, 8: source region, 9:
Drain region.

 ──────────────────────────────────────────────────続 き Continuation of front page (56) References JP-A-61-81665 (JP, A) JP-A-62-76514 (JP, A) JP-A-53-108373 (JP, A) JP-A-62-76537 88365 (JP, A) JP-A-62-104021 (JP, A) JP-A-61-78120 (JP, A)

Claims (2)

(57) [Claims] An amorphous semiconductor thin film containing no crystal grains is formed, and the amorphous semiconductor thin film is solid-phase grown at a low temperature to form a polycrystalline semiconductor thin film. Heat treatment in a gas atmosphere to remove crystal defects in the polycrystalline semiconductor thin film, and then thermally oxidize the polycrystalline semiconductor thin film to form a gate oxide film on the polycrystalline semiconductor thin film A method for manufacturing a thin film transistor, comprising: 2. The method according to claim 1, wherein the heat treatment is performed by irradiation with a pulsed laser beam.