JP2807070B2 - Driving method of ferroelectric liquid crystal panel - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a method for driving a ferroelectric liquid crystal panel using a TN type liquid crystal panel drive IC.

[Prior Art] In recent years, ferroelectric liquid crystals have been actively studied.
However, the operation mode is significantly different from the conventional TN type liquid crystal. Therefore, a liquid crystal driving LSI currently used for driving a TN type liquid crystal panel cannot be used as it is for driving a ferroelectric liquid crystal panel.

Therefore, a new drive circuit was developed for a ferroelectric liquid crystal panel (for example, Japanese Patent Laid-Open No. 62-87941), or an LSI for driving a TN type liquid crystal panel was used as an analog multiplexer to generate other functions. ON waveform, O
Distribute the FF waveform to the drive electrode (J.Phys.E: Sci.Instru
m. 21 (1988) 460-466).

However, in the former case, if the drive circuit is configured using the current IC, the circuit becomes huge and impractical as the number of drive electrodes on the panel increases, and if a new LSI is manufactured, There was a problem that the cost was high.

Also, in the latter case, there is a problem that a function generator for generating the ON waveform and the OFF waveform is required, and a complicated circuit is required to synchronize with the driving LSI.

In view of such a problem, the present applicant has proposed a driving method of a ferroelectric liquid crystal panel using a currently available TN type liquid crystal panel driving LSI in Japanese Patent Application No. 1-56298. .

[Problems to be Solved by the Invention] The driving method of Japanese Patent Application No. 1-56298 described above is excellent in that a ferroelectric liquid crystal panel is driven using a TN type liquid crystal panel driving LSI. However, in this driving method, correspondence between data to be displayed and an LSI control signal is not so good, and there is room for improvement in simplifying a control procedure.

Therefore, the present applicant has proposed an invention in which this point is improved in Heisei
Filed on July 30, 2012 (referred to as the previous application). However, even in the prior application, since screen erasing cannot be performed simply because line sequential scanning can be performed, the same time is required for erasing and writing one screen, and the problem of slow screen rewriting remains. .

The present invention has been made in view of such circumstances, and a simple driving circuit using a currently available TN-type liquid crystal panel driving LSI, and driving a ferroelectric liquid crystal panel by a simple control procedure. It is an object of the present invention to provide a method of driving a ferroelectric liquid crystal panel, which can reduce the rewriting speed of a screen by erasing one screen at a time.

[Means for Solving the Problems] To achieve the above object, a method of driving a ferroelectric liquid crystal panel of the present invention is as follows.

That is, when D = 1, the dot is ON, and when D = 0, the dot is OF
One of the four input terminals is selected according to a combination of two digital control signals of display data D representing F and a liquid crystal drive output AC conversion signal M, and the voltage input to the input terminal is output. A liquid crystal driving IC that outputs to a terminal and drives the segment side of the liquid crystal panel is used. Further, display data D indicating selection of a scanning line when D = 1, non-selection of a scanning line when D = 0, and liquid crystal driving One of the four input terminals is selected according to the combination of the two digital control signals of the output AC signal M, and the voltage input to the input terminal is output to the output terminal to drive the common side of the liquid crystal panel. A method of driving a ferroelectric liquid crystal panel using a liquid crystal driving IC, wherein a part of a common side output electrode is a non-connection common electrode not connected to the ferroelectric liquid crystal panel, and the non-connection common One screen of the ferroelectric liquid crystal panel is collectively erased while the electrodes are selected.

As a preferred mode, at adjacent times, the liquid crystal drive output AC signal M is changed from 0 to 0 on the common side in synchronization with the operation of changing the liquid crystal drive output AC signal M from 1 to 0 on the segment side. By changing it to 1, one screen of the ferroelectric liquid crystal panel is erased at a time. On the other hand, at the adjacent time, the liquid crystal drive output AC signal M on the segment side and the common side are both changed from 0 to 1 in synchronization. Thus, a method of turning on a desired dot may be adopted.

Further, as another preferred embodiment, the liquid crystal drive output AC signal M
In synchronization with the operation of changing from 0 to 1, the liquid crystal drive output alternating signal M is changed from 1 to 0 on the common side, so that one screen of the ferroelectric liquid crystal panel is collectively erased. At the time, the desired dot may be turned on by changing the liquid crystal drive output AC signal M on the segment side and the common side from 1 to 0 in synchronization with each other.

 Hereinafter, the solution will be specifically described.

As shown in FIG. 1, a driving device for implementing the present driving method includes a ferroelectric liquid crystal panel 1, a common driving IC 2 for driving the common side of the panel 1, a segment driving IC 3 for driving the same segment side, And the controller 4.

As shown in FIG. 2, the ferroelectric liquid crystal panel 1 is a dot matrix panel having a simple matrix configuration having a common electrode 1a and a segment electrode 1b, which is in a bistable state and has a clear threshold characteristic. That is, when the applied voltage pulse is fixed to a certain pulse width τ,
When a positive voltage pulse equal to or greater than a certain threshold value V _th (> 0) is applied to the dot (pixel) 1c, writing is performed and the display is turned on (lit state), and a negative voltage of −V _th or less is applied. When a pulse is applied, erasing is performed and the display is turned off (turned off). With a voltage pulse whose absolute value is equal to or less than _{Vth, the} display state does not change regardless of the polarity and the current display is maintained. ing.

The common drive IC 2 and the segment drive IC 3 both receive the display data D, the liquid crystal drive output AC signal M, and the liquid crystal drive voltage, and output the liquid crystal drive output (see FIG. 3).

Here, when used as a segment driving IC (segment driver mode), a liquid crystal driving IC normally drives a plurality of electrodes of a liquid crystal panel simultaneously.

The display data D corresponding to each of the plurality of segment electrodes is transferred serially to the driving IC (in some cases, transferred in parallel to improve the transfer speed).
Internally latched to control output. When used for a TN liquid crystal panel, D = 1 and 0 indicate ON (lit state) and OFF (unlit state) of the dot on the corresponding segment electrode, respectively.

On the other hand, when used as a common drive IC (common driver mode), display data D = 1 and 0 correspond to selection and non-selection of the corresponding common electrode, respectively. The selection of the common electrode is usually performed sequentially (line-sequential scanning).

In both the segment driver mode and the common driver mode, when the liquid crystal drive output alternating signal M is used for a conventional TN liquid crystal panel, the time series is M = 1,0,1,0. The output voltage is switched between positive and negative to make it AC, and the DC component of the voltage applied to the liquid crystal is set to 0 to suppress the chemical deterioration of the liquid crystal. M, unlike D, has no latch mechanism inside the IC and is common to all outputs.

Further, the liquid crystal driving voltage is input to the input terminal V ₁ ~V _4, when used as a conventional TN liquid crystal panel, usually setting the voltage as _{V 1> V 3> V 4} > V 2 .

On the other hand, there are a plurality of output terminals Y (Y _{1 to} Y _n ) for the liquid crystal drive output, and simultaneously drives a plurality of electrodes on the common side and the segment side of the liquid crystal panel as described above.

Next, the display data D, a liquid crystal drive output alternating signal M, the relationship between the input terminals V ₁ ~V ₄ and the output Y is selected.

There are four combinations of the display data D and the digital control signal of the liquid crystal drive output alternating signal M, and _{one of the} four input terminals V ₁ , V ₂ , V ₃ , V ₄ is selected according to each combination, The voltage applied to the selected input terminal appears at the output terminal Y. In the segment driver mode, the input terminal V ₁ when (D, M) = (1,1), the input terminal V ₂ when = (1,0), and the input terminal V when = (0,1). ₃ , input terminal V ₄ when = (0,0); in common driver mode, input terminal V ₂ when (D, M) = (1,1), input terminal V ₁ when (2,0) When = (0,1), the input terminal is V ₃ , and when = (0,0), the input terminal is V ₄ .

Usually, the use as a TN liquid crystal panel, the segment driver mode, 4 ranks of the voltage _{V sh +, V sh-, V} sl +, V sl- the _{(V sh +> V sl +} > V sl-> V sh-) V ₁ = V _{sh +} , V ₂ = V _sh− , V ₃ = V _{sl +} , V ₄ = V _sl− (FIG. 4 (a)).

Further, in the common driver mode, the four-level voltages V _{ch +} , V _ch- , V _{cl +} , V _cl- (V _{ch +} > V _{cl +} > V _cl- > V _ch- ) are changed to V ₁ = V _{ch +} , V ₂ = V _ch- , V ₃ = V _{cl +} , V ₄ = V _cl- (FIG. 4 (b)).

However, in the _{whole, V sh + = V ch +} > V cl +> V sl +> V sl->
_V cl-> V _ch- = to the relationship of _V sh-.

The connection between the ferroelectric liquid crystal panel 1 and the common driving IC 2 and the segment driving IC 3 is performed as shown in FIG. That is, the output electrodes Yc ₁ and Yc of the common drive IC 2
_{c 2, Yc 3, ...,} Yc m strong common electrode l of ferroelectric liquid crystal panel 1
a ₁ , la ₂ , la ₃ ,…, la _m , while the segment drive I
Output electrode Ys ₁ of _{C3, Ys 2, Ys 3,} ..., the Ys _n segment electrodes lb of the liquid crystal panel _{1 1, lb 2, lb 3} , ..., connected to lb _n.

Here, the configuration that is a feature for implementing the present invention is:
A part of the output electrode of the common drive IC 2 is not connected to the liquid crystal panel 1 but is a dummy electrode Yc ₀ . Dummy electrode Y
c ₀ is selected when the screen of the liquid crystal panel 1 is collectively erased as described later. The dummy electrode Yc ₀ may be a plurality of provided may be a single, The common drive IC
It may be provided at any position in the arrangement of the two output electrodes. However, in consideration of the procedure of sequentially performing the writing scan after performing the batch erasing of the screen, it is usually preferable to arrange the dummy electrode at the head position so as to be selected at the beginning of the line sequential writing scanning.

The above-described ferroelectric liquid crystal panel 1 is connected to a common drive IC 2
As a method of driving using the segment driving IC 3, there is the following method.

Driving method 1 In the segment driver mode, the three-level liquid crystal driving voltages V _{s +} , V ₀ , and V _s- (V _{s +} > V ₀ > V _s- ) are _expressed by V ₁ = V _{s +} , V ₂ = V _s- , The segment side of the ferroelectric liquid crystal panel is driven by allocating V ₃ = V ₄ = V ₀ (FIG. 5 (a)). In the common driver mode, the two-level liquid crystal driving voltages V _{c +} , V _{c -} (V _{c +} > V _c- ) is assigned as V ₁ = V ₃ = V _{c +} , V ₂ = V ₄ = V _c- , and the common side of the ferroelectric liquid crystal panel is driven (FIG. 5). (B)).

In the write mode, the voltage is set as described above, and after the display data D is determined in each drive IC, the drive voltage for both the common segment
When the liquid crystal drive output AC signal M is changed from 0 to 1 by the IC, the drive output changes on each of the segment side and the common side as shown in FIG. 6 (a). Since the voltage between the segment, the electrode and the common electrode is applied to the liquid crystal,
The liquid crystal applied voltage as shown in the frame is obtained.

Here, the segment electrode is ON with the common electrode selected.
In the state, first, a large negative voltage (the direction from the segment electrode toward the common electrode is positive) is applied to the liquid crystal of the pixel at M = 0, and a large positive voltage (absolute value) at M = 1 Is _Vth or more). Then, the pixel is turned on by the positive pulse (write pulse) in the latter half.

When the common electrode is not selected or the segment electrode is OFF, a small voltage (absolute value) is applied to the liquid crystal of the pixel.
_Vth or less), the display state of the pixel does not change. That is, the desired dot can be written by changing the liquid crystal area drive output AC signal M from 0 to 1.

In any case, the liquid crystal drive output AC signal M is changed from 0 to 1
Since a positive / negative symmetric voltage is applied to the liquid crystal when the voltage is changed, the net DC voltage component is averaged to 0, thereby preventing the chemical deterioration of the liquid crystal.

In the erase mode, display data D corresponding to all electrodes on the segment side
Is set to 1. A dummy electrode is selected on the common side, and all other electrodes, that is, all the common electrodes connected to the panel are in a non-selected state.

In this state, the liquid crystal drive output AC signal M is changed from 1 to 0 on the segment side, and the liquid crystal drive output AC signal M is changed from 0 to 1 on the common side in synchronization with this. The liquid crystal applied voltage changes as shown in FIG. Then, a large positive voltage and then a large negative voltage are applied to the non-selection electrode portion, that is, the entire liquid crystal panel, and the entire surface is collectively erased by the second half negative pulse (erase pulse).

Also in this case, since a positive / negative symmetric voltage is applied to the liquid crystal,
The net DC voltage component is averaged to zero to prevent deterioration of the liquid crystal.

In order to display on the screen of the ferroelectric liquid crystal panel in each mode described above, usually, first, the screen is erased collectively in the erase mode, and then the mode is shifted to the write mode, and the desired pattern is displayed on the screen by line sequential scanning. Write in.

The time required for rewriting the screen of the ferroelectric liquid crystal panel by this method will be considered. The number of scanning lines (the number of common electrodes other than the dummy electrodes) is m, and the basic pulse width of the driving pulse is τ. A pair of positive / negative symmetric pulses is used for selecting one scanning line, and this requires a time of 2τ.

In the prior application method, after one screen is erased while scanning from top to bottom, a desired pattern is written while scanning one screen again from top to bottom. Alternatively, scanning is performed from top to bottom while erasing and writing are repeated for each scanning line. Eventually, the time required for rewriting one screen is 4mτ.

In the present invention, writing requires a time 2mτ to scan one screen from top to bottom, but the time required for erasing is the same as the time 2τ required to scan one scanning line. As a result, the time required for rewriting one screen is 2 (m + 1) τ. Therefore, when the number m of scanning lines increases, the screen can be rewritten in about half the time as compared with the conventional method.

Driving method 2 In the segment driver mode, the three-level liquid crystal driving voltages V _{s +} , V ₀ , and V _s- (V _{s +} > V ₀ > V _s- ) are _expressed by V ₁ = V _s- , V ₂ = V _{s +} , The segment side of the ferroelectric liquid crystal panel is driven by allocating V ₃ = V ₄ = V ₀ (FIG. 7A). In the common driver mode, the two-level liquid crystal driving voltages V _{c +} , V _{c -} (V _{c +} > V _c- ) is assigned as V ₁ = V ₃ = V _c- and V ₂ = V ₄ = V _{c +} to drive the common side of the ferroelectric liquid crystal panel (FIG. 7 ( b)).

The specific writing and erasing methods are the driving method 1 described above.
It is almost the same as the idea. That is, in the driving method 1, 1 in the liquid crystal driving output AC conversion signal M may be replaced with 0, and 0 may be replaced with 1, and the other series of procedures are the same. And the obtained liquid crystal drive waveform and liquid crystal applied voltage are also
In FIG. 6, the result is the same as the result obtained when 1 of M is read as 0 and 0 is read as 1.

In the driving method 3 segment driver mode, the liquid crystal driving voltage V _{sh +} 4 _{semi-position, V sh-, V sl +,} V sl- (V sh +> V sl +> V sl->
V _sh− ) is assigned as V ₁ = V _{sh +} , V ₂ = V _sh− , V ₃ = V _{sl +} , V ₄ = V _sl− , and the segment side of the ferroelectric liquid crystal panel is driven (No. FIG. 8 (a)).

The common driver mode, four-level position of the liquid crystal drive voltage _{V ch +, V ch-, V} cl +, V cl- (V ch +> V cl +> V cl->
V _ch- ) are assigned as V ₁ = V _{cl +} , V ₂ = V _cl- , V ₃ = V _{ch +} , V ₄ = V _ch- , and drive the common side of the ferroelectric liquid crystal panel (No. FIG. 8 (b)).

The specific writing and erasing methods are the driving method 1 described above.
It is similar to the idea. That is, in the write mode, when the liquid crystal drive output alternating signal M is changed from 0 to 1 in both the common segment drive ICs, FIG. 9 (a)
The drive output changes as shown in the above, and the liquid crystal applied voltage changes accordingly. The obtained liquid crystal applied voltage is the same as that shown in FIG.

In the erase mode, display data D corresponding to all electrodes on the segment side
Is set to 1, and only the dummy electrode is selected on the common side. In this state, the liquid crystal drive output AC signal M on the segment side is changed from 1 to 0, and the liquid crystal drive output AC signal M on the common side is also changed from 0 to 1 in synchronization with this. The applied voltage changes as shown in FIG. 9 (b).

The obtained liquid crystal applied voltage is qualitatively the same as in the case of the driving method 1 (see FIG. 6 (b)), and only the absolute value of the voltage is different. If the absolute value of the voltage exceeds the threshold value, the effect of screen erasure is the same.

In the driving method 4 segment driver mode, the liquid crystal driving voltage V _{sh +} 4 _{semi-position, V sh-, V sl +,} V sl- (V sh +> V sl +> V sl->
V _sh− ) are assigned as V ₁ = V _sh− , V ₂ = V _{sh +} , V ₃ = V _sl− , V ₄ = V _{sl +} to drive the segment side of the ferroelectric liquid crystal panel (the tenth side). Figure (a)), the common driver mode, four-level position of the liquid crystal drive voltage _{V ch +, V ch-, V} cl +, V cl- (V ch +> V cl +> V cl->
V _ch− ) is _assigned as V ₁ = V _cl− , V ₂ = V _{cl +} , V ₃ = V _ch− , V ₄ = V _{ch +} , and drives the common side of the ferroelectric liquid crystal panel (No. FIG. 10 (b).

The specific writing and erasing method is the driving method 3 described above.
It is almost the same as the idea. That is, in the driving method 3, the liquid crystal drive output alternating signal M may be read as 1 and 0 as 0, and the other series of procedures are the same. And the obtained liquid crystal drive waveform and liquid crystal applied voltage are also
The result is the same as the result obtained when 1 of M is replaced with 0 and 0 is replaced with 1 in FIG.

In any of the driving methods 1 to 4, the setting of the voltage need not be strict. For example, in driving method 1, V ₃ = V ₄ = V ₀ on the segment side, and V ₁ = V ₃ =
It is desirable that V _{c +} and V ₂ = V ₄ = V _c- , but the IC used is
When it is required that V ₁ > V ₃ > V ₄ > V ₂ , the set voltage is slightly shifted from V ₀ , V _{c +} , V _c− and V _{3 is set} on the segment side.
> V ₀ > V ₄ , and V ₁ > V _{c +} > V ₃ and V ₄ > V _c− > V ₂ on the common side.

However, the difference between the differences, V _1, V ₃ and V _{c +} difference at the common side, and V _2, V ₄ and V _c- and V _3, V ₄ and V ₀ which the segment side, all the liquid crystal driving It is desirable to keep it within 10% of the power supply voltage (V _{s +} −V _s- ). If it exceeds 10%, rewriting of the liquid crystal may not be successful.

 The same applies to driving methods 2 to 4.

Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

FIG. 11 is an example of a circuit for implementing the liquid crystal panel driving method of the present invention.

In the same figure, 100 is a ferroelectric liquid crystal panel (simple matrix type), 200 is a common drive IC, 300 is a segment drive IC, and 400 is a controller (CPU) via a port 401 to drive ICs 200 and 300. Send a control signal. 500 is a liquid crystal drive level circuit.

Here, the liquid crystal drive level circuit 500 switches the common drive IC2
00 and the liquid crystal driving voltages V _{s +} , V _{c +} , V ₀ , V _c− , and V _s− supplied to the segment driving IC 300 are the power supply voltages V _{LC +} , V _LC− (V _{LC +} > V
_LC- ) is made by dividing the _voltage with a resistor. At this time, the driving method is 1/3
To the bias _{method, V s + -V c + =} V c + -V 0 = V 0 -V c- = V c- -V s- (> 0) to.

Also, the beginning of the output electrode of the common drive IC200 is not connected to the liquid crystal panel 100, there as dummy electrodes Yc _0.

Next, the method of this embodiment will be described with reference to a time chart shown in FIG.

First, D = 1 is transferred to the segment driving IC 300 as the number of segment electrodes as screen erase data. The shift clock for the transfer is CK. When the transfer is completed, this data is latched at the falling edge of the latch signal LC, and at the same time,
Set the segment side AC signal _Ms to 1 and set 0 after the pulse width τ.
Then, the output of the segment electrode becomes the output in the ON state (D = 1) in FIG. 6 (b). In FIG. 12, this is the screen erase output of Ys _j .

On the common side, first, the signal E indicating the start of screen scanning is enabled, and then the vertical scanning synchronization signal SC falls in synchronization with the fall of the latch signal LC. Thus, the dummy electrode Yc ₀ is first selected.

At the same time, the common-side alternating signal M _c in (M _s and keeping the synchronization) 0, then 1, then the output of the common electrode Yc ₀ ~Yc _m is the output of the erase mode of Figure No. 6 (b) . Electrode which is currently selected is the dummy electrode Yc _0, this electrode no effect on the display are not connected to the panel. Located other electrode Yc ₁ ~Yc _m all non-selected state, after all, a common output that is applied to the panel, the sixth
The non-selected output shown in FIG. In the FIG. 12 screen blanking output Yc ₁ ~Yc _m This is the case.

As described above, the erase pulse shown in FIG. 6B is applied to all the pixels on the panel, and the collective erasure of the screen is achieved.

During output screen blanking output, the bit map data d ₁ to be displayed on the first row in the segment drive IC300, d _2, d ₃ ...
(dot lit d _j = 1, off at d _j = 0) d _n for transferring the display data D. This corresponds to the first-row write data at D in FIG.

By the time the screen erasure output is completed, n pieces of data for one row are arranged in the segment driving IC 300, so the latch lock LC is lowered to latch the data. Changing and their after segment side AC signal M _s from 0 to 1, d _j is 1
The segment output is 6th depending on whether
It changes like ON and OFF in FIG. In FIG. 12, the first line write output at the segment output YS _j corresponds to this.

During this time, on the common side, the synchronization signal SC falls in synchronization with the fall of the latch clock LC, and the selected scanning line is
Transfer to Yc ₁ . At the same time, the common-side AC signal _Mc (M _s
In keeping with) 0 synchronization when, then 1, then the output of the common electrode Yc ₁ ~Yc _m, each selection changes as FIG. 6 according to the non-selected (a). That, Yc ₁ in selection output, Yc ₂ ~Yc unselected output the _m is obtained. Twelfth
1 row selection output of Yc ₁ in the figure, and the non-selected output Yc ₂ ~Yc _m This is the case.

As a result, in the first row, a write pulse as shown in FIG. 6A is applied to the pixel where the transfer data D is 1, and the dot is turned on. FIG. 6 (a) shows the pixels where D = 0 in the first row and the pixels in the second and subsequent rows.
Since only a pulse having a small amplitude (absolute value is equal to or smaller than the threshold value) is applied, the erased state remains at first.

 The same applies to writing in the second and subsequent rows.

In the present invention, after one screen has been displayed, the screen may be collectively erased as it is, and then the second screen may be written.

However, in this method, the display presentation time is different between the upper scanning line and the lower scanning line, so that flickering may occur. To prevent this, the display may be fixed after one screen has been written, and the current display may be maintained until another content needs to be displayed. This can be done in the following ways:

First, in one method, after writing one screen, all the liquid crystal drive voltages v _x supplied to the drive IC are v ₀ (another appropriate voltage may be used) by using an analog switch 600 as shown in FIG. It is a method of fixing to. In this way, the voltage applied to the liquid crystal becomes zero, and the current display is maintained by the threshold characteristics of the ferroelectric liquid crystal panel 100.

As another method, a method of repeating writing of the same screen without passing through the erase mode after writing of one screen may be used. In this case, only writing of the same screen is repeated without erasing, so that the display presentation time is equal in each part of the panel, and no flicker occurs.

If only writing is repeated without erasing, the contrast of the pixel in the OFF state may decrease due to the influence of crosstalk. When a panel having such characteristics is used, the following may be performed.

That is, by using the invention of the previous application, erasing and writing of any pixel can be performed by the same method of supplying the liquid crystal drive voltage to the IC as in the present invention. However, 4m is required for screen rewriting
It takes time τ, which is slower than the present invention. Therefore, the method of the present invention may be used to display the first screen requiring fast rewriting, and the invention of the previous application may be used to maintain the screen thereafter. In this way, faster rewriting is possible according to the present invention. If the screen is maintained using the invention of the previous application, the display is refreshed every time, so that the contrast does not decrease even if the display of the same content is continued for a long time. Also,
If the same screen is maintained, there is no problem even if rewriting of the screen is slow.

[Effects of the Invention] According to the present invention, currently available TN type liquid crystal panel driving
Since a ferroelectric liquid crystal panel can be driven by a simple driving circuit using an LSI, there is no need to design and develop a new LSI, and the cost can be reduced.

In addition, since the correspondence between the bitmap data to be displayed and the IC control signal is good, the interface between the controller and the drive circuit is simplified, and the control procedure can be simplified.

Further, by providing a mode for erasing one screen at a time, the rewriting time of the screen can be short-circuited.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an example of a circuit for implementing the method of the present invention, FIG. 2 is a diagram of a ferroelectric liquid crystal panel, FIG. 3 is a diagram of a liquid crystal driving IC, and FIG. FIGS. 5A and 5B are diagrams showing the relationship between an input terminal selected by a combination of display data and an AC signal and an output voltage on the segment side and the common side, and FIGS. 5A and 5B and FIG. FIGS. 7A and 7B are diagrams for explaining the driving method 1 of the present invention, FIGS. 7A and 7B are diagrams for explaining the driving method 2 of the present invention, and FIGS. 9) (a) and (b) are diagrams for explaining the driving method 3 of the present invention, FIGS. 10 (a) and (b) are diagrams for explaining the driving method 4 of the present invention, and FIG. FIG. 12 is a circuit diagram according to an embodiment of the method of the present invention. FIG. 12 is a time chart for explaining the embodiment of the method of the present invention. It is a diagram illustrating a flicker preventing means. 1: Ferroelectric liquid crystal panel 2: Common drive IC 3: Segment drive IC 4: Controller

Continuation of the front page (58) Field surveyed (Int.Cl. ⁶ , DB name) G02F 1/133 G09G 3/18 G09G 3/36

Claims (7)

(57) [Claims] 1. A dot is ON when D = 1, and a dot is OF when D = 0.
One of the four input terminals is selected according to a combination of two digital control signals of display data D representing F and a liquid crystal drive output AC conversion signal M, and the voltage input to the input terminal is output. A liquid crystal driving IC that outputs to a terminal and drives the segment side of the liquid crystal panel is used. Further, display data D indicating selection of a scanning line when D = 1, non-selection of a scanning line when D = 0, and liquid crystal driving Output AC signal M
LCD driver IC that selects one of the four input terminals according to the combination of the two digital control signals, outputs the voltage input to that input terminal to the output terminal, and drives the common side of the LCD panel. A method for driving a ferroelectric liquid crystal panel by using a non-connected common electrode that is not connected to the ferroelectric liquid crystal panel, with a part of the common-side output electrode being selected. A method for driving a ferroelectric liquid crystal panel, wherein one screen of the ferroelectric liquid crystal panel is collectively erased. 2. At an adjacent time, the liquid crystal drive output AC signal M is changed from 0 to 0 on the common side in synchronization with the operation of changing the liquid crystal drive output AC signal M from 1 to 0 on the segment side. By changing it to 1, one screen of the ferroelectric liquid crystal panel is collectively erased. On the other hand, at adjacent times, the liquid crystal drive output AC signals M on the segment side and the common side are both synchronized to 0.
2. The method of driving a ferroelectric liquid crystal panel according to claim 1, wherein a desired dot is turned on by changing from "1" to "1". 3. At an adjacent time, in synchronism with the operation of changing the liquid crystal drive output AC signal M from 0 to 1 on the segment side, the liquid crystal drive output AC signal M is changed from 1 to 1 on the common side. By changing the value to 0, one screen of the ferroelectric liquid crystal panel is collectively erased. On the other hand, at adjacent times, the liquid crystal drive output AC signals M on the segment side and the common side are both synchronized to 1
2. The method of driving a ferroelectric liquid crystal panel according to claim 1, wherein a desired dot is turned on by changing from 0 to 0. 4. In a liquid crystal driving IC for driving a segment side, an input terminal selected when (D, M) = (1, 1) is set to an input terminal selected when V ₁ (1, 0). When the input terminal selected when the terminal is V ₂ (0, 1) is distinguished from the input terminal selected when V ₃ (0, 0) is V ₄ , the three-level liquid crystal drive voltage V _{s + , V 0, V s- (V} s +> V 0> V s-)
_Are assigned as V ₁ = V _{s +} , V ₂ = V _s- , V ₃ = V ₄ = V ₀ , and drive the segment side of the ferroelectric liquid crystal panel and further drive the common side In the IC for
The input terminal selected when (D, M) = (1, 1) is the input terminal selected when V ₂ (1, 0) is the input terminal selected when V ₁ (0, 1) When the input terminal selected when the terminal is V ₃ (0, 0) is distinguished from V ₄ , the two-level liquid crystal driving voltages V _{c +} , V _c− (V _{c +} > V _c− ) are represented by V ₁ = V _{3
= V c +, V 2 =} V 4 = V c- assigned ferroelectric driving method of a ferroelectric liquid crystal panel according to claim 2, wherein it has been characterized to drive the common side of the liquid crystal panel and so on. 5. In a liquid crystal driving IC for driving a segment side, an input terminal selected when (D, M) = (1, 1) is an input terminal selected when V ₁ (1, 0). When the input terminal selected when the terminal is V ₂ (0, 1) is distinguished from the input terminal selected when V ₃ (0, 0) is V ₄ , the three-level liquid crystal drive voltage V _{s + , V 0, V s- (V} s +> V 0> V s-)
_Are assigned as V ₁ = V _s- , V ₂ = V _{s +} , V ₃ = V ₄ = V ₀ , and drive the segment side of the ferroelectric liquid crystal panel and further drive the common side In the IC for
The input terminal selected when (D, M) = (1, 1) is the input terminal selected when V ₂ (1, 0) is the input terminal selected when V ₁ (0, 1) When the input terminal selected when the terminal is V ₃ (0, 0) is distinguished from V ₄ , the two-level liquid crystal driving voltages V _{c +} , V _c− (V _{c +} > V _c− ) are represented by V ₁ = V _{3
= V c-, V 2 = V} 4 = V c + allocation ferroelectric driving method of a ferroelectric liquid crystal panel as claimed in claim 3, wherein it has been characterized to drive the common side of the liquid crystal panel and so on. 6. In a liquid crystal driving IC for driving a segment side, an input terminal selected when (D, M) = (1, 1) is set to an input terminal selected when V ₁ (1, 0). When the input terminal selected when the terminal is V ₂ (0, 1) is distinguished from the input terminal selected when V ₃ (0, 0) is V ₄ , the four-level liquid crystal drive voltage V _{sh +} , V _sh- , V _{sl +} , V _sl- (V _{sh +} >
V _{sl +} > V _sl− > V _sh− ), V ₁ = V _{sh +} , V ₂ = V _sh− , V ₃ =
V _{sl +} , V ₄ = V _sl- are assigned as follows to drive the segment side of the ferroelectric liquid crystal panel and further drive the common side in a liquid crystal drive IC.
The terminal selected when (D, M) = (1, 1) is the terminal selected when V ₂ (1, 0), and the terminal selected when V ₁ (0, 1) is V ₃ When the terminal selected at (0, 0) is distinguished from V ₄ , the four-level liquid crystal drive voltages V _{ch +} , V _ch- , V _{cl +} , V _cl- (V _{ch +} >
The _{V cl +> V cl-> V} ch-), V 1 = V cl +, V 2 = V cl-, V 3 =
3. The method of driving a ferroelectric liquid crystal panel according to claim 2, wherein the common side of the ferroelectric liquid crystal panel is driven by assigning V _{ch +} and V ₄ = V _ch- . 7. In a liquid crystal driving IC for driving a segment side, an input terminal selected when (D, M) = (1, 1) is set to an input terminal selected when V ₁ (1, 0). When the input terminal selected when the terminal is V ₂ (0, 1) is distinguished from the input terminal selected when V ₃ (0, 0) is V ₄ , the four-level liquid crystal drive voltage V _{sh +} , V _sh- , V _{sl +} , V _sl- (V _{sh +} >
V _{sl +} > V _sl− > V _sh− ), V ₁ = V _sh− , V ₂ = V _{sh +} , V ₃ =
V _sl- and V ₄ = V _{sl +} are assigned as follows to drive the segment side of the ferroelectric liquid crystal panel and further drive the common side.
The terminal selected when (D, M) = (1, 1) is the terminal selected when V ₂ (1, 0), and the terminal selected when V ₁ (0, 1) is V ₃ When the terminal selected at (0, 0) is distinguished from V ₄ , the four-level liquid crystal drive voltages V _{ch +} , V _ch- , V _{cl +} , V _cl- (V _{ch +} >
V _{cl +} > V _cl- > V _ch- ), V ₁ = V _cl- , V ₂ = V _{cl +} , V ₃ =
_{4. The} method for driving a ferroelectric liquid crystal panel according to claim 3, wherein the common side of the ferroelectric liquid crystal panel is driven by assigning V _ch- and V ₄ = V _{ch +} .