JP2806123B2 - Delay effector - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a delay effector suitable for use in an electric musical instrument such as an electric guitar or an electronic musical instrument such as a synthesizer.

[0002]

2. Description of the Related Art As is well known, as an effector connected to an electric musical instrument such as an electric guitar, there is known a delay effector that delays a sounding timing by performing a delay process on an input musical sound signal.
For example, a foot switch or the like may be used to specify the delay time given by the delay effector, that is, the delay time. In this case, the player specifies the delay time by the interval of stepping on a foot switch or the like (hereinafter, this is referred to as a tap operation). Thus, when the player performs a tap operation in accordance with, for example, the tempo of the sequencer performing the automatic performance, the delay effector can give a desired delay effect that matches the tempo of the automatic performance.

[0003]

In the above-described conventional delay effector, the tap operation interval is directly specified as the delay time. Therefore,
When such a tap operation is performed during an automatic performance, a delay time according to the player's feeling is specified. For this reason,
The delay effect is not always added in synchronization with the performance tempo, and there is a problem that the actual performance tempo is shifted.

[0004] The present invention has been made under such a background, and an object of the present invention is to provide a delay effector capable of giving a delay effect accurately synchronized with a performance tempo.

[0005]

SUMMARY OF THE INVENTION The present invention, in order to solve the problems described above, an operation element for taking time signature, generates a beat signal every time steering Sakuko is operated input means, detecting means for <br/> detects a time interval during which time signature signal is supplied as a beat interval, and tempo information generating means for generating a tempo information, a plurality of types notes based on tempo information basic calculation means for exiting calculate the length between time, a note duration of a plurality of types
Approximate the beat interval as a unit and calculate the approximate beat interval
Input the approximation means to be performed and the delay amount equivalent to the approximate beat interval.
And a delay means for giving a given tone signal.

[0006]

According to the above Symbol Configuration [action], taking the time signature player's operator, the input unit generates a beat signal detection means detects the time signature interval. When the tempo information generating means outputs the tempo information, calculating means based on the tempo information
Te is calculated between length when notes of a plurality of types, approximating means a plurality of types
An approximation of the time signature spacing between length when note as a basic unit.
Then , the delay means inputs a delay amount corresponding to the approximate beat interval.
Since it is applied to the input tone signal, a delay synchronized with the performance tempo can be applied to the tone signal.

[0007]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing a configuration of one embodiment of the present invention. In FIG. 1, reference numeral 1 denotes a CPU which controls each unit of the apparatus connected via the bus 14, and the operation thereof will be described later. 2 is a ROM for storing various control programs loaded by the CPU 1,
Reference numeral 3 denotes a RAM which is used as a work area of the CPU 1 and stores various register values and calculation results. Reference numeral 4 denotes a foot switch that outputs an on / off signal in accordance with a tap operation, and is connected to the bus 14 via a foot switch interface 5. The player specifies the delay time by tapping the foot switch 4.
Reference numeral 6 denotes a panel switch on which various switch groups shown in FIG. 2 are arranged, and outputs an operation signal according to each switch operation. The panel switch 6 is connected to a bus 14 via a panel switch interface 7.

Here, referring to FIG.
Will be described. In this figure, 6a is a tempo setting dial. This tempo setting dial 6a
Sets the tempo clock CK output from the timer 8 (described later) to a desired tempo. The tempo clock CK is supplied to an automatic performance device (not shown), which specifies the performance tempo of the automatic performance. 6b is a start / stop switch,
This is for instructing start and stop of the automatic performance by the automatic performance device. An effect selection switch group 6c is for instructing the application of various effects such as reverb and vibrato in addition to the delay effect. Reference numeral 6d denotes a panel display unit composed of, for example, an LCD (Liquid Crystal Display), and displays a performance tempo by musical note symbols.

Returning to FIG. 1, the configuration of the embodiment will be described. In FIG. 1, a timer 8 generates two types of clocks, and these clocks are supplied to the CPU 1. The first clock output from the timer 8 is a tempo clock CK, which is the basis of the performance tempo of the automatic performance device, while the second clock applies a timer interrupt (described later) to the CPU 1. This is a clock indicating timing. Reference numeral 9 denotes an A / D (analog / digital) converter, which converts a tone waveform analog signal supplied from the outside into a digital signal, and converts the digital signal into a delay signal.
Output to AM11. The delay RAM 11 is a shift register in which digital signals of the musical tone waveform supplied from the A / D converter 9 are sequentially written, and the read address thereof is controlled by the CPU according to the delay value. As a result, a digital signal of a musical tone waveform delayed by a time corresponding to the delay value is output from the delay RAM 11. Reference numeral 12 denotes a D / A (digital / analog) converter, which converts the digital signal of the tone waveform output from the delay RAM 11 after the delay processing into an analog signal. 1
3 is a sound system. This sound system 1
Reference numeral 3 applies a sound effect processing and a filtering for removing noise to the analog signal after the delay processing supplied from the D / A converter 12, and then amplifies the filtered analog signal to sound it from the speaker SP.

Next, the operation of the embodiment having the above configuration will be described with reference to flowcharts shown in FIGS.
First, when the power is turned on, the CPU 1 loads a control program stored in the ROM 2. As a result, FIG.
Is started, and the processing of the CPU 1 proceeds to step Sa1. In step Sa1, resetting of various registers and the like, or mask processing for prohibiting a timer interrupt described later is performed. Next, when proceeding to step Sa2, a panel processing routine described later is called. In this panel processing routine, a switch group of the panel switch 6 is scanned, and a corresponding register value and the like are set according to these setting states. Next, in step Sa3, the automatic performance device performs an automatic performance at a performance tempo corresponding to the set value of the tempo setting dial 6a. However, the automatic performance is performed only when the start / stop switch 6b is set to the start state. Then, the process proceeds to Step Sa4 to call a delay time setting routine described later. Here, a tap operation interval by the player is measured, a predetermined rounding process to be described later is performed on the interval, and the readout address of the delay RAM 11 is controlled using this as a delay value. Here, the tap operation interval, that is, the time interval of the depressing operation of the foot switch 4 is measured by a counting operation when a timer interrupt routine to be described later is started at regular intervals (10 ms in the present embodiment). The tone signal supplied from the outside is subjected to delay processing in the delay RAM 11 in accordance with the delay value obtained by rounding the tap operation interval, and then sent to the sound system 13.
Sound is generated from the speaker SP. Then, the process returns to step Sa2 again, and thereafter, steps Sa2 to Sa4 are repeated.

Now, in the above main routine,
When the processing of the CPU 1 proceeds to step Sa2 described above, FIG.
Is started, and a step Sb1 is executed.
Proceed to. First, in step Sb1, the above-mentioned start /
It is determined whether or not the stop switch 6b has been operated, that is, whether or not an event has been detected on the start / stop switch 6b. Here, if the start / stop switch 6b is not operated, no event is detected, the result of this determination is "No", and the process proceeds to the event detection processing of the tempo setting dial 6a in step Sb6 described later.

On the other hand, a start / stop switch 6b
Is operated, an event is detected and step Sb1 is performed.
Is "Yes", and the process proceeds to the next Step Sb2. In step Sb2, the automatic performance flag APF indicating the execution / stop state of the automatic performance is inverted from the current setting state. Then, in a step Sb3, it is determined whether or not the automatic performance is set to the execution state, that is, whether or not the automatic performance flag APF is "1". If the result of this determination is "Yes", the operation proceeds to step Sb4, where the tempo clock CK is supplied to the automatic performance device, and the automatic performance that has been stopped so far is started. On the other hand, if the determination result is "No", the process proceeds to step Sb5, where the supply of the tempo clock CK to the automatic performance device is stopped, and the automatic performance that has been executed so far is stopped.

Next, in step Sb6, it is determined whether or not the tempo setting dial 6a has been operated, that is, whether or not an event has been detected on the tempo setting dial 6a. Here, when the tempo setting dial 6a is operated,
An event is detected, and the determination result of step Sb6 is “Y
es ", and proceeds to the next step Sb7. Step S
In b7, a register TM for storing the set value of the performance tempo
The current set value is newly set to P, and the next step Sb
Proceed to 8. In step Sb8, the set value of the performance tempo stored in the register TMP is output to the timer 8.
Thereby, the timer 8 outputs the tempo clock CK at the tempo newly set with the tempo setting dial 6a. On the other hand, if the tempo setting dial 6a is not operated and no event is detected, the determination result is “No”, and the process directly proceeds to step Sb9.

In step Sb9, a panel process corresponding to another switch event is performed in the switch group of the panel switch 6. After the processing of this routine, C
The processing of PU1 returns to the main routine. Thus, in the panel processing routine, the start / stop of the automatic performance is controlled according to the start / stop switch event, and the value of the tempo clock CK is controlled according to the tempo setting dial event.

Now, in the aforementioned main routine,
When the processing of CPU 1 proceeds to step Sa4 described above, FIG.
Is started, and the process proceeds to step Sc1. First, in step Sc1, it is determined whether or not a tap operation has been performed by the player, that is, whether or not an event of the foot switch 4 (hereinafter referred to as a tap event) has been detected. Here, if a tap event is not detected, the result of this determination is “No”, and the process returns to the main routine without performing the processing of this routine.

On the other hand, when a tap operation is performed by the player,
When a tap event is detected, the result of the determination in step Sc1 is “Yes”, and the flow proceeds to the next step Sc2.
In step Sc2, it is determined whether or not the timer count flag TCF is "0". This timer count flag T
The CF is a flag that is inverted by a tap operation, and is set to “1” when the tap interval is being counted, and is set to “0” when the tap interval is not being counted. Then, in this case, since the tap interval has not yet been counted and the timer count flag TCF is “0”, the determination result here is “Yes”, and the process proceeds to step Sc3. In step Sc3, the timer count flag TCF is inverted to "1", and the tap interval is being measured. Next, when the flow proceeds to step Sc4, the count register CR (described later) that stores the time value of the tap interval is reset to “0”, and the flow proceeds to the next step Sc5. In step Sc5, the timer interrupt mask described later is released, and the timer interrupt is started. As a result, the timer interrupt routine is activated every 10 ms, thereby measuring the time interval until the next tap operation is performed. Then, the processing of this routine is completed, and the process returns to the main routine.

For example, if the next tap operation is performed, the processing of the CPU 1 proceeds to step Sc2 of the above-described delay time setting routine again. In this case, since the timer count flag TCF is "1", the determination result here is "No", and the process proceeds to Step Sc6. In step Sc6, the timer interrupt is masked again, and the counting of the tap interval ends. Then, the process proceeds to step Sc7. In step Sc7, the timer count flag TCF is inverted to “0”, so that the tap interval is not being counted, and the process proceeds to the next step Sc8. In step Sc8, the time value in units of 10 ms stored in the count register CR is multiplied by 100,
The value is converted to a value in units of [0.1 ms]. Then, the unit-converted value is set in the register TCT.

Next, in step Sc9, it is determined whether or not the automatic performance flag APF is "1". Here, when the automatic performance is being executed, the determination result is “Yes”, and the process proceeds to step Sc10. In step Sc10, the time length of each note (hereinafter referred to as note length) is calculated in accordance with the performance tempo set value set in step Sb7 described above. Here, the note length of each note is given by the following equations (1) to (6) using the performance tempo set value set in the register TMP. T1 = 2400000 / TMP [0.1 ms] (1) (T1: note length of a whole note) T2 = 12000 / TMP [0.1 ms] (2) ( T2: note length of a half note) T4 = 600000 / TMP [0.1 ms] (3) (T4: note length of a quarter note) T8 = 300000 / TMP [0.1 ms] (4) (T8: note length of eighth note) T16 = 150,000 / TMP [0.1 ms] (5) (T16: note length of 16th note) T32 = 75000 / TMP [0.1 ms] (6) (T32: note length of 32nd note) In the above-described equations (1) to (6), TMP is 1
Shows the number of beats per minute. The time signature is four.

Next, at step Sc11, a rounding processing routine is called. This rounding process routine approximates the closest note length of each note calculated according to the performance tempo setting value. That is, as shown in FIG. 8, each note length shown in the time scale TS1 is associated with a tap interval shown in the time scale TS2. In this figure, each note length indicated on the time scale TS1 is calculated according to the above-described equations (1) to (5), and is a sixteenth note T1 from the reference 0.
.., And represent the note length of the whole note T1. On the other hand, the time scale TS2 is the range T of the tap interval.
, TP8.

Here, each processing step of the CPU 1 in the rounding processing routine shown in FIG. 6 will be described with reference to FIG. First, in step Sd1, it is determined whether or not the value of the register TCT is within the range TP1. That is, when TCT ≦ T16 + T32, step Sd
Then, the process proceeds to step 9 to specify a read address of the delay RAM 11 according to the note length of the sixteenth note (T16). Otherwise, the process proceeds to the next step Sd2. In step Sd2, the value of the register TCT is
It is determined whether it is within the range of P2. That is, T1
If 6 + T32 <TCT ≦ T8 + T32, the process proceeds to step Sd10, where a read address of the delay RAM 11 is specified according to the note length of the eighth note (T8). Otherwise, the process proceeds to the next step Sd3. In step Sd3, the value of the register TCT is
It is determined whether it is within the range of P3. That is, T8
When + T32 <TCT ≦ T8 + T16 + T32,
Proceeding to step Sd11, the note length (T8
+ T16), the read address of the delay RAM 11 is specified. Otherwise, the next step Sd4
Proceed to. In step Sd4, the value of the register TCT is
It is determined whether it is within the range of P4. That is, T8
+ T16 + T32 <TCT ≦ T4 + T16,
Proceeding to step Sd12, the read address of the delay RAM 11 is specified according to the note length of the quarter note (T4). Otherwise, the process proceeds to the next step Sd5. In step Sd5, the value of the register TCT is
It is determined whether it is within the range of P5. That is, T4
If + T16 <TCT ≦ T4 + T8 + T16, the process proceeds to step Sd13, where the note length of the note at quarter note (T4 +
The read address of the delay RAM 11 is specified according to T8). Otherwise, the process proceeds to the next step Sd6. In step Sd6, the value of the register TCT is
It is determined whether it is within the range of P6. That is, T4
If + T8 + T16 <TCT ≦ T2 + T8, the process proceeds to step Sd14, and the read address of the delay RAM 11 is designated according to the note length of the half note (T2).
Otherwise, the process proceeds to the next step Sd7. In step Sd7, the value of the register TCT is
It is determined whether it is within the range of P7. That is, T2
If + T8 <TCT ≦ T2 + T4 + T8, the process proceeds to step Sd15, where the note length of the half-note (T2 + T
The read address of the delay RAM 11 is specified according to 4). Otherwise, the process proceeds to the next step Sd8. In step Sd8, the value of the register TCT is
Since the range of P8, that is, TCT> T2 + T4 + T8, in this case, the read address of the delay RAM 11 is specified according to the note length (T1) of the whole note.

Thus, the delay RAM 11 performs a delay process on the supplied tone signal in accordance with a delay value obtained by rounding the tap interval to a note length. When the rounding processing routine described above ends, the processing of the CPU 1 returns to the delay time setting routine, and further returns to the main routine.

On the other hand, in step Sc9 described above,
If the automatic performance is stopped, the result of the determination is "No", and the process proceeds to step Sc12. Step S
In c12, in this case, since the tempo clock CK is not supplied by the timer 8, the value of the register TCT is directly used as the delay value, and the delay RA is set in accordance with the delay value.
Specify the read address of M11. Then, the processing of this routine is completed, and the process returns to the main routine.

Next, a timer interrupt routine for measuring the tap interval will be described. This timer interrupt routine is started by a timer interrupt signal supplied from the timer 8 every 10 ms. As described above, such a timer interrupt is released from the interrupt mask by the first tap operation (the processing in step Sc5), and is again masked by the next tap operation (the processing in step Sc6).

Now, the first tap operation is performed, and as described above, step Sc of the delay time setting routine is performed.
When the interrupt mask is released at 5 and a timer interrupt is applied, the timer interrupt routine shown in FIG.
The process of the CPU 1 proceeds to step Se1. First, in step Se1, the count value of the count register CR is incremented by "1". Next, when the process proceeds to step Se2, the value of the count register CR becomes the upper limit value “25”.
5 ", that is, whether or not the tap interval has timed out. Here, assuming that the count value of the count register CR has not reached the upper limit value “255”, the time is not over, and thus the determination result is “No”, and the process returns to the main routine. Then, the CPU 1 waits every 10 ms until the next tap operation is performed.
Is interrupted by a timer and count register CR
Are sequentially incremented. That is, the value of the count register CR is incremented by "1" every 10 ms, and the tap interval is counted.

Here, if the next tap operation is performed before the value of the count register CR reaches the upper limit value "255", an interrupt mask is applied in step Sc6 described above. As a result, the timing of the tap interval ends,
The tap interval is not counted until the interrupt mask is released by the next tap operation.

On the other hand, if the tap interval is long and the count value of the count register CR has reached the upper limit value "255", the result of the determination in step Se2 is "Yes", and the flow proceeds to step Se3. In step Se3, the timer interrupt is masked, and the timing of the tap interval is forcibly terminated. Then, the process proceeds to the next step Se4, in which the timer count flag TCF is inverted to “0” to indicate a state in which the tap interval is not measured. Next, when the process proceeds to step Se5, the upper limit value “255” of the count register CR is increased by 100.
And convert the value to a value in units of [0.1 ms], and set the converted value “25500” in the register TCT.
Then, in step Se6, the value “25500” set in the register TCT is used as a delay value in the RAM.
Then, the process of this routine is terminated and the process returns to the main routine. As described above, when the tap interval is long and exceeds the upper limit, the time is over, and a delay effect having a delay length equivalent to 2550 ms is uniquely provided.

In the rounding process of the above-described embodiment, the tap interval is always approximated by the nearest note length. However, when the measured tap interval is in the middle of the note length to be approximated, For example, when the tap interval is between the sixteenth note and the eighth note, the time measurement time may be used as the delay value without forcibly rounding. Further, in the present embodiment, the maximum delay value to be approximated is a whole note, but a time longer than two measures or three measures may be determined as the maximum value instead. On the other hand, the minimum delay value to be approximated may be set to a note finer than a sixteenth note. Alternatively, the resolution at the time of such rounding may be appropriately selected.
Further, in the present embodiment, the shift register is used as a means for realizing the delay.
P (digital sound processor) may be used. In the present embodiment, the rounding process is performed so as to synchronize with the tempo clock CK output from the timer 8, but the present invention is not limited to this. For example, the rounding process may be synchronized with an automatic accompaniment device or a metronome. Alternatively, it may be synchronized with a MIDI clock signal supplied from the outside. Further, in the present embodiment, the foot switch 4 is used as an operator for generating a time interval, but the present invention is not limited to this, and another operator may be used.

Further, in the present embodiment, the delay processing is performed on the analog input waveform supplied from the outside. However, the present invention is not limited to this. A delay process may be performed on a digital musical tone signal generated according to the performance.

[0029]

As described above, according to the present invention, an input means for generating a beat signal every time an operator is operated.
A stage, a detecting means for <br/> detecting a time interval that is beat signal is supplied as a beat interval calculating means for de San between length when a plurality of types of <br/> notes based on tempo information , Multiple types of note time
Approximate the time interval using the length as the basic unit , and
Approximation means for calculating the interval, and delay corresponding to the approximate beat interval
Delay means for giving the amount to the input tone signal, the delay time of the delay effect is based on the performance tempo.
Ku between length when notes of a plurality of kinds becomes time length of a basic unit, it is possible to provide an optimum delay corresponding to the tempo to the musical tone signal. In addition, since the player does not need to operate the operator such as the foot switch to exactly match the performance tempo, the effect of reducing the operation load can be obtained.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of an embodiment of the present invention.

FIG. 2 is a block diagram showing an external configuration of the panel switch 6 of the embodiment.

FIG. 3 is a flowchart showing a main routine of a program executed by a CPU 1 of the embodiment.

FIG. 4 is a flowchart showing a panel processing routine of a program executed by a CPU 1 of the embodiment.

FIG. 5 is a flowchart showing a delay time setting routine of a program executed by the CPU 1 of the embodiment.

FIG. 6 is a flowchart showing a program rounding processing routine executed by the CPU 1 of the embodiment.

FIG. 7 is a flowchart showing a timer interrupt routine of a program executed by the CPU 1 of the embodiment.

FIG. 8 is a diagram showing a rounding process of the embodiment on a time scale.

[Explanation of symbols]

1 CPU CPU 2 ROM 3 RAM 4 Foot switch 5 Foot switch interface 6 Panel switch 6 a Tempo setting dial 6 b Start / stop switch , 6c ...
Effect selection switch group 7 Panel switch interface 8 Timer 9 A / D converter 1
1 ... Delay RAM, 12 ... D / A converter, 13 ...
… Sound system

Claims (1)

(57) [Claims] [Claim 1 further comprising a manipulator for taking time signature, generates a beat signal every time steering Sakuko is operated input means (4)
If, detecting means for detecting a time interval during which time signature signal is supplied as a beat interval (Sc1 - Sc8) and, tempo information generating means for generating a tempo information (8), a plurality based on the tempo information and calculating means for de San between length when note type (Sc10), the approximation of the time signature interval notes the time length of a plurality of types as the basic unit
Approximating means (Sc11) for calculating the approximate beat interval
And a delay means (11) for giving a delay amount corresponding to the approximate time interval to an input musical sound signal.