JP2797839B2 - Semiconductor substrate surface treatment equipment - Google Patents

Semiconductor substrate surface treatment equipment

Info

Publication number
JP2797839B2
JP2797839B2 JP14668492A JP14668492A JP2797839B2 JP 2797839 B2 JP2797839 B2 JP 2797839B2 JP 14668492 A JP14668492 A JP 14668492A JP 14668492 A JP14668492 A JP 14668492A JP 2797839 B2 JP2797839 B2 JP 2797839B2
Authority
JP
Japan
Prior art keywords
semiconductor substrate
hmds
processing unit
decompression
surface treatment
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP14668492A
Other languages
Japanese (ja)
Other versions
JPH05315233A (en
Inventor
教博 中嶋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP14668492A priority Critical patent/JP2797839B2/en
Publication of JPH05315233A publication Critical patent/JPH05315233A/en
Application granted granted Critical
Publication of JP2797839B2 publication Critical patent/JP2797839B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、半導体集積回路などの
パターンを半導体基板上に形成する上でホトレジストを
塗布する前の処理を行う半導体基板表面処理装置に関す
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor substrate surface treatment apparatus for performing a process before forming a photoresist on a pattern of a semiconductor integrated circuit or the like on a semiconductor substrate.

【0002】[0002]

【従来の技術】半導体集積回路の製造において、ホトレ
ジストを塗布する前の処理として行うHMDS処理は、
ホトレジストと半導体基板との間の密着性を向上させる
ために行う処理で、レジストパターンを形成するための
露光後に行う現像、あるいはレジストパターンを形成し
た後、フッ酸水溶液に半導体基板を浸漬させて行うウェ
ットエッチングにおいてホトレジストと半導体基板との
間に水あるいは水溶液が浸入するのを防ぐために行われ
る。
2. Description of the Related Art In the manufacture of a semiconductor integrated circuit, HMDS processing performed as a processing before applying a photoresist is performed by:
In the process performed to improve the adhesion between the photoresist and the semiconductor substrate, the development is performed after exposure for forming a resist pattern, or after the resist pattern is formed, the semiconductor substrate is immersed in a hydrofluoric acid aqueous solution. This is performed in order to prevent water or an aqueous solution from entering between the photoresist and the semiconductor substrate in wet etching.

【0003】従来のHMDS処理装置は図3に示される
ように、室温から200℃まで温度制御可能なホットプ
レート11と、室温より高い温度(例えば80℃)でH
MDS処理を行うことが可能なように処理温度を一定に
保つための保温カバー14と、半導体基板12の全体を
カバーできる大きさでその下面に20〜50個の直径1
mm程度の穴が面内均等に設けられた円板からなる吹き
出し板13とから構成されており、プレート11上に載
置された半導体基板12の表面へHMDSを含有した窒
素(N2)ガスを吹き出し板13から供給されて処理さ
れる。
As shown in FIG. 3, a conventional HMDS processing apparatus includes a hot plate 11 capable of controlling the temperature from room temperature to 200 ° C., and a H plate at a temperature higher than room temperature (for example, 80 ° C.).
A heat insulating cover 14 for keeping the processing temperature constant so that the MDS processing can be performed, and 20 to 50 diameters 1 on the lower surface which are large enough to cover the entire semiconductor substrate 12.
and a blow-out plate 13 formed of a circular plate having holes in the order of mm in the plane. A nitrogen (N 2 ) gas containing HMDS is applied to the surface of the semiconductor substrate 12 placed on the plate 11. Is supplied from the blowing plate 13 and processed.

【0004】このHMDSを含有したN2ガスは、HM
DSをN2ガスでバブリングを行うバブラー16から配
管15を通じて吹き出し板13へ供給される。
The N 2 gas containing HMDS is HMDS
DS is supplied from a bubbler 16 for bubbling with N 2 gas to a blowing plate 13 through a pipe 15.

【0005】[0005]

【発明が解決しようとする課題】上述した従来のHMD
S処理では、半導体基板表面の水分除去を行わない状態
でHMDSを付着させた後、ホトレジストの塗布を行う
ため、基板表面に水分が付着している場合、ホトレジス
トと基板表面の間の密着力が弱くなる。特に、次式で示
すようにHMDSは水分と反応してヘキサメチレンジシ
ロキサンが生成する。
The above-mentioned conventional HMD
In the S treatment, after applying HMDS without removing moisture from the surface of the semiconductor substrate, the photoresist is applied. Therefore, when moisture is attached to the substrate surface, the adhesion between the photoresist and the substrate surface is reduced. become weak. In particular, as shown by the following formula, HMDS reacts with moisture to produce hexamethylenedisiloxane.

【0006】[0006]

【化1】 Embedded image

【0007】このヘキサメチレンジシロキサンが存在す
ると、ホトレジストと半導体基板表面の間の密着力が弱
まり、本来、ホトレジストと半導体基板との間の密着力
が強まり、ホトレジストが半導体基板からはがれるのを
防止するためのHMDS処理の効果がなくなり、ウェッ
トエッチング工程でのホトレジストの剥がれ、あるいは
サイドエッチ量の増大が起こり、半導体回路のパターン
が不完全に作成されたり、設計寸法より細く回路パター
ンが作成され、製品の歩留りの低下を招くという欠点が
ある。
The presence of the hexamethylene disiloxane weakens the adhesion between the photoresist and the surface of the semiconductor substrate, and increases the adhesion between the photoresist and the semiconductor substrate, thereby preventing the photoresist from peeling off the semiconductor substrate. The effect of the HMDS process is lost, the photoresist is peeled off in the wet etching process, or the amount of side etching is increased, and the pattern of the semiconductor circuit is incompletely formed, or the circuit pattern is thinner than the design size, and the product is manufactured. Disadvantageously lowers the yield.

【0008】本発明の目的は、ホトレジストと半導体基
板との密着力を強めた半導体基板表面処理装置を提供す
ることにある。
An object of the present invention is to provide a semiconductor substrate surface treatment apparatus in which the adhesion between a photoresist and a semiconductor substrate is enhanced.

【0009】[0009]

【課題を解決するための手段】前記目的を達成するた
め、本発明に係る半導体基板表面処理装置は、減圧処理
ユニットと、HMDS処理ユニットとを有し、ホトレジ
ストを塗布する前段階で半導体基板の表面処理を行う半
導体基板表面処理装置であって、減圧ユニットは、半導
体基板表面の水分を減圧除去するものであり、HMDS
処理ユニットは、水分が減圧除去された基板表面にHM
DS(ヘキサメチレンジシラザン)のコーティング処理
を行うものである。
In order to achieve the above object, a semiconductor substrate surface treatment apparatus according to the present invention has a reduced pressure processing unit and an HMDS processing unit, and the semiconductor substrate surface treatment apparatus is applied before a photoresist is applied. A semiconductor substrate surface treatment apparatus for performing a surface treatment, wherein the pressure reducing unit removes moisture on the surface of the semiconductor substrate under reduced pressure.
The processing unit applies HM to the surface of the substrate from which the moisture has been removed under reduced pressure.
The coating treatment of DS (hexamethylene disilazane) is performed.

【0010】[0010]

【作用】半導体基板表面の水分を除去した後、基板表面
にHMDS(ヘキサメチレンジシラザン)のコーティン
グ処理を行う。
After the moisture on the surface of the semiconductor substrate is removed, a coating process of HMDS (hexamethylene disilazane) is performed on the substrate surface.

【0011】[0011]

【実施例】以下、本発明の実施例を図により説明する。DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below with reference to the drawings.

【0012】(実施例1)図1は、本発明の実施例1を
示す構成図である。
(Embodiment 1) FIG. 1 is a configuration diagram showing Embodiment 1 of the present invention.

【0013】図1において、本実施例に係る基板表面処
理装置は、減圧処理ユニットAと、HMDS処理ユニッ
トとを有している。
In FIG. 1, the substrate surface treating apparatus according to the present embodiment has a decompression processing unit A and an HMDS processing unit.

【0014】減圧処理ユニットAは、減圧室を構成する
減圧槽ベース部18及び減圧槽上蓋17と、減圧室内に
半導体基板12を支持するプレート11Aと、減圧室内
を排気する真空ポンプ19とから構成されている。
The decompression processing unit A comprises a decompression tank base portion 18 and a decompression tank upper lid 17 constituting a decompression chamber, a plate 11A for supporting the semiconductor substrate 12 in the decompression chamber, and a vacuum pump 19 for evacuating the decompression chamber. Have been.

【0015】HMDS処理ユニットBは、室温から20
0℃まで温度制御可能なプレート11Aと、室温より高
い温度(例えば80℃)でHMDS処理を行うことが可
能なように処理温度を一定に保つための保温カバー14
と、半導体基板12の全体をカバーできる大きさでその
下面に20〜50個の直径1mm程度の穴が面内均等に
設けられた円板からなる吹き出し板13とから構成され
ている。
[0015] The HMDS processing unit B has a
A plate 11A whose temperature can be controlled to 0 ° C., and a heat insulating cover 14 for keeping the processing temperature constant so that HMDS processing can be performed at a temperature higher than room temperature (for example, 80 ° C.).
And a blow-out plate 13 made of a disk having a size enough to cover the entire semiconductor substrate 12 and having 20 to 50 holes of about 1 mm in diameter provided on the lower surface thereof evenly in the plane.

【0016】実施例において、プレート11A上に半導
体基板12を載置させ、上下動する減圧槽の上蓋17が
下降し、減圧槽が密閉される。そして、約60mmHg
の真空度で1分間減圧処理を行う。この減圧処理によ
り、半導体基板12表面の水分を除去する。
In the embodiment, the semiconductor substrate 12 is placed on the plate 11A, and the upper lid 17 which moves up and down is lowered, so that the vacuum tank is sealed. And about 60mmHg
The vacuum treatment is performed at a vacuum degree of 1 minute. By this decompression treatment, moisture on the surface of the semiconductor substrate 12 is removed.

【0017】減圧処理ユニットAで半導体基板12に減
圧処理を行ったのち、減圧処理ユニットAに隣接したH
MDS処理を行うHMDS処理ユニットBに搬送する。
HMDS処理ユニットBのプレート11上に半導体基板
12を載置させ、半導体基板12表面へHMDSを含有
したN2ガスを吹き出し板13から吹き出させ、半導体
基板12の表面にHMDSを付着させる処理を行う。
After the semiconductor substrate 12 is subjected to decompression processing by the decompression processing unit A, H
It is transported to the HMDS processing unit B which performs MDS processing.
A process is performed in which the semiconductor substrate 12 is placed on the plate 11 of the HMDS processing unit B, and N 2 gas containing HMDS is blown out from the blowing plate 13 to the surface of the semiconductor substrate 12 to adhere HMDS to the surface of the semiconductor substrate 12. .

【0018】プレート11は室温から200℃まで温度
制御可能なものを用い、半導体基板の状態等により処理
を室温又は、加熱された状態で行う。
The plate 11 is a plate whose temperature can be controlled from room temperature to 200 ° C., and the processing is performed at room temperature or in a heated state depending on the state of the semiconductor substrate.

【0019】また、減圧処理の真空度及び減圧処理の時
間,減圧の速度については、特に制限はない。
There are no particular restrictions on the degree of vacuum in the decompression process, the time for the decompression process, and the speed of the decompression.

【0020】(実施例2)図2は、本発明の実施例2を
示す構成図である。
(Embodiment 2) FIG. 2 is a configuration diagram showing Embodiment 2 of the present invention.

【0021】本実施例の実施例1との相違点は、減圧処
理ユニットAのヒーター付プレート11Bに室温から2
00℃までの温度制御可能なものを用い、半導体基板の
状態等により、処理を室温又は加熱された状態で行うこ
とができることである。以下、動作と共に説明する。
The difference between this embodiment and the first embodiment is that the heater-equipped plate 11B of the decompression processing unit A is heated from room temperature to 2
The processing can be performed at room temperature or in a heated state, depending on the state of the semiconductor substrate or the like, using a material capable of controlling the temperature up to 00 ° C. The operation will be described below together with the operation.

【0022】減圧処理ユニットAに、半導体基板12を
80℃に加熱されたプレート11B上に載置し、上下動
する減圧槽の上蓋17が下降し、減圧槽が密閉され、約
60mmHgの真空度で30秒間減圧処理を行う。この
減圧処理により半導体基板12表面の水分を除去する。
The semiconductor substrate 12 is placed on the plate 11B heated to 80 ° C. in the decompression processing unit A, and the upper cover 17 which moves up and down is lowered, the decompression tank is closed, and the vacuum degree is reduced to about 60 mmHg. For 30 seconds. By this decompression treatment, moisture on the surface of the semiconductor substrate 12 is removed.

【0023】この減圧処理を行った後、半導体基板12
をHMDS処理ユニットBに搬送させ、半導体基板12
の表面にHMDS処理を行う。このHMDS処理ユニッ
トBでの処理は、実施例1と全く同じである。
After performing the decompression process, the semiconductor substrate 12
Is transported to the HMDS processing unit B, and the semiconductor substrate 12
Is subjected to HMDS treatment. The processing in the HMDS processing unit B is exactly the same as in the first embodiment.

【0024】また、減圧処理の真空度及び減圧処理の時
間,減圧の速度については、特に制限はない。
There is no particular limitation on the degree of vacuum in the decompression process, the time for the decompression process, and the speed of the decompression.

【0025】本実施例では、減圧処理を室温より高い温
度で加熱しながら行うため、半導体基板12表面の水分
を除去するのに短時間で効率的に行えるという利点があ
る。
In the present embodiment, since the decompression treatment is performed while heating at a temperature higher than room temperature, there is an advantage that the water on the surface of the semiconductor substrate 12 can be efficiently removed in a short time.

【0026】[0026]

【発明の効果】以上説明したように本発明は、減圧処理
ユニットで半導体基板表面の水分を減圧除去させた後、
HMDS処理ユニットで半導体基板表面にHMDSを付
着させるので、半導体基板表面とホトレジストとの間に
ウェットエッチング工程に対して十分な密着力をもたせ
ることができ、図4に示すようにウェットエッチング時
のサイドエッチ量を小さくすることができるという効果
がある。
As described above, according to the present invention, after the water on the semiconductor substrate surface is removed under reduced pressure by the reduced pressure processing unit,
Since HMDS is adhered to the surface of the semiconductor substrate by the HMDS processing unit, a sufficient adhesive force can be provided between the surface of the semiconductor substrate and the photoresist in the wet etching process, and as shown in FIG. There is an effect that the etch amount can be reduced.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の実施例1を示す構成図である。FIG. 1 is a configuration diagram showing a first embodiment of the present invention.

【図2】本発明の実施例2を示す構成図である。FIG. 2 is a configuration diagram showing a second embodiment of the present invention.

【図3】従来の半導体基板表面処理装置を示す構成図で
ある。
FIG. 3 is a configuration diagram showing a conventional semiconductor substrate surface treatment apparatus.

【図4】本発明の半導体基板表面処理装置と従来の半導
体基板表面処理装置とのウェットエッチングにおけるサ
イドエッチ量を比較した図である。
FIG. 4 is a diagram comparing a side etch amount in wet etching between a semiconductor substrate surface treatment apparatus of the present invention and a conventional semiconductor substrate surface treatment apparatus.

【符号の説明】[Explanation of symbols]

A 減圧処理ユニット B 減圧処理ユニット 11,11A プレート 11B プレート(ヒーター付) 12 半導体基板 13 吹き出し板 14 保温カバー 15 配管 16 バブラー 17 減圧槽の上蓋 18 減圧槽ベース部 19 真空ポンプ A decompression processing unit B decompression processing unit 11, 11A plate 11B plate (with heater) 12 semiconductor substrate 13 blowout plate 14 heat retaining cover 15 pipe 16 bubbler 17 decompression tank top lid 18 decompression tank base 19 vacuum pump

───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.6,DB名) H01L 21/027 G03F 7/16──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. 6 , DB name) H01L 21/027 G03F 7/16

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 減圧処理ユニットと、HMDS処理ユニ
ットとを有し、ホトレジストを塗布する前段階で半導体
基板の表面処理を行う半導体基板表面処理装置であっ
て、 減圧ユニットは、半導体基板表面の水分を減圧除去する
ものであり、 HMDS処理ユニットは、水分が減圧除去された基板表
面にHMDS(ヘキサメチレンジシラザン)のコーティ
ング処理を行うものであることを特徴とする半導体基板
表面処理装置。
1. A semiconductor substrate surface treatment apparatus having a reduced pressure processing unit and an HMDS processing unit for performing a surface treatment of a semiconductor substrate before applying a photoresist, wherein the reduced pressure unit is configured to remove water from a surface of the semiconductor substrate. Wherein the HMDS processing unit performs a coating process of HMDS (hexamethylene disilazane) on the substrate surface from which water has been removed under reduced pressure.
JP14668492A 1992-05-12 1992-05-12 Semiconductor substrate surface treatment equipment Expired - Lifetime JP2797839B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14668492A JP2797839B2 (en) 1992-05-12 1992-05-12 Semiconductor substrate surface treatment equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14668492A JP2797839B2 (en) 1992-05-12 1992-05-12 Semiconductor substrate surface treatment equipment

Publications (2)

Publication Number Publication Date
JPH05315233A JPH05315233A (en) 1993-11-26
JP2797839B2 true JP2797839B2 (en) 1998-09-17

Family

ID=15413251

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14668492A Expired - Lifetime JP2797839B2 (en) 1992-05-12 1992-05-12 Semiconductor substrate surface treatment equipment

Country Status (1)

Country Link
JP (1) JP2797839B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004103850A (en) 2002-09-10 2004-04-02 Fujitsu Ltd Method and device for applying resist
CN107130243A (en) * 2017-05-22 2017-09-05 昆山国显光电有限公司 A kind of wet method etching groove

Also Published As

Publication number Publication date
JPH05315233A (en) 1993-11-26

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