JP2790600B2 - Power converter - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an inverter for converting power from DC to AC, a converter for converting power from AC to DC, a three-level inverter, etc. More particularly, the present invention relates to a power conversion device that achieves downsizing, cost reduction, high efficiency, and improved reliability.

[0002]

2. Description of the Related Art FIG. 27 is a circuit diagram showing a conventional power converter including an inverter device to which a snubber circuit in which a loss due to a resistor is eliminated is applied. Such a power converter is disclosed in, for example, JC Bendien et al., 1985, in the form of an IEP.
EEE PESC) of the 165 pages-recovery circuit of snubber energy in power electronic applications with "high switching frequency and presented at the 170 pages (RECO
VERY CIRCUIT FOR SNUBBER
Euergy in Power Electroni
CS APPLICATIONS HIGH HIGH
SWITCHING FREQUENCIES) ".

In FIG. 27, 1a and 1b are, for example, IG
This is a self-extinguishing type semiconductor device including a BT, a GTO thyristor, and the like. Here, a case of a GTO thyristor (hereinafter, simply referred to as GTO) will be described as an example. 2a, 2
b denotes a freewheel diode connected in anti-parallel to the GTOs 1a and 1b, and A denotes an output terminal provided at a connection point between the GTO1a and the GTO1b.

Reference numeral 3 denotes a snubber diode connected in parallel to the GTO 1a, and 4 denotes a snubber capacitor connected in series to the snubber diode 3. The snubber diode and the snubber capacitor 4 constitute a snubber circuit for the GTO 1a. Reference numeral 5 denotes a reactor connected in series to the GTO 1a.

Reference numeral 6 denotes a polarity diode connected to a connection point between the snubber diode 3 and the snubber capacitor 4, reference numeral 7 denotes a recovery capacitor connected in series to the polarity diode 6, and the other end connected to the GTO 1b. The energy stored in the reactor is recovered through the polar diode 6. The snubber capacitor 4, the polarity diode 6, and the recovery capacitor 7 constitute a snubber circuit for the GTO 1b.

Reference numeral 8 denotes a polarity diode 6 and a recovery capacitor 7
A power regenerative circuit connected to a connection point between the DC power source and a DC power source connected between both ends of a series circuit including the reactors 5 and GTO1a and 1b and between both ends of the power regenerative circuit 8;
N is a positive / negative bus of the DC power supply 9.

The power regeneration circuit 8 includes, for example, a reactor 10 and a diode 11 connected in series between both ends of a DC power supply 9, a connection point between the reactor 10 and the diode 11, a connection between the polarity diode 6 and the recovery capacitor 7. And a switching element 12 connected between the two points.

The recovery capacitor 7 recovers the energy stored in the reactor 5 and the snubber capacitor 4 by the switching operation of the GTO 1b,
The excess energy stored in the DC power supply 9 is regenerated by the power regeneration circuit 8.

FIG. 28 is a circuit diagram showing another example of a conventional power converter comprising an inverter device. Such a power converter is described, for example, in Japanese Patent Publication No. Sho 62-15023, "Snubber circuit". In FIG. 28, 1a, 1b, 2a, 2b, A, 7, 9 and P, N
Is the same as described above.

Reference numerals 3a and 4a denote snubber diodes and snubber capacitors connected in parallel to the GTO 1a.
A snubber circuit for O1a is configured. 3b, 4b
Is a snubber diode and a snubber capacitor connected in parallel to the GTO 1b, and constitutes a snubber circuit for the GTO 1b. Reference numerals 5a and 5b denote reactors connected in series to the GTOs 1a and 1b.
Is provided at a connection point between the reactor 5a and the reactor 5b.

The recovery capacitor 7 recovers the energy stored in the reactors 5a and 5b and the snubber capacitors 4a and 4b by the switching operation of the GTOs 1a and 1b. Reference numeral 13 denotes a power processing device connected between both ends of the recovery capacitor 7 and between both ends of the DC power supply 9. Although an illustration of a specific circuit is omitted, an inverter device using a snubber circuit in which loss due to a resistor is eliminated is applied. It is composed of

Next, a conventional configuration in which the power converter is a three-level inverter will be described. The basic configuration of a conventional three-level inverter device is disclosed in, for example,
No. 43996. In this case, a snubber circuit is required when a self-extinguishing type semiconductor element constituting a three-level inverter device, which has a restriction on a voltage increase rate and a current increase rate, for example, a GTO is applied.

FIG. 29 is a circuit diagram showing a conventional power conversion device comprising a three-level inverter device to which a snubber circuit eliminating a loss due to a resistor is applied. Such a power converter is described in, for example, Japanese Patent Application Laid-Open No. 1-198280, "Three-Point Inverter".

In FIG. 29, 1a, 1b, 2a, 2
b, 3a, 3b, 4a, 4b and 5a, 5b are the same as described above, and X, 6a, 6b, 7a, 7b, 8
a, 8b, 9a, and 9b correspond to the output terminal A, the polarity diode 6, the recovery capacitor 7, the power regeneration circuit 8, and the DC power supply 9, respectively.

1c and 1d are GTOs connected in series to the GTOs 1a and 1b, and 2c and 2d are freewheel diodes connected in parallel to the GTOs 1c and 1d. In addition, the recovery capacitors 7a and 7b are connected to the polarity diode 6
The stored energy of each anode reactor 5a, 5b is recovered via a, 6b.

In the case of such a power conversion device comprising a three-level inverter device, a symmetrical circuit having the same configuration is provided for each of the series DC power supplies 9a and 9b divided at the intermediate potential point C. That is, GTO1a, 1c
Constitutes a positive arm connected to the positive bus P, and GTO
1d and 1b constitute a negative arm connected to the negative bus N. The snubber circuits 3a, 4a, 6a and 7a and the power regeneration circuit 8a are a GTO 1a of a positive arm and a GT of a negative arm.
In relation to O1d , snubber circuits 3b, 4b, 6b, 7b and power regeneration circuit 8b are connected to GTO1b of the negative arm and positive
It is related to GTO1c of the arm .

In this case, the output terminal X is connected to GTO1c and GTO1c.
It is provided at the connection point with TO1d, that is, the connection point between the positive arm and the negative arm. Reference numerals 14a and 14b denote clamp diodes inserted between the snubber capacitors 4a and 4b and the recovery capacitors 7a and 7b, respectively.
It is inserted between the connection point of a, 1c and the connection point of 1d, 1b and the intermediate potential point C.

The snubber diode 3a and the snubber capacitor 4a form a snubber circuit for the GTO 1a.
The snubber diode 3b and the snubber capacitor 4b
A snubber circuit for the GTO 1b is configured. Also,
Snubber capacitor 4a, polar diode 6a and snubber capacitor 7a constitute a snubber circuit for GTO 1d, and snubber capacitor 4b, polar diode 6b and recovery capacitor 7b constitute a snubber circuit for GTO 1c.

The recovery capacitor 7a is a GTO 1a, 1d
, The energy stored in the reactor 5a and the snubber capacitor 4a is recovered, and the recovery capacitor 7b is switched by the GTO 1c and 1b to operate the reactor 5b and the snubber capacitor 4b.
The energy stored in the vehicle is recovered. Further, the energy excessively stored in the recovery capacitors 7a and 7b is supplied to the DC power sources 9a and 9b by the power regeneration circuits 8a and 8b.
9b.

FIGS. 30 and 31 are circuit diagrams showing a conventional power converter comprising a three-level inverter having means for regenerating the energy stored in the snubber circuit to a DC power supply. The conversion device is described in the above-mentioned JP-A-1-198280 .

In the figure, 1a to 1d, 2a to 2d, 3
a, 3b, 4a, 4b, 5a, 5b, 6a, 6b, 7
a, 7b, 8a, 8b, 9a, 9b and 14a, 14
b is the same as that in FIG.

The snubber diode 3c and the snubber capacitor 4c form a snubber circuit connected in parallel to the GTO 1c, and include the snubber diode 3d and the snubber capacitor 4c.
d forms a snubber circuit connected in parallel to the GTO 1d. 15 is a transformer connected between the positive and negative buses P and N;
Is a diode connected in series to the transformer 15, and 17 is a reset resistor of the transformer 15.

Reference numeral 18 denotes a discharge resistor inserted in place of the transformer 15, the diode 16, and the reset resistor 17, and is connected between the connection points of the snubber circuits 3c, 4c and 3d, 4d.

Referring to FIG. 31, the DC power supply 9 shown in FIG.
A discharge resistor 18 is partially shown corresponding to an energy regeneration circuit (transformer 15, diode 16 and reset resistor 17) between a and 9b between the positive and negative buses PN.
As is clear from FIG. 31, the snubber capacitors 4c, 4c
The energy stored in d is consumed by the discharge resistor 18.

Next, the operation of the conventional power converter will be described with reference to FIGS. For example, in the power conversion device (inverter device) shown in FIG. 27, the withstand voltage specification of the recovery capacitor 7 is required to be higher than the voltage of the DC power supply 9. GTO1a, 1b
Is used as a self-extinguishing type semiconductor element of an inverter, the voltage of DC power supply 9 is several thousand volts.

Therefore, when such an inverter device is configured, a snubber discharge current of 1000 A or more or a load current with the GTOs 1a and 1b cut off flows into the recovery capacitor 7, and the recovery capacitor 7 An amount of heat loss occurs.

As a method of suppressing the heat loss, it is conceivable to provide a cooling device in the recovery condenser 7 or to increase the heat capacity of the recovery condenser 7 by applying a large condenser. As a result, the size of the inverter device increases.

Further, since the charging voltage of the recovery capacitor 7 is higher than the voltage of the DC power supply 9, the withstand voltage specifications of the components of the power regeneration circuit 8 are all required to be higher than the voltage of the DC power supply 9. As a result, the high-frequency switching operation of the switching element 12 becomes difficult, so that the size of the reactor 10 cannot be reduced. Therefore, the size of the power regeneration circuit 8 and the size of the inverter device increase.

In the case of the inverter device shown in FIG. 28, the voltage of the recovery capacitor 7 can be reduced, but the snubber capacitors 4a, 4b
And the recovery capacitor 7 are connected in series, so that the initial state (GT
O1a and 1b are off), the recovery capacitor 7
Is charged with the electrode without “dots” (see FIG. 28) as the positive electrode.

On the other hand, during normal operation, the recovery capacitor 7 is required to be charged with the electrode marked with "dot" as the positive electrode. Therefore, the power processing device 13 needs to have a withstand voltage for both positive and negative polarities, and the configuration of the power processing device 13 is complicated.

Further, snubber capacitors 4a and 4b are provided for the GTOs 1a and 1b, but depending on the arrangement of the two capacitors 4a and 4b and the selection of the capacitance, the GTO 1a and 1b are provided.
There is no need to provide snubber capacitors 4a and 4b for a and 1b (see snubber capacitor 4 in FIG. 27). Therefore, it can be imagined that the components of the inverter device in FIG. 28 can be reduced by improving the circuit configuration.

In the case of an inverter device in which the voltage of the DC power supply 9 is several thousand volts, the snubber capacitors 4a, 4
The withstand voltage of b is required to be higher than the voltage of the DC power supply 9, and
In order to reduce a spike voltage generated at the time of current interruption, which is one of the causes of destruction of the GTOs 1a and 1b, it is required to reduce the inductance of the snubber capacitors 4a and 4b. Accordingly, the snubber capacitors 4a and 4b are increased in size and cost with an increase in the voltage of the DC power supply 9, and as a result, the inverter device is increased in size and cost.

Further, since the reactors (anode reactors) 5a and 5b are arranged on both sides of the output terminal A,
It is necessary to match the inductance values of the two reactors 5a, 5b, and the snubber capacitors 4a, 4b for suppressing the voltage rise rate when the current of the GTOs 1a, 1b is cut off.
It is necessary to provide b.

The reason for adopting the above configuration is that a load current always flows through the reactor 5a or 5b when the current is interrupted. Therefore, if there is a change in the load current during switching of the GTOs 1a and 1b, the reactor 5a or 5b
b, a voltage is induced in the GTO 1a, 1
This is to prevent a spike voltage from being applied to b. Therefore, the number of components of the inverter device increases, which results in an increase in size and cost.

Further, in the case of the three-level inverter shown in FIG. 29, as in the case of the inverter shown in FIG. 27, the withstand voltage of the recovery capacitors 7a and 7b is required to be higher than the voltage of the DC power supplies 9a and 9b. , Power regeneration circuit 8
a, 8b increase in size.

In the three-level inverter shown in FIG. 30, the rate of voltage rise (dv / dt) applied to each of the GTOs 1a to 1d is suppressed by, for example, a snubber circuit including a snubber diode 3a and a snubber capacitor 4a for the GTO 1a. The other GTOs 1b to 1d are similarly suppressed by the snubber circuits. Regarding the current increase rate (di / dt), the anode reactor 5a suppresses the current increase rate on the GTOs 1a and 1d, and the anode reactor 5b controls the GTO1
The rate of increase in current applied to c and 1b is suppressed.

In the three-level inverter device shown in FIG. 30, snubber capacitor 4a and anode reactor 5
The energy stored in the snubber capacitor 4a is recovered by the recovery capacitor 7a via the polarity diode 6a.
b and the energy stored in the anode reactor 5b are recovered by the recovery capacitor 7b via the polarity diode 6b.

Here, the recovery capacitors 7a and 7b are charged to a voltage value that is preferably higher than the voltage value of the DC power supplies 9a and 9b, respectively. Collection capacitors 7a, 7
The overcharge voltage b is required to quickly recover the energy stored in the anode reactors 5a and 5b to the recovery capacitors 9A and 9B.

Excess energy recovered by the recovery capacitor 7a is regenerated to the DC power supply 9a by using a known step-down chopper including a switch 12a, a diode 11a, and a reactor 10a as a power energy regenerating circuit. Excess energy of the recovery capacitor 7b is similarly regenerated by the DC power supply 9b. FIG.
In 1, the energy stored in the snubber capacitors 4 c and 4 d is consumed by the discharge resistor 18.

[0040]

As described above, in the conventional power converter, for example, in the case of the inverter device shown in FIG. 27, the withstand voltage of the recovery capacitor 7 is required to be higher than the voltage of the DC power supply 9. However, there is a problem that a snubber discharge current of 1000 A or more or a load current at the time of shutting off the GTO flows in, thereby causing a considerable amount of heat loss in the recovery capacitor 7.

Further, in order to solve the above problems, if a cooling device is provided in the recovery condenser 7 or if the heat capacity of the recovery condenser 7 is increased, the overall size of the recovery condenser 7 becomes large. Further, since the charging voltage of the recovery capacitor 7 is equal to or higher than the voltage of the DC power supply 9, all the withstand voltages of the components of the power regeneration circuit 8 are required to be equal to or higher than the voltage of the DC power supply 9. However, there is a problem that the power regeneration circuit 8 becomes large, and the whole device becomes large.

In the case of the inverter device shown in FIG. 28,
Although the voltage of the recovery capacitor 7 can be reduced, since the snubber capacitors 4a and 4b and the recovery capacitor 7 are connected in series, the recovery capacitor 7 is connected to the DC power supply 9
In the initial state of the power supply, the electrode with no dot is charged as a positive electrode, and the electrode with dot is charged as a positive electrode during normal operation. However, there is a problem that the configuration of the power processing device 13 is complicated.

In the inverter device shown in FIG.
When the voltage of the DC power supply 9 is several thousand volts, the snubber capacitors 4a and 4b are required to have a withstand voltage higher than the voltage of the DC power supply 9 and reduce the inductance to reduce a spike voltage generated when the GTO current is cut off. Since there is a demand, the increase in the voltage of the DC power supply 9 leads to an increase in size and cost, which in turn leads to an increase in size and cost of the entire apparatus.

Further, the reactors 5 on both sides of the output terminal A
In addition, it is necessary to adjust the inductance values of a and 5b, and it is necessary to provide snubber capacitors 4a and 4b in order to suppress the rate of voltage rise when the current of the GTOs 1a and 1b is interrupted. There is a problem that the size and cost are increased.

Similarly, in the case of the three-level inverter device shown in FIG. 29 or 30, the recovery capacitors 7a, 7
Since the withstand voltage b is required to be equal to or higher than the voltage of the DC power supplies 9a and 9b, there is a problem that the power regeneration circuits 8a and 8b become large and the whole device becomes large.

As shown in FIG. 30, when power energy stored in snubber capacitors 4c and 4d is regenerated to positive and negative buses P and N via transformer 15 and diode 16, reset voltage is applied to snubber diode 4c. , 4d and the voltage drop generated by the reset resistor 17, the reset time of the transformer 15 becomes longer. Further, the transformer 15 is used as an energy regenerating means.
When a multi-phase inverter device is used, it is necessary to provide a transformer 15 for each phase, and there is a problem that the device is increased in size and cost.

Further, as shown in FIG. 31, when the electric energy stored in the snubber capacitors 4c and 4d is consumed by the discharge resistor 18, there is a problem that the efficiency is reduced.

The present invention has been made in order to solve the above-mentioned problems. The present invention reduces the voltage of a snubber circuit and a recovery capacitor for recovering energy stored in a reactor, and changes the charging polarity to one polarity. Accordingly, it is an object of the present invention to obtain a power converter in which the components of the snubber circuit of the self-extinguishing type semiconductor element are reduced.

Another object of the present invention is to provide a power converter in which the withstand voltage of a recovery capacitor for recovering energy stored in a snubber capacitor and an anode reactor is reduced.

Further, according to the present invention, the energy consumed by the discharge resistor is recovered by the recovery capacitor.
It is an object of the present invention to obtain a power converter that can recover recovered power energy to a DC power supply without using a transformer.

Another object of the present invention is to obtain a power conversion device which realizes downsizing and low cost by simplifying the configuration of the whole device by sharing a recovery capacitor and a power energy regeneration circuit in a plurality of phases. And

Also, the present invention reduces the energy consumed and improves the efficiency by reducing the capacitance of a snubber capacitor connected in parallel with the clamp diode to store the energy consumed by the discharge resistor. It is an object to obtain a realized power converter.

[0053]

According to a first aspect of the present invention, a power converter includes first and second self-extinguishing type semiconductor elements connected in series between positive and negative buses of a DC power supply. A first and second diode connected in anti-parallel to each of the second self-extinguishing semiconductor devices, a reactor connected in series between the first and second self-extinguishing semiconductor devices, and a second An output terminal provided at a connection point between the self-extinguishing type semiconductor element and the reactor; a snubber circuit including a first capacitor and a third diode connected in parallel to the first self-extinguishing type semiconductor element; 1st capacitor and 3rd
A second capacitor and a fourth diode connected in series between a connection point to the diode and the output terminal;
And a power regeneration circuit that regenerates energy stored in the second capacitor to the DC power supply by a switching operation of the second self-extinguishing type semiconductor element.

According to a second aspect of the present invention, there is provided a power conversion device comprising: a first and a second self-extinguishing type semiconductor element connected in series between a positive and a negative bus of a DC power supply; First and second diodes connected in anti-parallel to each of the arc-extinguishing semiconductor devices, a reactor connected in series between the first and second self-extinguishing semiconductor devices, and a first self-extinguishing type An output terminal provided at a connection point between the semiconductor element and the reactor, a snubber circuit including a first capacitor and a third diode connected in parallel to the second self-extinguishing type semiconductor element; The second capacitor and the fourth diode connected in series between the connection point with the third diode and the output terminal, and the second operation by the switching operation of the first and second self-extinguishing semiconductor elements.
And a power regenerating circuit for regenerating the energy stored in the capacitor to the DC power supply.

A power converter according to a third aspect of the present invention is the first, second, third and fourth self-extinguishing type series-connected between the positive and negative buses of a DC power supply having an intermediate potential point. A semiconductor device, first, second, third, and fourth diodes connected in anti-parallel to each of the first, second, third, and fourth self-turn-off semiconductor devices; A first reactor connected between the self-arc-extinguishing semiconductor devices, a second reactor connected between the third and fourth self-arc-extinguishing semiconductor devices, and a second self-arc-extinguishing semiconductor device And the first
A fifth diode connected between the connection point with the first reactor and the intermediate potential point, and a fifth diode connected between the connection point between the third self-extinguishing semiconductor element and the second reactor and the intermediate potential point A sixth diode, an output terminal provided at a connection point between the second self-extinguishing semiconductor device and the third self-extinguishing semiconductor device, and a parallel connection to the first self-extinguishing semiconductor device. A first snubber circuit including a first capacitor and a seventh diode connected to each other, and a second snubber including a second capacitor and an eighth diode connected in parallel to the fourth self-extinguishing semiconductor element A third capacitor connected in series between a circuit, a connection point between the first reactor and the second self-extinguishing semiconductor device, and a connection point between the first capacitor and the seventh diode; Diode, the second reactor and the third A fourth capacitor and a tenth diode connected in series between a connection point with the self-extinguishing type semiconductor element and a connection point with the second capacitor and the eighth diode; A first and a second power regeneration circuit that regenerates energy stored in the third and fourth capacitors to a DC power supply by a switching operation of the third and fourth self-extinguishing semiconductor elements.

A power converter according to a fourth aspect of the present invention is the first, second, third and fourth self-extinguishing type series-connected between the positive and negative buses of a DC power supply having an intermediate potential point. A semiconductor device, first, second, third, and fourth diodes connected in anti-parallel to each of the first, second, third, and fourth self-turn-off semiconductor devices; A first reactor connected between the self-arc-extinguishing semiconductor devices, a second reactor connected between the third and fourth self-arc-extinguishing semiconductor devices, and a second self-arc-extinguishing semiconductor device And the first
A fifth diode connected between the connection point with the first reactor and the intermediate potential point, and a fifth diode connected between the connection point between the third self-extinguishing semiconductor element and the second reactor and the intermediate potential point A sixth diode, an output terminal provided at a connection point between the second self-extinguishing semiconductor device and the third self-extinguishing semiconductor device, and a parallel connection to the first self-extinguishing semiconductor device. A first snubber circuit including a first capacitor and a seventh diode connected to each other, and a second snubber including a second capacitor and an eighth diode connected in parallel to the fourth self-extinguishing semiconductor element A third snubber circuit including a third capacitor and a ninth diode connected in parallel with the fifth diode, and a fourth capacitor and a tenth diode connected in parallel with the sixth diode. Fourth And bus circuits, and the third capacitor 9
Of a fifth capacitor and an eleventh diode, which are connected in series between a connection point with the first diode and the connection point of the first capacitor and the seventh diode, and a second capacitor and an eighth diode. A sixth capacitor and a twelfth diode connected in series between the connection point and a connection point between the fourth capacitor and the tenth diode, and first, second, third and fourth self-extinguishing arcs; A first and a second power regenerating circuit for regenerating energy stored in the fifth and sixth capacitors to a DC power supply by a switching operation of the die semiconductor element.

According to a fifth aspect of the present invention, there is provided a power conversion apparatus including first, second, third, and fourth self-extinguishing types connected in series between positive and negative buses of a DC power supply having an intermediate potential point. A semiconductor device, first, second, third, and fourth diodes connected in anti-parallel to each of the first, second, third, and fourth self-turn-off semiconductor devices; A first reactor connected between the self-arc-extinguishing semiconductor devices, a second reactor connected between the third and fourth self-arc-extinguishing semiconductor devices, and a second self-arc-extinguishing semiconductor device And the first
A fifth diode connected between the connection point with the first reactor and the intermediate potential point, and a fifth diode connected between the connection point between the third self-extinguishing semiconductor element and the second reactor and the intermediate potential point A sixth diode, an output terminal provided at a connection point between the second self-extinguishing semiconductor device and the third self-extinguishing semiconductor device, and a parallel connection to the first self-extinguishing semiconductor device. A first snubber circuit including a first capacitor and a seventh diode connected to each other, and a second snubber including a second capacitor and an eighth diode connected in parallel to the fourth self-extinguishing semiconductor element A third snubber circuit including a third capacitor and a ninth diode connected in parallel with the fifth diode, and a fourth capacitor and a tenth diode connected in parallel with the sixth diode. Fourth And bus circuits, and the third capacitor 9
A first resistor connected between a connection point with the first diode and the connection point between the first capacitor and the seventh diode; a connection point between the second capacitor and the eighth diode; And a second resistor connected between the capacitor and the connection point of the tenth diode.

A power converter according to a sixth aspect of the present invention is the power converter according to the first or second aspect, further comprising a capacitor and a diode connected in series between the positive and negative buses, and a resistor connected in parallel to the diode. Is provided.

A power converter according to claim 7 of the present invention is characterized in that in claim 3, claim 4, or claim 5,
A plurality of voltage clamp circuits each including a capacitor and a diode connected in series between the positive and negative buses and the intermediate potential point, and a resistor connected in parallel to the diode are provided.

In the power converter according to claim 8 of the present invention, a voltage clamp circuit comprising a capacitor and a diode connected in series between the positive and negative buses is provided, and the power is stored in the capacitor. And a power regeneration circuit that regenerates the obtained energy to the DC power supply.

According to a ninth aspect of the present invention, there is provided a power converter according to the third, fourth or fifth aspect.
A plurality of voltage clamp circuits each including a capacitor and a diode connected in series between the positive and negative buses and the intermediate potential point, and a power regeneration circuit for regenerating energy stored in the capacitor to a DC power supply are provided. .

According to a tenth aspect of the present invention, in the power conversion device according to the first or second aspect, the power regeneration circuit regenerates excess energy stored in the second capacitor to the DC power supply. , The charging voltage of the second capacitor is controlled to a value lower than the voltage of the DC power supply.

Further, in the power converter according to claim 11 of the present invention, in claim 3, the first and second power regenerating circuits convert excess energy stored in the third and fourth capacitors into direct current. In addition to regenerating the power supply, the charging voltage of the third and fourth capacitors is controlled to a value lower than the voltage of the DC power supply.

According to a twelfth aspect of the present invention, in the power conversion apparatus according to the fourth aspect, the first and second power regeneration circuits convert excess energy accumulated in the fifth and sixth capacitors into a direct current. While regenerating the power, the charging voltage of the fifth and sixth capacitors is controlled to a value lower than the voltage of the DC power supply.

According to a thirteenth aspect of the present invention, there is provided a power conversion device comprising: a first and a second self-extinguishing type semiconductor element connected in series as a positive arm between positive and negative buses of a DC power supply having an intermediate potential point; A third and a fourth self-extinguishing type semiconductor element connected in series as a negative arm between the positive and negative buses, a freewheel diode connected in anti-parallel to each of the self-extinguishing type semiconductor elements, A first clamp diode connected between the series connection point of the self-extinguishing type semiconductor element and the intermediate potential point; and a series connection point and an intermediate potential point of the third and fourth self-extinguishing type semiconductor elements. A power conversion device comprising a three-level inverter having a second clamp diode connected between the positive and negative arms and an output terminal connected to a connection point between the positive and negative arms. Anode reactor and, first and fourth self arc-suppressing semiconductor device and the first and second
, Second, third, and fourth snubber circuits each including a snubber diode and a snubber capacitor connected in parallel to the clamp diode of the first embodiment, and a snubber diode of the first snubber circuit for the first self-extinguishing semiconductor device. A first diode and a first recovery capacitor connected between a connection point between the first self-extinguishing semiconductor element and a snubber diode and a snubber connected to the positive bus. A second diode and a second recovery capacitor connected between a connection point with the capacitor and the negative bus, and a connection point between the snubber diode and the snubber capacitor of the third snubber circuit with respect to the first clamp diode. A first discharge resistor connected between the intermediate potential point and a fourth snubber circuit for the second clamp diode; A second discharge resistor connected between the connection point between the navar diode and the snubber capacitor and the intermediate potential point, and energy taken out from the first recovery capacitor, and the positive polarity of the DC power supply divided at the intermediate potential point And a second energy regenerating circuit that extracts energy from the second recovery capacitor and regenerates to the negative side of the DC power supply divided at the intermediate potential point. is there.

According to a fourteenth aspect of the present invention, there is provided a power conversion apparatus comprising: a first and a second self-extinguishing type semiconductor element connected in series as a positive arm between positive and negative buses of a DC power supply having an intermediate potential point; A third and a fourth self-extinguishing type semiconductor element connected in series as a negative arm between the positive and negative buses, a freewheel diode connected in anti-parallel to each of the self-extinguishing type semiconductor elements, A first clamp diode connected between the series connection point of the self-extinguishing type semiconductor element and the intermediate potential point; and a series connection point and an intermediate potential point of the third and fourth self-extinguishing type semiconductor elements. A power conversion device comprising a three-level inverter having a second clamp diode connected between the positive and negative arms and an output terminal connected to a connection point between the positive and negative arms. Anode reactor and, first and fourth self arc-suppressing semiconductor device and the first and second
First, second, third and fourth snubber circuits respectively connected in parallel to the clamp diodes of the first and second snubber circuits; and a snubber diode and a snubber capacitor of a third snubber circuit for the first clamp diode. A first discharge resistor connected between the connection point of the second snubber circuit and the intermediate potential point, and a connection point between the connection point of the snubber diode and the snubber capacitor of the fourth snubber circuit to the second clamp diode and the intermediate potential point. A second discharge resistor connected to the first self-extinguishing semiconductor device and a third bus connected between the connection point of the snubber diode and the snubber capacitor of the first snubber circuit to the first self-extinguishing semiconductor element and the positive bus.
And a fourth discharge resistor connected between the connection point between the snubber diode and the snubber capacitor of the second snubber circuit for the fourth self-arc-extinguishing semiconductor element and the negative bus. It is provided.

According to a fifteenth aspect of the present invention, there is provided a power conversion apparatus comprising: a first and a second self-extinguishing type semiconductor element connected in series as a positive arm between positive and negative buses of a DC power supply having an intermediate potential point; A third and a fourth self-extinguishing type semiconductor element connected in series as a negative arm between the positive and negative buses, a freewheel diode connected in anti-parallel to each of the self-extinguishing type semiconductor elements, A first clamp diode connected between the series connection point of the self-extinguishing type semiconductor element and the intermediate potential point; and a series connection point and an intermediate potential point of the third and fourth self-extinguishing type semiconductor elements. A power conversion device comprising a three-level inverter having a second clamp diode connected between the positive and negative arms and an output terminal connected to a connection point between the positive and negative arms. Anode reactor and, first and fourth self arc-suppressing semiconductor device and the first and second
, Second, third, and fourth snubber circuits each including a snubber diode and a snubber capacitor connected in parallel to the clamp diode of the first embodiment, and a snubber diode of the first snubber circuit for the first self-extinguishing semiconductor device. A first diode and a first recovery capacitor connected between a connection point between the first self-extinguishing semiconductor element and a snubber diode and a snubber connected to the positive bus. A second diode and a second recovery capacitor connected between a connection point with the capacitor and the negative bus, and a connection point between the snubber diode and the snubber capacitor of the third snubber circuit with respect to the first clamp diode. A third diode, a first reactor, and a third recovery capacitor connected between the second diode and the intermediate potential point; Fourth snubber circuit snubber diode and a fourth diode connected between the connection point and the intermediate potential point of the snubber capacitor for the lamp diode, a second reactor and the fourth recovery capacitor,
Energy is extracted from the first recovery capacitor, and a first energy regeneration circuit that regenerates the positive side of the DC power supply divided at the intermediate potential point, and energy is extracted from the second recovery capacitor and divided at the intermediate potential point A second energy regenerating circuit for regenerating to the negative side of the DC power supply, and a third energy regenerating circuit for retrieving energy from the third recovery capacitor and regenerating to the positive side of the DC power supply divided at the intermediate potential point And extracting energy from the fourth recovery condenser,
The fourth regenerated to the negative side of the DC power supply divided at the intermediate potential point
Energy regeneration circuit.

A power converter according to a sixteenth aspect of the present invention is the power converter according to the fifteenth aspect, wherein the first, second, third, and fourth recovery capacitors are connected to the first, second, third, and fourth recovery capacitors. Are connected in common for a plurality of phases.

A power converter according to a seventeenth aspect of the present invention is the power converter according to the fifteenth aspect, wherein the fifth, sixth, and fifth capacitors are connected in parallel to the first, second, third, and fourth recovery capacitors, respectively. Seventh and eighth recovery capacitors are provided, and fifth, sixth, seventh and eighth recovery capacitors,
The second, third and fourth energy regenerating circuits are respectively connected in common for a plurality of phases.

The power converter according to claim 18 of the present invention is the power converter according to claim 13, claim 14, claim 15, claim 16, or claim 17, wherein the snubber capacitors of the third and fourth snubber circuits are provided. Has a capacitance smaller than the capacitance of the snubber capacitors of the first and second snubber circuits, and reduces the energy stored in the snubber capacitors constituting the third and fourth snubber circuits. Things.

[0071]

According to the present invention, the components of the snubber circuit can be reduced without impairing the function of suppressing the steep rise of the voltage and current applied to the self-extinguishing type semiconductor element to a desired value. By reducing the voltage of the recovery capacitor for recovering the stored energy, the configuration of the entire apparatus is simplified.

Further, in the present invention, the use of a power regeneration circuit for extracting excess energy recovered by the recovery capacitor, regenerating it into a DC power supply, and controlling the charging voltage of the recovery capacitor to a low voltage, and using the power regeneration circuit to improve efficiency. To achieve.

Further, in the present invention, by connecting the recovery capacitor to the positive bus and the negative bus of the DC bus of the DC power supply, the charging voltage value of the recovery capacitor can be reduced and the withstand voltage can be reduced. .

In the present invention, the number of components is reduced by replacing the energy regeneration circuit with a discharge resistor.

In the present invention, the recovery capacitor recovers all the energy consumed by the discharge resistor, and the energy recovery circuit recovers the recovered energy to the DC power supply without using a transformer. I do.

In the present invention, the recovery capacitor and the energy regeneration circuit can be shared by a plurality of phases.

According to the present invention, the stored energy is reduced by the snubber capacitor connected to the clamp diode, and the energy consumed by the discharge resistor is reduced.

[0078]

[Embodiment 1] Hereinafter, a first embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a circuit diagram showing a first embodiment (corresponding to claim 1) of the present invention in which an inverter device is taken as an example, wherein 1a, 1b, 2a, 2b, 3, 4 to 9;
A, P and N are the same as those described above (see FIG. 27). Therefore, here, the self-extinguishing type semiconductor elements 1a, 1
It is assumed that a GTO (gate turn-off) thyristor is applied as b.

However, in this case, the connection relation of each element is different, and the output terminal A is provided at the connection point between the reactor 5 and the GTO 1b. Note that arrows (a) and (b) indicate the direction of the load current Io. The snubber diode 3 constituting the snubber circuit of the GTO 1a is connected to the cathode side of the GTO 1a, and the snubber capacitor 4 is connected to the positive bus P.

The recovery capacitor 7 constituting the snubber circuit of the GTO 1b is inserted between both input terminals of the power regeneration circuit 8, and the polarity diode 6 for determining the charging direction of the recovery capacitor 7 is connected to the anode side of the GTO 1b. I have.
It should be noted that the positions of the polarity diode 6 and the recovery capacitor 7 do not affect the circuit operation at all even if they are interchanged. Further, a specific circuit configuration example of the power regeneration circuit 8 will be described in detail in a fifth embodiment described later.

The power regeneration circuit 8 extracts excess energy from the recovery capacitor 7, regenerates it to the DC power supply 9 of the inverter device, and sets the charging voltage of the recovery capacitor 7 to a positive electrode with the electrode marked with “dot” in the figure as a positive electrode. Voltage E of DC power supply 9
It has a function of controlling the voltage e to be lower than the voltage e. Here, the voltage e is about a fraction of the voltage E.

FIG. 2 is an explanatory diagram showing the relationship between the switching modes of the GTOs 1a and 1b and the voltage at the output terminal A, and FIG. 3 is an explanatory diagram showing the path through which the load current Io flows. Hereinafter, the operation of the first embodiment of the present invention shown in FIG. 1 will be described with reference to FIG. 2 and FIG. First, the load current Io
The circuit operation in the two switching modes (see FIG. 2) when the direction of the arrow is (a) is described.

In the initial state of the mode “1” (see FIG. 2), the load current Io is flowing through the path “1” (see FIG. 3), the voltage of the output terminal A is 0, and the snubber capacitor 4 It is charged to the voltage (E + e). From this state, the GTO 1b is turned off, and the short circuit prevention time T
Consider a case where the GTO 1a is turned on after d. Here, even if the GTO 1b is turned off, the circuit state does not change.

When the GTO 1a is turned on, the voltage E of the DC power supply 9 is applied to the reactor 5,
While the current increase rate (di / dt) applied to the GTO 1a is suppressed by the reactor 5, the load current Io is changed to the path “2”.
Start to flow. The current rise rate di / dt at this time is obtained from the following equation (1). Here, in the equation (1), Ls is the inductance of the reactor 5.

Di / dt = E / Ls (1)

The snubber capacitor 4 is connected to the path "3".
Is discharged to the voltage 0. At this time, the power energy of the snubber capacitor 4 is recovered by the recovery capacitor 7 via the path “3”. Therefore, the current flowing through reactor 5 is equal to or greater than load current Io.

Therefore, immediately after the discharge of the snubber capacitor 4, excess energy is accumulated in the reactor 5, but since the snubber diode 3 conducts, the path "4"
As a result, excess energy is recovered by the recovery capacitor 7. As a result, the current of reactor 5 converges on the value of load current Io. Through the above process, the load current Io flows through the path “2”, and the voltage at the output terminal A becomes E.

Next, in the initial state of the mode “2”, the load current Io is flowing through the path “2”, the voltage of the output terminal A is E, and the voltage of the snubber capacitor 4 is 0. From this state, it is assumed that the GTO 1a is turned off and the GTO 1b is turned on after the short circuit prevention time Td.

When the GTO 1a is turned off, the load current Io is cut off and bypassed to the path "5". At this time, the snubber capacitor 4 is charged by the load current Io, so that the voltage rise rate (d
v / dt) is suppressed by the snubber capacitor 4. The voltage rise rate dv / dt at this time is obtained from the following equation (2). However, in (2), Cs is the capacitance of the snubber capacitor 4.

Dv / dt = Io / cs (2)

The snubber capacitor 4 has the voltage (E +
e), and the freewheel diode 2b conducts, so that the load current Io starts flowing through the path “1”. Immediately after the charging, excess energy is accumulated in the reactor 5, but the excess energy is recovered by the recovery capacitor 7 through the path “4”. Therefore, the current of the reactor 5 converges to zero.

Here, after the short-circuit prevention time Td, GTO1
Turning on b does not change the circuit state. Through the above process, the load current Io flows through the path “1”, and the voltage of the output terminal A becomes 0.

Next, the circuit operation in the two switching modes when the direction of the load current Io is the arrow (b) will be described. First, in the initial state of the mode “1”, the load current Io is flowing through the path “6”, the voltage of the output terminal A is 0, and the voltage of the snubber capacitor 4 is (E
+ E) . From this state, a case is considered in which the GTO 1b is turned off and the GTO 1a is turned on after the short circuit prevention time Td.

When the GTO 1b is turned off, the load current Io is cut off and bypassed to the path "7". At this time, since the snubber capacitor 4 is discharged by the load current Io, the voltage rise rate (d
v / dt) is suppressed by the snubber capacitor 4. Further, since the snubber capacitor 4 and the recovery capacitor 7 are arranged in series on the path “7”, the voltage increase rate (dv / dt) applied to the GTO 1b can be obtained from the following equation (3). Here, Co is the capacitance of the recovery capacitor 7.

Dv / dt = Io / {CsCo / (Cs + Co)} (3)

Here, the capacitance C of the recovery capacitor 7 is set so as to satisfy the relationship of the following equation (4), that is, so as to be sufficiently larger than the capacitance Cs of the snubber capacitor 4.
If o is selected, equivalently, the voltage rise rate of the equation (3) is
This is the same value as the voltage rise rate in the equation (2).

Co >> Cs (4)

The snubber capacitor 4 is discharged to a voltage of 0, and the power energy of the snubber capacitor 4 is recovered by the recovery capacitor 7. Also, the load current Io for the freewheeling diode to conduct starts to flow from the path “8”. Here, even if the GTO 1a is turned on after the short circuit prevention time Td, the circuit state does not change.

Through the above process, the load state Io flows to the path “8”, and the voltage at the output terminal A becomes E. here,
Since there is no reactor or the like in the route “7”, that is, GT
Since there is no component for applying a spike voltage to O1b in the forward direction, the applied voltage at the time of current interruption of GTO1b rises from 0, and the voltage rise rate dv / dt is set to the above (3).
It can be suppressed as in the equation.

In the initial state of the mode "2", the load current Io is flowing through the path 8, and the voltage of the output terminal A is E.
And the voltage of the snubber capacitor 4 is zero. From this state, it is assumed that the GTO 1a is turned off and the GTO 1b is turned on after the short circuit prevention time Td. Here, even if the GTO 1a is turned off, the circuit state does not change.

When the GTO 1b is turned on, the voltage E of the DC power supply 9 is applied to the reactor 5,
The load current Io starts to flow to the path 6 while the current increase rate di / dt applied to the GTO 1b is suppressed by the reactor 5. The current rise rate di / dt at this time is as described in (1) above.
Obtained from the formula.

The snubber capacitor 4 is charged to the voltage (E + e) by the path 9. For this reason, the direction of the current of the reactor 5 is opposite to the direction of the current flowing in the initial state. Therefore, immediately after the snubber capacitor 4 is charged, excessive energy is stored in the reactor 5, but since the polarity diode 6 conducts, the energy is recovered by the recovery capacitor 7 through the path “4”. Therefore, the current of the reactor 5 converges to zero. Through the above process, the load current Io flows through the path “6”, and the voltage of the output terminal A becomes 0.

As described above, according to the first embodiment of the present invention comprising the inverter device shown in FIG.
b in the switching operation (dv / d)
t) and the current rise rate (di / dt) can be suppressed, and all the power energy stored in the snubber capacitor 4 and the reactor 5 can be recovered by the recovery capacitor 7.

In the conventional inverter device shown in FIG. 27, since the DC power supply 9 is included in the path for recovering the energy stored in the reactor 5 to the recovery capacitor 7 and the discharge path for the snubber capacitor 4, the recovery is performed. Although it was difficult to lower the charging voltage of the capacitor 7, the first embodiment of the present invention does not include the DC power supply 9 in the discharge path, so the charging voltage of the recovery capacitor 7 in FIG. can do.

In the conventional inverter device shown in FIG. 28, two snubber capacitors 4a and 4b and a recovery capacitor 7 are connected in series, and a bipolar voltage is applied to the recovery capacitor 7. Although it was difficult to lower the charging voltage of the recovery capacitor 7, in the first embodiment of the present invention, the bipolar diode 6 was used to avoid the application of the bipolar voltage to the recovery capacitor 7. 7, the charging voltage can be reduced.

That is, as is clear from the above detailed description of the circuit operation, by selecting the capacitance of the recovery capacitor 7 to be larger than the capacitance of the snubber capacitor 4,
With the configuration in which the output terminal A is drawn from the connection point between the reactor 5 and the GTO 1b, the function of the snubber circuit of the GTO 1b can be sufficiently performed by a series circuit including the polar diode 6, the recovery capacitor 7, and the snubber capacitor 4.

Although the circuit itself of the power regeneration circuit 8 is not the main feature of the present invention, it is understood that the first embodiment of the present invention can be realized using a specific circuit of the power regeneration circuit 8. This will be described in a fifth embodiment (described later).

Embodiment 2 FIG. In the first embodiment, the snubber circuits 3 and 4 for the GTO 1a are connected in series as shown in FIG. 1, but the snubber circuits for the GTO 1b may be connected in series.

FIG. 4 is a circuit diagram showing a second embodiment (corresponding to claim 2) of the present invention in which an inverter device is taken as an example, wherein 1a, 1b, 2a, 2b, 3 to 9, A, P and N are the same as described above. In this case, GTO1
Although snubber circuits 3 and 4 for b are connected in series, the circuit operation is completely symmetrical to that of FIG.

Embodiment 3 FIG. Further, in the first embodiment, the case where the power conversion device is an inverter device has been described. However, it is needless to say that the present invention can be applied to a three-level inverter device as shown in FIG.

FIG. 5 is a circuit diagram showing a third embodiment (corresponding to claim 3) of the present invention in the case of taking a three-level inverter device as an example, wherein 1a to 1d, 2a, 2b, 3a, 3
b, 4a, 4b, 5a, 5b, 6a, 6b, 7a, 7
b, 8a, 8b, 9a, 9b, 14a, 14b, A,
C, P and N are the same as those described above (see FIG. 29).

In this case, the voltages of DC power supplies 9a and 9b, which can be replaced by smoothing capacitors, are each assumed to be E / 2. FIG. 6 is an explanatory diagram showing the relationship between the switching modes “1” to “4” of the GTOs 1a, 1b, 1c, and 1d and the voltage of the output terminal X. FIG. 7 is a diagram illustrating the paths “1” to “17” through which the load current Io flows. FIG.

Power regeneration circuits 8a and 8b extract excess energy of recovery capacitors 7a and 7b, regenerate them into DC currents 9a and 9b, and convert the voltages of recovery capacitors 7a and 7b to DC power supply voltage E, as described above. It has a function of controlling the voltage to a constant voltage e which is about a fraction of (= E / 2). However, in the drawing, the recovery capacitors 7a and 7b are charged with the electrodes marked with "dots" as positive electrodes.

The operation of the third embodiment shown in FIG. 5 will be described below with reference to FIGS. 6 and 7. First, the circuit operation will be described for four switching modes when the direction of the load current Io is the arrow (a).

In the initial state of the mode “1”, the load current Io is flowing through the path “1”, the voltage of the output terminal X is 0, and the snubber capacitor 4a is charged to the voltage (E + e). The voltage of the snubber capacitor 4b is zero. From this state, it is assumed that the GTO 1b is turned off and the GTO 1c is turned on after the short circuit prevention time Td. Here, even if the GTO 1b is turned off, the circuit state does not change.

When the GTO 1c is turned on, the voltage E of the DC power supply 9b is applied to the anode reactor 5b, and the current rise rate di / dt applied to the GTO 1b is increased.
Is suppressed by the anode reactor 5b, and the load current Io starts flowing through the path “2”. The current rise rate di / dt at this time is obtained from the following equation (5). Here, Ls is the inductance of the anode reactors 5a and 5b.

Di / dt = E / Ls (5)

Thereafter, the current flowing through the GTO 1b exceeds the load current Io, but the excess current flows through the path "3", and the snubber capacitor 4b sets the voltage (E +
e) is charged. Immediately after the charging of the snubber capacitor 4b, excessive energy is accumulated in the anode reactor 5b, but the excess energy is recovered by the recovery capacitor 7b through the path "4". Through the above process, the load current Io flows through the path 2 and the voltage at the output terminal X becomes E / 2.

In the initial state of the mode "2", the load current Io is flowing through the path "2", the voltage of the output terminal X is E / 2, and the snubber capacitors 4a and 4b
Are charged to the voltage (E + e). From this state, G
It is assumed that the TO 1d is turned off and the GTO 1a is turned on after the short circuit prevention time Td. here,
Turning GTO 1d off does not change the circuit state.

When the GTO 1a is turned on, the voltage E of the DC power supply 9a is applied to the anode reactor 5a, and the current rise rate di / dt applied to the GTO 1a is increased.
Is suppressed by the anode reactor 5a, and the load current Io starts flowing through the path “5”. The current rise rate di / dt at this time is obtained from the above equation (5).

At this time, the reverse voltage is applied to the clamp diode 14a to turn it off, and the snubber capacitor 4a is discharged to the voltage 0 through the path "6". Through this path “6”, the energy of the snubber capacitor 4a is recovered by the recovery capacitor 7a. Immediately after the discharge of the snubber capacitor 4a, excess energy is accumulated in the anode reactor 5a, but the excess energy is recovered by the recovery capacitor 7a through the path "7".
Through the above process, the load current Io flows through the path “5”,
The voltage at the output terminal X becomes E.

In the initial state of the mode “3”, the load current Io is flowing through the path “5”, the voltage of the output terminal X is E, the voltage of the snubber capacitor 4a is 0,
The snubber capacitor 4b is charged to the voltage (E + e). From this state, consider a case where to turn off the GTO1a, to turn on the GTO 1d after the dead time Td.

When the GTO 1a is turned off, the load current Io is cut off and bypassed to the path 8. At this time, since the snubber capacitor 4a is charged by the load current Io, the rate of voltage increase applied to the GTO 1a is:
Suppressed by snubber capacitor 4a. The voltage rise rate dv / dt at this time is obtained from the following equation (6). Here, Cs is the capacitance of the snubber capacitors 4a and 4b.

Dv / dt = Io / cs (6)

The snubber capacitor 4a is charged up to the voltage (E + e), and the clamp diode 14a conducts, so that the load current Io starts flowing through the path "2". Immediately after charging the snubber capacitor 4a, excess energy is accumulated in the anode reactor 5a, but excess energy is recovered by the recovery capacitor 7a through the path 7.
Here, even if the GTO 1d is turned on after the short circuit prevention time Td, the circuit state does not change. Through the above process, the load current Io flows through the path “2”, and the voltage of the output terminal X becomes E
/ 2.

In the initial state of the mode "4", the load current Io is flowing through the path "2", the voltage of the output terminal X is E / 2, and the voltages of the snubber capacitors 4a and 4b are (E + e). is there. From this state, a case is considered in which the GTO 1c is turned off and the GTO 1b is turned on after the short circuit prevention time Td.

When the GTO 1c is turned off, the load current Io is cut off, and the load current Io is supplied via the path "9". At this time, the snubber capacitor 4b is discharged by the load current Io, so that the rate of voltage increase applied to the GTO 1c is suppressed. Since the snubber capacitor 4b and the recovery capacitor 7b are arranged in series on the path "9", the voltage rise rate dv / dt is as follows (7).
Obtained from the formula. However, Co is the recovery capacitor 7a,
7b.

Dv / dt = Io / {CsCo / (Cs + Co)} (7)

Here, the recovery capacitors 7a and 7a are set so as to satisfy the relationship of the following expression (8), that is, so as to be sufficiently larger than the capacitance Cs of the snubber capacitors 4a and 4b.
If the capacitance Co of 7b is selected, the voltage rise rate of the equation (7) becomes equivalently the same value as the voltage rise rate of the equation (6).

Co >> Cs (8)

The snubber capacitor 4b is discharged to 0,
The energy of the snubber condenser 4b is recovered by the recovery condenser 7b.
Will be collected. Further, since the freewheel diode 2d conducts, the load current starts to flow to the path “1”. Here, even if the GTO 1b is turned on after the short circuit prevention time Td, the circuit state does not change. Through the above process, the load current Io flows through the path “1”, and the voltage of the output terminal X becomes 0
Becomes

The circuit operation in the four switching modes (FIG. 6) in the case where the direction of the load current Io is the arrow (B) is described with reference to the circuit in the case where the direction of the load current Io is the arrow (A). Since the operation is completely symmetric, the description is omitted.

As described above, the inverter shown in FIG. 5 operates in the switching operation of GTOs 1a, 1b, 1c and 1d in the voltage rise rate dv / dt and the current rise rate di /
dt can be suppressed, and the snubber capacitor 4
a, 4b, and all the energy stored in the anode reactors 5a, 5b can be recovered in the recovery capacitors 7a, 7b.

The power regeneration circuits 8a and 8b are not the main circuits of the present invention, but the fifth embodiment shows that the embodiments of the present invention can be realized using specific circuits. This will be described later.

Embodiment 4 FIG. FIG. 8 is a circuit diagram showing a fourth embodiment (corresponding to claim 4) of the present invention in a case where a three-level inverter device is taken as an example. Portions denoted by the same reference numerals are the same as those described above (see FIG. 5). belongs to.

Referring to FIG. 8, only the differences from FIG. 5 (Embodiment 3) will be described. Numerals 3c and 4c denote snubber capacitors and snubber diodes connected in parallel to clamp diode 14a. Make up the circuit.

A polarity diode 6a is connected between a connection point between snubber capacitor 4c and snubber diode 3c and a connection point between snubber capacitor 4a and snubber diode 3a.
And a series circuit composed of a recovery capacitor 7a.

The clamp diode 14b has the same structure, and 3d and 4d are a snubber capacitor and a snubber diode connected in parallel to the clamp diode 14b.
Are configured as a snubber circuit. Further, other configurations are as shown in FIG.

Hereinafter, with reference to the explanatory diagrams of FIGS. 6 and 7, in the fourth embodiment of the present invention shown in FIG. 8, the circuit in the four switching modes when the direction of the load current Io is the arrow (a) The operation will be described.

In the initial state of the mode “1”, the load current Io is flowing through the path “1”, the voltage of the output terminal X is 0, and the snubber capacitors 4a and 4d output the voltage (E +
e), and the voltages of the snubber capacitors 4b and 4c are 0. From this state, consider a case where the GTO 1b is turned off and the GTO 1c is turned on after the short circuit prevention time Td. Here, even if the GTO 1b is turned off, the circuit state does not change.

When the GTO 1c is turned on, the voltage E (= E / 2) of the DC power supply 9b is applied to the anode reactor 5b.
Is applied, the load current Io starts to flow through the path “2” while the current increase rate di / dt applied to the GTO 1c is suppressed by the anode reactor 5b. The current rise rate di / dt at this time is obtained from the following equation (9). Here, Ls is the inductance of the anode reactors 5a and 5b.

Di / dt = E / Ls (9)

Thereafter, the current flowing through the GTO 1b exceeds the load current Io, but the excess current flows through the path "3", and the snubber capacitor 4b is charged to the voltage (E + e). The snubber capacitor 4d is connected to the path “1”.
In this case, the energy of the snubber capacitor 4d is recovered by the recovery capacitor 7b.

At this time, immediately after the discharge of the snubber capacitor 4d, excessive energy is stored in the anode reactor 5b, but the excess energy is recovered by the recovery capacitor 7b through the path "11". Through the above process, the load current Io flows through the path “2”, and the voltage of the output terminal X becomes E / 2.

In the initial state of the mode "2", the load current Io is flowing through the path "2", the voltage of the output terminal X is E / 2, and the snubber capacitors 4a and 4b
Is charged to the voltage (E + e), and the snubber capacitors 4c,
The voltage of 4d is 0. From this state, consider a case where the GTO 1d is turned off and the GTO 1a is further turned on after the short circuit prevention time Td. Here, even if the GTO 1d is turned off, the circuit state does not change.

When the GTO 1a is turned on, the voltage E of the DC power supply 9a is applied to the anode reactor 5a, and the current rise rate di / d applied to the GTO 1a is increased.
While t is suppressed by the anode reactor 5a, the load current Io starts flowing through the path “5”. The current rise rate di / dt at this time is obtained from the above equation (9).

Thereafter, the current flowing through the GTO 1c exceeds the load current Io, but the excess current flows through the path "12", and the snubber capacitor 4c sets the voltage (E +
e) and the clamp diode 14a is turned off. The snubber capacitor 4a is connected to the path "13".
Is discharged to the voltage 0.

The energy of the snubber capacitor 4a is recovered by the recovery capacitor 7a through the path "13".
At this time, immediately after the discharge of the snubber capacitor 4a, excess energy is accumulated in the anode reactor 5a, but the excess energy is recovered by the recovery capacitor 7a through the path "14". Through the above process, the load current Io flows through the path “5”, and the voltage at the output terminal X becomes E.

In the initial state of the mode “3”, the load current Io is flowing through the path “5”, the voltage of the output terminal X is E, the voltage of the snubber capacitors 4a and 4d is 0,
The snubber capacitors 4b and 4c are charged to the voltage (E + e). From this state, it is assumed that the GTO 1a is turned off and the GTO 1d is turned on after the short circuit prevention time Td.

When the GTO 1a is turned off, the load current Io is cut off and bypassed to the path 8. Further, the snubber capacitor 4c is also discharged through the path " 15 ". That is, the load current Io is supplied via the path “8” and the path “15”. As a result, the voltage rise rate dv / dt applied to the GTO 1a is suppressed.

The snubber capacitor 4c and the recovery capacitor 7a are arranged in series on the path "15".
Therefore, the voltage rise rate dv / dt applied to the GTO 1a is
It is obtained from the following equation (10). However, in the equation (10), Cs is the snubber capacitors 4a, 4b, 4c, 4
In d, Co is the capacitance of the recovery capacitors 4a and 4b.

Dv / dt = Io / {Cs + CoCs / (Cs + Co)} (10)

Here, if the capacitance Co of the recovery capacitors 7a and 7b is selected so as to satisfy the relationship of the following expression (11), the voltage rise rate of the expression (10) is equivalently obtained by the following expression. This is almost the same value as the voltage rise rate in the equation (12).

Co >> Cs (11) dv / dt = Io / 2Cs (12)

Thereafter, the snubber capacitor 4a applies the voltage (E
+ E), and the snubber capacitor 4c is discharged to the voltage 0 through the path “15”, so that the power energy of the snubber capacitor 4c is recovered by the recovery capacitor 7a. This causes the clamp diode 14a to conduct, so that the load current Io starts to flow through the path “2”.

At this time, immediately after the discharge of the snubber capacitor 4c, excessive energy is stored in the anode reactor 5a, but the excess energy is recovered by the recovery capacitor 7a through the path "14". Here, even if the GTO 1d is turned on after the short circuit prevention time Td, the circuit state does not change. Through the above process, the load current Io flows through the path “2”, and the voltage of the output terminal X becomes E / 2.

In the initial state of the mode “4”, the load current Io flows through the path “2”, the voltage of the output terminal X is E / 2, and the voltages of the snubber capacitors 4a and 4b are (E + e). The voltages of the snubber capacitors 4c and 4d are zero. From this state, it is assumed that the GTO 1c is turned off and the GTO 1b is turned on after the short circuit prevention time Td.

When the GTO 1c is turned off, the load current Io is cut off, bypassed to the path "16", and the snubber capacitor 4b is also discharged by the path "17". That is, the load current Io is equal to the path “16” and the path “17”.
Will be supplied by Thereby, GTO1c
Dv / dt is suppressed.

Since the snubber capacitor 4b and the recovery capacitor 7b are arranged in series on the path "17",
The voltage rise rate dv / dt applied to the GTO 1c is calculated as (1
It is obtained from the equation (0). In addition, the recovery capacitors 4a, 4
If the capacitance Co of b satisfies the above equation (11),
The voltage rise rate dv / dt of the GTO 1c is given by the above equation (12).

Thereafter, the snubber capacitor 4d applies the voltage (E
+ E), and the snubber capacitor 4b is connected to the path “1”.
7, the energy of the snubber capacitor 4b is recovered by the recovery capacitor 7b. This causes the freewheel diode 2b to conduct, so that the load current Io starts to flow through the path “1”. here,
Even if GTO1b is turned on after the short circuit prevention time Td, the circuit state does not change.

Through the above process, the load current Io flows through the path “1”, and the voltage at the output terminal X becomes 0. Note that the circuit operation in the four switching modes (see FIG. 6) when the direction of the load current Io is the arrow (b) is completely the same as the circuit operation when the direction of the load current Io is the arrow (a). The description is omitted because it is symmetric.

As described above, the three-level inverter device shown in FIG. 8 can suppress the voltage rise rate dv / dt and the current rise rate di / dt in the switching operation of GTOs 1a, 1b, 1c, 1d, and , Snubber capacitors 4a, 4b, 4c, 4d and reactor 5a,
5b collects all the energy stored in the storage capacitors 7a,
7b.

The power regeneration circuits 8a and 8b are not the main circuits of the present invention, but it is shown in the following embodiment 5 that the present invention circuit can be realized using a specific circuit. explain.

Embodiment 5 FIG. FIG. 9 shows the first to fourth embodiments.
FIG. 9 is a circuit configuration diagram showing a specific example of power regeneration circuits 8, 8a, 8b in FIG. 6, where 6, 7, and 9 are the same as those described above. Here, a case where the present invention is applied to the power regeneration circuit 8 in FIG. 4 is shown, but it is needless to say that the present invention can be applied to the power regeneration circuit of another embodiment.

In FIG. 9, 20a, 20b, 20c,
Reference numeral 20d denotes two pairs of self-extinguishing semiconductor devices (hereinafter simply referred to as "switches") having a relatively high withstand voltage connected in parallel to the recovery capacitor 7. Diodes are connected in anti-parallel to the respective switches 20a to 20d. I have. Reference numeral 21 denotes a transformer whose primary side is connected to a connection point of each pair of switches 20a to 20d, and has a primary and secondary turns ratio of (1)
3) is set as in the equation.

Primary: secondary = 1: Nk (13)

Reference numerals 22a, 22b, 22c and 22d denote two pairs of diodes connected between both ends of the DC power supply 9. The connection point of each pair of the diodes 22a to 22d is connected to the secondary side of the transformer 21. I have. Here, assuming that the recovery capacitor 7 is controlled to the low voltage e, the turns ratio Nk is desirably set as in the following equation (14).

Nk = E / e (14)

The switches 20a to 20d form a bridge, and the switches 20a, 20d and 20c, 20b, each of which is a combination of one and the other of each pair, are alternately switched for each combination. The two switches are switched at the same time.

[0170] That is, first, when turning on the switch 20a, the 20d, the primary side of the transformer 21 is a voltage of the recovery capacitor 7 is denoted by "point" side as the positive, 2 the transformer 21 On the next side, the voltage of Nk times the "point"
It is induced with the attached side being positive.

If the secondary induced voltage of transformer 21 is equal to or higher than voltage E of DC power supply 9, bridge-structured diode 22a
-22d, the diodes 22a and 22d become conductive,
The recovery capacitor 7 discharges and flows to the primary side of the transformer 21, and a current 1 / N times the discharge current flows to the secondary side. Therefore, the energy of the recovery capacitor 7 can be regenerated to the DC power supply 9.

When the switches 20a and 20d are turned off,
The discharge of the recovery capacitor 7 is turned off, and the energy stored in the transformer 21 is recovered by the recovery capacitor 7 again by the antiparallel diodes of the switches 20a and 20d.

Next, when the switches 20b and 20c are turned on, excessive energy of the recovery capacitor 7 is regenerated to the DC power supply 9 according to the above-described operation principle. By increasing the frequency of this switching operation, the voltage of the recovery capacitor 7 can be controlled to a substantially constant voltage e. Further, the size of the transformer 21 can be reduced. These can be realized because the voltage of the recovery capacitor 7 is low.

Further, an advantage of the power regeneration circuit 8 shown in FIG. 9 is that the application of a bipolar voltage to the transformer 21 can prevent the transformer 21 from being demagnetized. In addition, since the charging current of the recovery capacitor 7 is unidirectional due to the polarity diode 6, it is possible to prevent the transformer 21 from being demagnetized due to the reverse current.

According to the above description, power regeneration circuits 8, 8
It is apparent that all the above-described first to fourth embodiments can be realized using the specific circuits a and 8b.

Embodiment 6 FIG. FIG. 10 is a circuit diagram showing a sixth embodiment (corresponding to claim 5) of the present invention in which a three-level inverter device is taken as an example, and the same reference numerals are used as those in FIG. 8 (fourth embodiment). It is similar.

Referring to FIG. 10, only differences from FIG. 8 will be described. Reference numerals 18a and 18b denote discharge resistors.
Snubber diodes 3a, 3b and snubber capacitors 4a,
4b and each connection point between snubber diodes 3c and 3d and snubber capacitors 4c and 4d.

The discharge resistor 18a is composed of the polarity diode 6a, the recovery capacitor 7a and the power regeneration circuit 8a shown in FIG.
, The discharge resistor 18b corresponds to the polarity diode 6b, the recovery capacitor 7b, and the power regeneration circuit 8b in FIG. Note that the operation principle is the same as that of the fourth embodiment, and the description is omitted.

With the configuration of FIG. 10, the number of components as a three-level inverter device is significantly reduced as compared with the case of FIG. 8 (Embodiment 4). This configuration includes the snubber capacitors 4a, 4b, 4c, 4d and the anode reactor 5
This is effective when the energy stored in a and 5b is relatively small.

Embodiment 7 FIG. FIGS. 11 and 12 are circuit diagrams showing a seventh embodiment of the present invention in which an inverter device (corresponding to claim 6) and a three-level inverter device (corresponding to claim 7) are taken as examples. Is the same as described above. In addition, in each of the drawings, reference numerals 23 and 24 denote switching circuits including a GTO, a snubber circuit, and a reactor, and the specific configuration thereof is not particularly limited to the embodiment.

25a, 25b and 25c are DC power sources 9, 9
a, 9b and wiring inductances formed in the wiring connecting the switching circuits 23 and 24, 26, 26a, 2
6b is a diode, and 27, 27a and 27b are capacitors connected in series to the diodes 26, 26a and 26b.

A series circuit including diode 26 and capacitor 27 is inserted between positive bus P and negative bus N, and a series circuit including diode 26a and capacitor 27a is connected between positive bus P and intermediate potential point C. And a series circuit including the diode 26b and the capacitor 27b is inserted between the intermediate potential point C and the negative bus N.

The discharge resistor 18 is connected in parallel between both ends of the diode 26, and the discharge resistors 18a and 18b are connected in parallel between both ends of the diodes 26a and 26b. Diodes 26, 26a, 26b, capacitors 27, 27a, 27b and discharge resistors 18, 1
8a and 18b each constitute a voltage clamp circuit for each phase.

Generally, a large-capacity inverter device or 3
When configuring the level inverter device, the DC power supplies 9
Wiring inductances 25a, 25b, and 25c between a and 9b and the half bridges constituting each phase of the inverter device or the three-level inverter device may have nonnegligible values.

In such a case, the wiring inductance 25
The energy stored in a, 25b, and 25c may cause the snubber capacitors in the switching circuits 23 and 24 to overcharge, causing an overvoltage to be applied to the self-extinguishing semiconductor device (for example, GTO).

Therefore, as shown in FIGS. 11 and 12, diodes 26, 26a, 26b, capacitors 27, 27a,
The energy of the wiring inductances 25a, 25b, 25c is absorbed by the capacitors 27, 27a, 27b by connecting a voltage clamp circuit composed of 27b and discharge resistors 18, 18a, 18b to each phase.

At this time, capacitors 27, 27a, 27
The capacitance of b is preferably selected to be about several times that of the snubber capacitor. As a result, no overvoltage is applied to the GTO, and the discharge resistors 18, 18a,
18b can be commonly used.

Embodiment 8 FIG. FIGS. 13 and 14 are circuit diagrams showing a seventh embodiment of the present invention in which an inverter device (corresponding to claim 8) and a three-level inverter device (corresponding to claim 9) are taken as examples. Is the same as described above.

In FIGS. 13 and 14, FIGS.
The difference from the seventh embodiment is that the discharge resistors 18, 18a, 18b in FIGS.
a, 10b, diodes 11, 11a, 11b and chopper circuits (power regeneration circuits 8, 8a, 8b) comprising self-extinguishing semiconductor elements 12, 12a, 12b.

In this case, the diode 26 corresponds to a polarity diode, and the capacitor 27 corresponds to a recovery capacitor. In the eighth embodiment shown in FIGS. 13 and 14, the voltage of the capacitors 27, 27a, 27b absorbing the energy of the wiring inductances 25a, 25b, 25c is slightly higher than the voltage E of the DC power supplies 9, 9a, 9b. .

The energy of the capacitors 27, 27a, 27b is transferred to the reactors 10, 10a, 10b by the ON operation of the self-extinguishing semiconductor elements 12, 12a, 12b. Then, the self-extinguishing semiconductor devices 12, 12a,
The reactors 10, 10a, 1 are turned off by the off operation of 12b.
The energy of 0b is regenerated to the DC power supplies 9, 9a, 9b via the diodes 11, 11a, 11b.

Thus, the efficiency of the inverter device or the three-level inverter device can be improved, and, of course, the overvoltage of the self-extinguishing semiconductor device (eg, GTO) constituting the inverter device or the three-level inverter device can be reduced. It can also be suppressed. The chopper circuits 8, 8a, 8b can be used in common.

Embodiment 9 FIG. In the eighth embodiment, the energy extracted from the recovery capacitors 27, 27a, 27b by the power regeneration circuits 8, 8a, 8b is
The regenerative power is supplied to the DC power supply 9, 9a, 9b of the inverter device or the three-level inverter device.
It may be fixed to a DC power supply or the like in a gate drive circuit (not shown) of the self-extinguishing semiconductor devices 12, 12a, 12b.

Embodiment 10 FIG. In each of the above embodiments, a resistor, a self-extinguishing semiconductor device (for example, GTO) connected to the output terminals A and X is further added.
A snubber circuit composed of a diode and a capacitor may be connected. In this case, the capacitance of the capacitor of the additional snubber circuit may be small. Such a configuration is effective when the effect of suppressing the voltage rise rate of the target self-extinguishing semiconductor device needs to be enhanced.

Embodiment 11 FIG. In each of the above embodiments, the reactor 5 or the anode reactors 5a and 5b
Are provided as circuit components, but they need not necessarily be provided as circuit components. For example, their functions can be provided by the wiring inductances 25, 25a, and 25b (see FIGS. 11 to 14).

Embodiment 12 FIG. In each of the above embodiments, an inverter device or a three-level inverter device has been described as an example. However, the present invention operates similarly when applied to another power conversion device such as a converter device, and has the respective functions and effects. Needless to say.

Embodiment 13 FIG. Further, the third embodiment (FIG. 5)
In the fourth embodiment (FIG. 8), the recovery capacitors 7a and 7b of the three-level inverter device are connected to both input terminals of the power regeneration circuits 8a and 8b, respectively, but one end of each of the recovery capacitors 7a and 7b is connected to the positive and negative buses P. , N. Next, the recovery capacitors 7a and 7b are connected to the positive and negative buses P and N, respectively.
A thirteenth embodiment (corresponding to claim 13) of the present invention will be described with reference to the drawings in the case of a device connected to the present invention.

FIG. 15 is a circuit diagram showing a thirteenth embodiment of the present invention. In the figure, the components denoted by the same reference numerals are the same as those described above. Therefore, GTOs 1a to 1d are used as self-extinguishing type semiconductor elements, and are connected between positive and negative buses PN of DC power supplies 9a and 9b having an intermediate potential point C.
GTOs 1a, 1c and 1d, 1b are connected as positive and negative arms.

Freewheel diodes 2a to 2d are connected in anti-parallel to GTOs 1a to 1d, respectively.
A clamp diode 14a is connected between a series connection point of TO1a and GTO1c and an intermediate potential point C, and GTO
A clamp diode 14b is connected between a series connection point between the first arm 1c and the GTO 1b and an intermediate potential point C, and an output terminal X is provided at a connection point between the positive arm and the negative arm.

For GTO 1a connected to positive bus P via anode reactor 5a, snubber capacitor 4a and snubber diode 3 connected in series are connected.
a GTO connected in parallel to the negative bus P via the anode reactor 5b
1b, a snubber capacitor 4b connected in series
And a snubber circuit including a snubber diode 3b are connected in parallel.

Similarly, clamp diodes 14a and 14
Snubber circuits 4c and 3c and 4d and 3d are also connected in parallel to b. Also, the snubber diodes 3c, 3
Discharge resistors 18a and 18b are connected in parallel between both ends of d.

In this case, the recovery capacitors 7a and 7b
Connected to the positive and negative buses P and N, a snubber capacitor 4
a, 4b and the energy stored in the anode reactors 5a, 5b are recovered through the diodes 6a, 6b. Power regeneration circuits 8a and 8b each composed of switches 12a and 12b, diodes 11a and 11b, and reactors 10a and 10b extract power energy from the recovery capacitors 7a and 7b and regenerate them to the DC power supply 9a.

In this case, the voltage of each of the DC power supplies 9a and 9b is E, the recovery capacitors 7a and 7b are charged to the voltage e with the side marked with "dot" being positive, and the output terminal X is connected to an output terminal X (not shown). A load is connected, and the vector of the load current Io does not change during the switching operation of each of the GTOs 1a to 1d.

Next, referring to a timing chart (FIG. 16) showing a switching operation of each of the GTOs 1a to 1d and an explanatory diagram (FIG. 17) showing a current path flowing through the circuit in FIG. 15, FIG. The operation of the thirteenth embodiment of the present invention will be described. First, a circuit operation when the voltage of the output terminal X is changed from 2E to E by turning off the GTO 1a will be described.

Now, the GTOs 1a and 1c of the positive arm are on, the GTOs 1d and 1b of the negative arm are off, and the output terminal X is connected to the output terminal X via the path "41" (see FIG. 17). It is assumed that the load current Io flows in the direction. In this case, the snubber capacitor 4a, the respective voltages of 4d 0, snubber capacitor 4c, the voltage of 4b, the DC power source 9
a, 9b and the voltage e of the recovery capacitors 7a, 7b
Is charged to the sum voltage value of
Consider a case in which O1a is turned off to cut off load current Io, and GTO1d is turned on after a certain short circuit prevention time Td.

When the GTO 1a is turned off, the interrupted load current Io is bypassed to the path "42", and the snubber capacitor 4a is charged to the sum of the voltage E of the DC power supply 9a and the voltage e of the recovery capacitor 7a. Is done. At this time, the snubber capacitor 4a suppresses the voltage rise rate dv / dt applied to the GTO 1a.

Immediately after that, power energy is excessively stored in the anode reactor 5a, but all excess energy is recovered by the recovery capacitor 7a via the path "43". The difference from the related art (see FIG. 31) is that this path “43” does not include the DC power supply 9a. Therefore, the charging voltage of the recovery capacitor 7a can be reduced.

When GTO1d is turned on after short-circuit prevention time Td after GTO1a is turned off, snubber capacitor 4c is discharged to voltage 0 via path "44". At this time, the current increase rate di / dt due to the discharge current of the snubber capacitor 4c applied to the GTO 1d is suppressed by the discharge resistor 18a, but the energy stored in the snubber capacitor 4c is consumed by the discharge resistor 18a. .

When the charging voltage of snubber capacitor 4a is equal to voltage E
Then, the clamp diode 14a becomes conductive.
Through this process, the load current Io flows through the path “45”, and the circuit operation for changing the voltage of the output terminal X from 2E to E by turning off the GTO1a ends.

Next, the circuit operation when the voltage at the output terminal X is changed from E to 0 by turning off the GTO 1c will be described. Now, GTO1a of the positive arm is off, GTO1c is on, GTO1d of the negative arm is on,
It is assumed that the GTO 1b is off, and the load current Io flows to the output terminal X via the path “45” in the direction of the arrow (a) in the figure.

At this time, each voltage of snubber capacitors 4c and 4d is 0, and each voltage of snubber capacitors 4a and 4b is
Voltage E of DC power supplies 9a and 9b and recovery capacitors 7a and 7
It has been charged to the sum of the voltage b and the voltage e. From this state, a case is considered in which the GTO 1c is turned off to cut off the load current Io, and the GTO 1b is turned on after the short circuit prevention time Td.

When the GTO 1c is turned off, the interrupted load current Io is bypassed to the path "46", and the snubber capacitor 4d is charged to the sum of the voltage E of the DC power supply 9b and the voltage e of the recovery capacitor 7b. Is done. At this time, the snubber capacitor 4d suppresses the voltage rise rate dv / dt applied to the GTO 1c .

When the GTO 1b is turned on after the short-circuit prevention time Td after the GTO 1c is turned off, the snubber capacitor 4b discharges to the voltage 0 via the path "47", and the power energy stored in the snubber capacitor 4b is It is collected by the collection capacitor 7b via “47”.

Immediately thereafter, excessive energy is stored in the anode reactor 5b, but all excess energy is recovered by the recovery capacitor 7b via the path "48". The difference from the conventional (FIG. 31) is that the route “4
7 and 48 do not include the DC power supply 9b.
Therefore, the charging voltage of the recovery capacitor 7b can be reduced.

When the charging voltage of snubber capacitor 4c reaches voltage E, freewheeling diodes 2d and 2b
Becomes conductive. Through this process, the load current Io flows through the path “49”, and the circuit operation for changing the voltage of the output terminal X from E to 0 ends by turning off the GTO 1c.

Next, the circuit operation when the voltage at the output terminal X is changed from 0 to E by turning off the GTO 1b will be described. Now, GTO1a, 1c of the positive arm
Is off, and the GTOs 1d and 1b of the negative arm are on,
Through the path "49", the output terminal X connects the arrow (a) shown in the figure.
It is assumed that the load current Io flows in the direction of.

At this time, each voltage of snubber capacitors 4c and 4b is 0, and snubber capacitors 4a and 4d are
It has been charged to the sum of the voltage E of the capacitors 9a and 9b and the voltage e of the recovery capacitors 7a and 7b . From this state, G
TO1b is turned off, and after short circuit prevention time Td, GT
Consider the case where O1c is turned on.

Here, even if the GTO 1b is turned off, the circuit state does not change because the load current Io flows from the output terminal X through the path "49" in the direction of the arrow (a) in the figure. When the GTO 1c is turned on, the voltage E of the divided DC power supply 9b is applied to the anode reactor 5b, and the current increase rate di /
The load current Io starts to be supplied to the path “45” while dt is suppressed by the anode reactor 5b.

The snubber capacitor 4d is connected to the path "5
Discharge to voltage 0 via "0". After that, GTO1c
The current flowing through the path becomes equal to or greater than the load current Io, but the excess current becomes the charging current of the snubber capacitor 4b flowing through the path "51", and the snubber capacitor 4b is connected to the voltage E of the DC power supply 9b and the voltage e of the recovery capacitor 7b. Is charged up to the sum of the voltages.

Immediately after that, although the energy is excessively accumulated in the anode reactor 5b, the path “4”
8 ", the excess energy is all
b. The difference from the conventional (FIG. 31) is that
The point is that the DC power supply 9b is not included in this path “48”. Therefore, the charging voltage of the recovery capacitor 7b can be reduced.

Through this process, the load current Io flows through the path "45", and the circuit operation when the voltage at the output terminal X changes from 0 to E by turning off the GTO 1c is completed.

Next, a circuit operation in the case where the voltage at the output terminal X is changed from E to 2E by turning off the GTO 1d will be described. Now, the GTO1a of the positive arm and the GTO1b of the negative arm are off, the GTO1c of the positive arm and the GTO1d of the negative arm are on, and the load current Io flows from the output terminal X in the direction of the arrow (a) in FIG. Shall be

At this time, the voltages of the snubber capacitors 4c and 4d are 0, and the voltages of the snubber capacitors 4a and 4b are respectively the voltage E of the DC power supplies 9a and 9b and the recovery capacitors 7a and 7b.
It has been charged to the sum of the voltage b and the voltage e. From this state, the GTO 1d is turned off, and the short circuit prevention time Td
It is assumed that the GTO 1a is turned on later.

Here, even if the GTO 1d is turned off, the circuit state does not change because the load current Io flows from the output terminal X through the path "45" in the direction of the arrow (a) in the figure.

When the GTO 1a is turned on, the voltage E of the divided DC power supply 9a is applied to the anode reactor 5a.
Is applied, and the current rise rate di / dt applied to the GTO1a is increased.
Is suppressed by the anode reactor 5a, and the load current Io starts to be supplied via the path "41".

Thereafter, the current flowing through the GTO 1a becomes equal to or greater than the load current Io.
The charging current of the snubber capacitor 4c flows through the snubber capacitor 4c, and the snubber capacitor 4c is charged up to the sum of the voltage E of the DC power supply 9a and the voltage e of the recovery capacitor 7a.

Further, the snubber capacitor 4a discharges to the voltage 0 via the path "53" and the snubber capacitor 4a
Is recovered by the recovery capacitor 7a via the path "53".

Immediately after that, power energy is excessively accumulated in the anode reactor 5a, but all excess energy is recovered by the recovery capacitor 7a via the path "43". The difference from the conventional case (FIG. 31) is that the paths "43" and "53" do not include the DC power supply 9a. Therefore, the charging voltage of the recovery capacitor 7a can be reduced.

Through this process, the load current Io is changed to the path “4”.
1 ", and the circuit operation for changing the voltage at the output terminal X from E to 2E by turning off the GTO 1d ends.

Note that the switching operation of each of the GTOs 1a to 1d when the load current Io flows in the direction of the arrow (b) in the figure indicates the load current Io in the direction of the arrow (a) in the figure.
Since the switching operation of each of the GTOs 1a to 1d when o flows is completely symmetric, the description is omitted.

Next, the operation of power regeneration circuits 8a and 8b will be described. Although the power regeneration circuits 8a and 8b themselves are not the main components of the present invention, it is shown that the thirteenth embodiment of the present invention can be realized by an applicable known specific circuit . First, the power regeneration circuit 8a connected to the recovery capacitor 7a will be described.

That is, the switch 12a and the diode 11a
And a power regeneration circuit 8a composed of a reactor 10a extracts energy from a recovery capacitor 7a whose charging polarity is determined to be positive on the side marked with a "dot" in the drawing, and regenerates the energy into a divided DC power supply 9a to recover the recovery capacitor. The function of controlling the charging voltage 7a to a constant value e can be satisfied.

First, the switch 12a is turned on, and the electric energy stored in the recovery capacitor 7a is discharged to the reactor 10a via the path "54". Next, when the switch 12a is turned off to interrupt the discharge current, a current flows through the path "55" due to the power energy stored in the reactor 10a, and is regenerated to the DC power supply 9a. By controlling the ON / OFF period or ON / OFF cycle of the switch 12a at this time by the voltage of the recovery capacitor 7a, the charging voltage of the recovery capacitor 7a can be maintained at a constant value.

Note that the power regeneration circuit 8b and the recovery capacitor 7b are the same as those described above, and will not be described. In addition to the circuit shown in FIG.
It is apparent that the same effect can be obtained by applying the / DC power conversion circuit.

The same effect can be obtained by applying the same configuration as the power regeneration circuits 8a and 8b and using a so-called resonance operation in which the on / off operation of the switch 12a is performed at zero current or zero voltage. Is clear.

Embodiment 14 FIG. In the above-described embodiment 13,
Although one end of each of the recovery capacitors 7a and 7b is connected to the positive and negative buses P and N, one end of each of the recovery capacitors 7a and 7b may be connected to each other as in the related art (FIG. 31). FIG. 18 is a circuit diagram showing a fourteenth embodiment (corresponding to claim 13) of the present invention when one end of each of the recovery capacitors 7a and 7b is connected. In the drawing, the components denoted by the same reference numerals are the same as those described above. belongs to.

In this case, however, the recovery capacitors 7a,
Since the capacitor 7b is provided at the same position as the conventional one (FIG. 31), the charging voltage of the recovery capacitors 7a and 7b becomes higher than the voltage E of the DC power supplies 9a and 9b. Therefore, in consideration of downsizing of the device in practical use, the three-level inverter device of the thirteenth embodiment (FIG. 15) is more advantageous.

Embodiment 15 FIG. In the above-described embodiment 14,
Although the power regeneration circuits 8a and 8b are provided,
a, 8b may be omitted and replaced with another discharge resistor. FIG. 19 is a circuit diagram showing a fifteenth embodiment (corresponding to claim 14) of the present invention in which the power regenerating circuits 8a and 8b are omitted. In the drawing, the components denoted by the same reference numerals are the same as those described above. It is.

In FIG. 19, the difference from the thirteenth embodiment (FIG. 15) is that discharge resistors 18a and 18b are inserted in the discharge paths of snubber capacitors 4a and 4b. Also, the recovery capacitor 7 in FIG.
a, 7b and power regeneration circuits 8a, 8b are replaced by discharge resistors 18c, 18d connected to the positive and negative buses P, N, respectively.

Next, the circuit operation of the fifteenth embodiment of the present invention shown in FIG. 19 will be described with reference to the current path explanatory diagram of FIG. Here, it is assumed that the load current Io flows in the direction of the arrow (a) in the figure.

First, when the GTO 1a is turned off to change the voltage at the output terminal X from 2E to E, the cut-off load current Io is bypassed to the path "42".
Snubber capacitor 4a is charged to voltage E of DC power supply 9a. Immediately after this, the anode reactor 5
Power energy is excessively stored in a. At this time,
In FIG. 15, the power energy recovered by the recovery capacitor 7a is transferred to the discharge resistor 18 via the path "56".
consumed by c.

Next, in order to change the voltage of the output terminal X from E to 0, the GTO 1c is turned off and the GTO 1b is turned on after the short-circuit prevention time Td , and the snubber capacitor 4b is connected via the path "57". Discharge to 0. At this time, in FIG.
b is discharged to the discharge resistor 18d.
Consumed by Further, a part of the power energy is transferred to the anode reactor 5b, and a part of the energy is also consumed by the discharge resistor 18d via the path "58".

Next, a case will be described where the GTO 1c is turned off and the GTO 1c is turned on after the short circuit prevention time Td in order to change the voltage of the output terminal X from 0 to E.

First, when GTO1c is turned on, G
The current flowing through TO1c becomes equal to or greater than the load current Io, and the excess current flowing through the path "51" causes excess energy to be stored in the anode reactor 5b. At this time, FIG.
5, the excess energy recovered by the recovery capacitor 7 b is completely discharged via the path “58” to the discharge resistor 1.
Consumed by 8d.

Next, a case will be described in which the GTO 1c is turned off and the GTO 1a is turned on after the short circuit prevention time Td in order to change the voltage of the output terminal X from E to 2E. First, when the GTO 1a is turned on, the current flowing through the GTO 1a becomes equal to or more than the load current Io, and the excess current flowing through the path “52” causes excess power energy to be stored in the anode reactor 5a. At this time, the energy recovered in the recovery capacitor 7a in FIG. 15 is all consumed by the discharge resistor 18c via the path "56".

In the case where the load current Io flows in the direction of the arrow (b) in FIG.
GTO1a when the load current Io flows in the direction of
Since the operation is completely symmetrical with the switching operation of 1d to 1d, the description is omitted.

Embodiment 16 FIG. Note that the above embodiment 15 (FIG. 1)
In 9), no recovery capacitor is used, but recovery capacitors 7a and 7b may be provided as in the conventional case (FIG. 31). FIG. 20 is a circuit diagram showing a sixteenth embodiment (corresponding to claim 14) of the present invention in which the recovery capacitors 7a and 7b are provided. In the drawing, the components denoted by the same reference numerals are the same as those described above. is there.

In this case, recovery capacitors 7a and 7b are provided at the same position as in the prior art (FIG. 31), and discharge resistors 18c connected to positive and negative buses P and N instead of power regeneration circuits 8a and 8b. , 18d are inserted. However, according to the configuration of FIG. 20, the recovery capacitors 7a, 7b
Is higher than the voltage E of the DC power supplies 9a and 9b,
Further, since the number of components increases, the three-level inverter device of FIG. 19 is more advantageous in consideration of practical miniaturization of the device.

Embodiment 17 FIG. Although the discharge resistors 18a and 18b are connected in parallel between both ends of the snubber diodes 3c and 3d in the above-described embodiments 13 to 16, the discharge resistors are connected in parallel to the series circuit of the snubber diodes 3c and 3d. You may connect. FIG. 21 shows snubber diodes 3c and 3
Embodiment 17 of the present invention in which the discharge resistor 18 is connected in parallel to the series circuit d.
4 (corresponding to FIG. 4), and in the figure, the components denoted by the same reference numerals are the same as those described above.

In this case, each clamp diode 14a,
A single discharge resistor 18 is connected between each connection point between the snubber capacitors 4c and 4d and the snubber diodes 3c and 3d of the snubber circuit connected in parallel to 14b.

Embodiments 13 to 16 (FIG. 1)
5, FIGS. 18 to 20), discharge resistors 18a,
18b are connected separately, but even if one discharge resistor 18 is connected as shown in FIG. 21, all circuits operate in the same manner as described above. Therefore, the configuration shown in FIG. 21 is advantageous if the reduction of components (downsizing) is more important than the reduction of the duty of processing power consumption in one discharge resistor 18 in practical use.

Embodiment 18 FIG. In the above-described embodiment 13,
Although two power regeneration circuits 8a and 8b for regenerating the power energy of each recovery capacitor 7a and 7b are provided, another recovery capacitor and a power regeneration circuit related to this recovery capacitor may be added. FIG. 22 is a circuit diagram showing an eighteenth embodiment (corresponding to claim 15) of the present invention in which a power regeneration circuit is added. In the drawing, the components denoted by the same reference numerals are the same as those described above.

In FIG. 22, only the configuration different from that of FIG. 15 will be described. 6c and 6d are snubber circuits 4c and 3c and 4d and 3 of clamp diodes 14a and 14b.
d, a polarity diode connected to each connection point, 30a, 3
0b is an auxiliary reactor connected to the polarity diodes 6c and 6d, 7c and 7d are recovery capacitors inserted between the auxiliary reactors 30a and 30b and the intermediate potential point C, 8
Reference numerals c and 8d denote power regeneration circuits connected to connection points between the auxiliary reactors 30a and 30b and the respective recovery capacitors 7c and 7d.

That is, the connection point between the snubber diode 3c and the snubber capacitor 4c is connected to the intermediate potential point C via the polarity diode 6c, the auxiliary reactor 30a and the recovery capacitor 7c. The connection point between the snubber diode 3d and the snubber capacitor 4d is connected to the polarity diode 6d, the auxiliary reactor 30b and the recovery capacitor 7d.
It is connected to the intermediate potential point C via d.

The power regeneration circuit 8c connected to the recovery capacitor 7c is composed of a switch 12c, a diode 11c and a reactor 10c.
The power regeneration circuit 8d connected to is composed of a switch 12d, a diode 11d, and a reactor 10d.

Next, the circuit operation of the eighteenth embodiment of the present invention shown in FIG. 22 will be described with reference to the current path explanatory diagram of FIG. In this case, the snubber capacitors 4c,
The power energy stored in 4d is recovered in recovery capacitors 7c and 7d, respectively. This point is described above (FIG. 15).
Therefore, the description is limited to this point.

First, when the power energy stored in the snubber capacitor 4d is recovered by the recovery capacitor 7d by turning on the GTO 1c, the snubber capacitor 4d
Is charged to the sum of the voltage E of the DC power supply 9b and the charging voltage e of the recovery capacitor 7d, the GTO 1c is turned on.

Thus, the discharge path of the snubber capacitor 4d becomes the path "59" via the recovery capacitor 7d, and a part of the power energy of the snubber capacitor 4d is recovered by the recovery capacitor 7d. At this time, GTO1
c, The current increase rate di / dt applied to the GTO 1d is suppressed by the auxiliary reactor 30b.

After that, even if snubber capacitor 4d is discharged to a voltage of 0, power energy is stored in auxiliary reactor 30b.
"0" is collected by the collection capacitor 7d. Therefore, all the power energy stored in the snubber capacitor 4d is recovered by the recovery capacitor 7d.

On the other hand, when the power energy stored in the snubber capacitor 4c is recovered by the recovery capacitor 7c by turning on the GTO 1d , the snubber capacitor 4c
The GTO 1d is turned on from the state where c is charged to the sum of the voltage E of the DC power supply 9a and the charging voltage e of the recovery capacitor 7c.

As a result, the discharge path of the snubber capacitor 4c becomes the path "61" via the recovery capacitor 7c, and a part of the energy of the snubber capacitor 4c is recovered by the recovery capacitor 7c. At this time, GTO1c, GT
The current increase rate di / dt applied to O1d is suppressed by auxiliary reactor 30a.

After that, even if snubber capacitor 4c is discharged to a voltage of 0, power energy is stored in auxiliary reactor 30a.
2 "to the recovery capacitor 7c. Therefore, all the power energy stored in the snubber capacitor 4c is recovered by the recovery capacitor 7c. The power regeneration circuit 8 connected to the recovery capacitors 7c and 7d
The operations of c and 8d are exactly the same as those described above (FIG. 15), and will not be described.

Embodiment 19 FIG. Note that in Example 18 above,
Although the case where the recovery capacitors 7a and 7b are connected to the positive and negative buses P and N is shown, they may be connected to the intermediate potential point C as in the conventional case (FIG. 31).

FIG. 23 is a circuit diagram showing a nineteenth embodiment (corresponding to claim 15) of the present invention in the case where the recovery capacitors 7a and 7b are connected to the intermediate potential point C side. The configuration is the same as described above.

In this case, the recovery capacitors 7a and 7b are provided at the same position as the conventional one (FIG. 31). However, according to the configuration of FIG. 23, the charging voltage of the recovery capacitors 7a and 7b becomes equal to or higher than the voltage E of the DC power supplies 9a and 9b.
Is more advantageous.

Embodiment 20 FIG. In addition, Example 18 (FIG. 2)
In 2), the case of a single-phase three-level inverter has been described as an example, but it is needless to say that the present invention can be applied to a multi-phase three-level inverter. In the case of multi-phase, the configuration can be simplified by connecting the recovery capacitors 7a to 7d and the power regeneration circuits 8a to 8d in common to each phase.

FIG. 24 is a circuit diagram showing a twentieth embodiment (corresponding to claim 16) of the present invention when applied to a polyphase three-level inverter device. In FIG. It is similar.

In this case, a plurality (two-phase) of the same configuration
Are symmetrically connected to the left and right of the DC power supplies 9a and 9b, and the recovery capacitors 7a to 7d
The power regeneration circuits 8a to 8d are commonly connected for each phase. Note that the basic circuit operation in the twentieth embodiment (FIG. 24) is exactly the same as that of the above-described thirteenth to nineteenth embodiments, and a description thereof will not be repeated.

Although not particularly shown, FIGS.
Also in each of the embodiments shown in FIG. 3, when the multi-phase configuration is adopted as in FIG. 24, the power regeneration circuit 8a, 8b or 8a
Obviously, it is possible to realize a circuit configuration in which ~ 8d is shared.

Embodiment 21 FIG. In the twentieth embodiment,
Although the influence of the wiring inductance is not considered, another collecting capacitor may be connected in parallel to each of the collecting capacitors 7a to 7d in order to suppress the effect of the wiring inductance.

FIG. 25 shows a second embodiment of the present invention in which a recovery capacitor is connected in parallel to each of the recovery capacitors 7a to 7d.
FIG. 18 is a circuit configuration diagram showing a circuit configuration 1 (corresponding to claim 17). In the drawing, configurations denoted by the same reference numerals are the same as those described above.

In FIG. 25, reference numerals 7e to 7h denote recovery capacitors connected in parallel to the recovery capacitors 7a to 7d.
Reference numerals 0a to 40d denote compensation circuits inserted between one end of each of the recovery capacitors 7a to 7d and one end of each of the recovery capacitors 7e to 7h. Each of the compensation circuits 40a to 40d includes a diode or a resistor, or a series circuit of a diode and a resistor, and suppresses the influence of wiring inductance.

As shown in FIG. 25, when the three-level inverter device has a multi-phase configuration, the recovery capacitor 7a is provided for each phase.
To 7d, and common recovery capacitors 7e to 7h for each phase. Recovery capacitors 7e to 7h
And power regeneration circuits 8a to 8d connected to these
Commonly connected for each phase. Since the basic operation of the circuit is exactly the same as in each of the above-described embodiments,
Here, it is omitted.

By inserting compensation circuits 40a to 40d between recovery capacitors 7a to 7d connected for each phase and recovery capacitors 7e to 7h common for multiple phases, recovery capacitors 7a to 7d and 7e ~
The oscillating current due to the influence of the wiring inductance during 7 h can be attenuated and suppressed. Thereby, the stable operation of the device can be compensated.

Although not shown in the drawings, the thirteenth embodiment
Also in the embodiment (FIG. 15) to the embodiment 19 (FIG. 23), it is possible to realize a circuit configuration in which the power regeneration circuits 8a and 8b or 8a, 8b, 8c and 8d are shared in the same manner as the embodiment 21. it is obvious.

Embodiment 22 FIG. In the above-described embodiments 13 to 17, the capacitance of the snubber capacitors 4d and 4b is preferably reduced as compared with the capacitance of the snubber capacitors 4a and 4c, so that the discharge resistors 18a and 1b are reduced.
Although the power energy consumed in 8b or 18 is reduced, the magnitude relationship between the capacitances of the snubber capacitors 4a, 4c and the snubber capacitors 4d, 4b does not need to be set to the above relationship. However, the above relationship is important if attention is paid to increasing the efficiency of the three-level inverter device.

In the eighteenth to twenty-first embodiments, if the magnitude relation of the capacitance is applied to the snubber capacitors 4a to 4d, the capacitance of the recovery capacitors 7c, 7d or 7g, 7h can be reduced. In addition, the ratings of the power regeneration circuits 8c and 8d can be reduced.

The combined capacitance of the snubber capacitors 4a and 4d is set to a value such that the voltage rise rate dv / dt applied when the load current Io is cut off by the GTO element alone falls within the rated value of the GTO element. It is desirable to be set.

The reason is that the voltage rise rate dv / dt when the load current Io applied to the GTOs 1a and 1d is cut off is suppressed by the combined capacitance of the snubber capacitors 4a and 4c.
This is because the circuit configuration is such that the voltage increase rate dv / dt applied to O1c and 1b when the load current Io is cut off is suppressed by the combined capacitance of the snubber capacitors 4d and 4b.

This means that in the three-level inverter device according to the embodiment of the present invention, the clamp diodes 14a,
Snubber circuits 4c, 3c and 4d, 3d in parallel with 14b
Is an advantage due to the connection.

Embodiment 23 FIG. In recent years, GTO1a-1d and freewheel
Developed reverse conducting GTO that integrates Iode 2a-2d
If you apply it, the freewheel die
The arms 2a to 2d can be omitted. In each of the above embodiments, GTO was used as the self-extinguishing type semiconductor element.
If another self-extinguishing type semiconductor element that can endure the steep current increase rate di / dt at the time of turn-on, for example, IGBT or the like is applied, the anode reactors 5a and 5b and the auxiliary reactors 30a and 30b can be omitted.

Further, even when a self-extinguishing type semiconductor element in which a critical value is specified for the steep current rise rate di / dt at the time of turn-on, for example, GTO, is applied, the anode reactor 5a, 5a, 5b, when the functions of the auxiliary reactors 30a and 30b can be performed, they may be omitted as circuit components.

Embodiment 24 FIG. In each of the above embodiments, if the connection wiring distance between the clamp diodes 14a, 14b and the self-extinguishing type semiconductor elements 1c, 1d has to be increased, it is stored in the wiring inductance parasitic to the wiring. It is assumed that the spike voltage increases due to the energy. In this case, it is effective to connect a capacitor that can absorb the power energy stored in the wiring inductance.

FIG. 26 is a circuit diagram partially showing an example of the twenty-fourth embodiment of the present invention in which a capacitor for absorbing the accumulated energy of the wiring inductance is provided.
1d, 2c, 2d, 3c, 3d, 18 and X are the same as described above. 4e and 4f are snubber diodes 3
Capacitors connected in series to c and 3d absorb power energy stored in the wiring inductance.

Embodiment 25 FIG. Further, in each of the above embodiments, the three-level inverter device that converts DC power into AC power has been described. However, it is needless to say that the present invention can be applied to a three-level inverter device that converts AC power into DC power. It goes without saying that the same effect can be achieved.

[0286]

As described above, according to the first aspect of the present invention, the first and second self-extinguishing type semiconductor elements connected in series between the positive and negative buses of the DC power supply are provided. First and second diodes connected in anti-parallel to each of the self-extinguishing semiconductor devices, a reactor connected in series between the first and second self-extinguishing semiconductor devices, and a second self-extinguishing device. An output terminal provided at a connection point between the arc type semiconductor element and the reactor, a snubber circuit including a first capacitor and a third diode connected in parallel to the first self-extinguishing type semiconductor element; A second capacitor and a fourth diode connected in series between a connection point between the capacitor and the third diode and an output terminal, and a second operation performed by a switching operation of the first and second self-extinguishing semiconductor elements. Stored in capacitor A power regeneration circuit that regenerates the recovered energy to the DC power supply, and controls the snubber circuit and the recovery capacitor for recovering the energy stored in the reactor to a voltage lower than the DC power supply voltage to reduce the voltage. Since the charging polarity is always unipolar, the components of the snubber circuit of the self-extinguishing semiconductor element are reduced without impairing the function of suppressing the steep voltage and current rises applied to the self-extinguishing semiconductor element to desired values. In addition, there is an effect that a power converter that realizes downsizing, low cost, and high efficiency can be obtained.

According to the second aspect of the present invention, the first and second self-extinguishing semiconductor elements connected in series between the positive and negative buses of the DC power supply are provided. A first and second diode connected in anti-parallel to each of the semiconductor elements, a reactor connected in series between the first and second self-turn-off semiconductor elements, a first self-turn-off semiconductor element; An output terminal provided at a connection point with the reactor, and a first terminal connected in parallel to the second self-extinguishing type semiconductor element.
A second capacitor and a fourth diode connected in series between a connection point between the first capacitor and the third diode and an output terminal; And a power regenerating circuit for regenerating the energy stored in the second capacitor to the DC power supply by a switching operation of the second self-extinguishing type semiconductor element, for recovering the energy stored in the snubber circuit and the reactor. A function that controls the recovery capacitor to a voltage lower than the DC power supply voltage, lowers the voltage, and keeps the charge polarity of the recovery capacitor unidirectional, and suppresses the steep rise of the voltage and current applied to the self-extinguishing semiconductor device to a desired value. Since the components of the snubber circuit of the self-extinguishing semiconductor device are reduced without compromising the size, the size, cost, and efficiency are reduced. The effect of the power conversion device that achieves reduction obtained.

According to the third aspect of the present invention, the first, second, third and fourth self-extinguishing semiconductor elements connected in series between the positive and negative buses of a DC power supply having an intermediate potential point are provided. , First, second, third, and fourth diodes connected in anti-parallel to each of the first, second, third, and fourth self-extinguishing semiconductor devices, and first and second self-extinguishing diodes. A first reactor connected between the arc-type semiconductor elements, a second reactor connected between the third and fourth self-arc-extinguishing semiconductor elements, a second self-arc-extinguishing semiconductor element and the first A fifth diode connected between the connection point with the first reactor and the intermediate potential point, and a fifth diode connected between the connection point between the third self-extinguishing semiconductor element and the second reactor and the intermediate potential point 6th done
A diode, an output terminal provided at a connection point between the second self-extinguishing semiconductor device and the third self-extinguishing semiconductor device, and a second terminal connected in parallel to the first self-extinguishing semiconductor device. 1
A first snubber circuit including a second capacitor and an eighth diode, a second snubber circuit including a second capacitor and an eighth diode connected in parallel to the fourth self-extinguishing semiconductor element, A third capacitor and a ninth diode connected in series between a connection point between the reactor and the second self-extinguishing semiconductor element and a connection point between the first capacitor and the seventh diode; A fourth capacitor and a tenth diode connected in series between a connection point between the second reactor and the third self-extinguishing semiconductor element and a connection point between the second capacitor and the eighth diode;
First and second power regenerating circuits for regenerating energy stored in the third and fourth capacitors to a DC power supply by a switching operation of the first, second, third and fourth self-extinguishing semiconductor elements; A self-extinguishing type semiconductor is controlled by controlling the voltage of the recovery capacitor for recovering the energy stored in the snubber circuit and the reactor to a voltage lower than the DC power supply voltage and always setting the charging polarity to one polarity. A configuration that reduces the components of the snubber circuit of the self-extinguishing type semiconductor element without impairing the function of suppressing the steep rise of the voltage and current applied to the element to a desired value, and has a flexibility in selecting the capacitance of the snubber capacitor. Because
There is an effect that a power converter that achieves downsizing, low cost, high efficiency, and improved reliability can be obtained. Also, when applied to a three-level converter device to drive various electric motors as a three-level converter / inverter system, or when applied to a power phase adjustment facility, the running cost is reduced and energy saving of the entire system is realized. This has the effect of obtaining a power conversion device with improved performance.

According to a fourth aspect of the present invention, the first, second, third and fourth self-extinguishing semiconductor elements connected in series between the positive and negative buses of a DC power supply having an intermediate potential point are provided. , First, second, third, and fourth diodes connected in anti-parallel to each of the first, second, third, and fourth self-extinguishing semiconductor devices, and first and second self-extinguishing diodes. A first reactor connected between the arc-type semiconductor elements, a second reactor connected between the third and fourth self-arc-extinguishing semiconductor elements, a second self-arc-extinguishing semiconductor element and the first A fifth diode connected between the connection point with the first reactor and the intermediate potential point, and a fifth diode connected between the connection point between the third self-extinguishing semiconductor element and the second reactor and the intermediate potential point 6th done
A diode, an output terminal provided at a connection point between the second self-extinguishing semiconductor device and the third self-extinguishing semiconductor device, and a second terminal connected in parallel to the first self-extinguishing semiconductor device. 1
A first snubber circuit consisting of a capacitor and a seventh diode, a second snubber circuit consisting of a second capacitor and an eighth diode connected in parallel to a fourth self-extinguishing semiconductor element, and a fifth snubber circuit. A third snubber circuit including a third capacitor and a ninth diode connected in parallel to the third diode, and a fourth snubber circuit including a fourth capacitor and a tenth diode connected in parallel to the sixth diode A fifth capacitor and an eleventh diode connected in series between a connection point between the third capacitor and the ninth diode and a connection point between the first capacitor and the seventh diode; A sixth capacitor and a twelfth capacitor connected in series between a connection point between the capacitor and the eighth diode and a connection point between the fourth capacitor and the tenth diode. First and second electric power for regenerating energy stored in the fifth and sixth capacitors to a DC power supply by a switching operation of the diode and the first, second, third and fourth self-extinguishing semiconductor elements. A regenerative circuit is provided to control the voltage of the recovery capacitor for recovering the energy stored in the snubber circuit and the reactor to a voltage lower than the DC power supply voltage, and the charging polarity is always unipolar. The components of the self-extinguishing type semiconductor element snubber circuit are reduced without impairing the function of suppressing the steep rise of voltage and current applied to the arc type semiconductor element to a desired value, and the degree of freedom in selecting the snubber capacitor capacity is reduced. The power conversion device has a small size, low cost, and high efficiency, and has improved reliability. There is a result. Also,
When various motors are driven as a three-level converter / inverter system when applied to a three-level converter device, or when applied to a power phase adjustment facility, the power that reduces running costs and realizes energy saving of the entire system There is an effect that a conversion device can be obtained.

According to claim 5 of the present invention, the first, second, third and fourth self-extinguishing semiconductor elements connected in series between the positive and negative buses of a DC power supply having an intermediate potential point are provided. , First, second, third, and fourth diodes connected in anti-parallel to each of the first, second, third, and fourth self-extinguishing semiconductor devices, and first and second self-extinguishing diodes. A first reactor connected between the arc-type semiconductor elements, a second reactor connected between the third and fourth self-arc-extinguishing semiconductor elements, a second self-arc-extinguishing semiconductor element and the first A fifth diode connected between the connection point with the first reactor and the intermediate potential point, and a fifth diode connected between the connection point between the third self-extinguishing semiconductor element and the second reactor and the intermediate potential point 6th done
A diode, an output terminal provided at a connection point between the second self-extinguishing semiconductor device and the third self-extinguishing semiconductor device, and a second terminal connected in parallel to the first self-extinguishing semiconductor device. 1
A first snubber circuit consisting of a capacitor and a seventh diode, a second snubber circuit consisting of a second capacitor and an eighth diode connected in parallel to a fourth self-extinguishing semiconductor element, and a fifth snubber circuit. A third snubber circuit including a third capacitor and a ninth diode connected in parallel to the third diode, and a fourth snubber circuit including a fourth capacitor and a tenth diode connected in parallel to the sixth diode A first resistor connected between a connection point between the third capacitor and the ninth diode and a connection point between the first capacitor and the seventh diode; And a second resistor connected between the connection point of the fourth capacitor and the connection point of the tenth diode, and the energy stored in the snubber circuit and the reactor. The recovery capacitor for recovering energy is controlled to a voltage lower than the DC power supply voltage to lower the voltage, and its charging polarity is always unipolar, so that the steep voltage and current rise applied to the self-extinguishing semiconductor element can be reduced. The composition of the snubber circuit of the self-extinguishing type semiconductor device is reduced without impairing the function to suppress it to the desired value, and the configuration is such that the capacity of the snubber capacitor can be freely selected. In addition, there is an effect that a power converter with improved reliability and improved reliability can be obtained. Also, when applied to a three-level converter,
When various electric motors are driven as a level converter / inverter system, or when applied to power phase adjustment equipment, there is an effect that a power conversion device that reduces running costs and achieves energy saving of the entire system can be obtained.

According to a sixth aspect of the present invention, in the first or second aspect, a voltage clamp comprising a capacitor and a diode connected in series between the positive and negative buses and a resistor connected in parallel to the diode. Circuit,
The snubber circuit and the recovery capacitor for recovering the energy stored in the reactor are controlled to a voltage lower than the DC power supply voltage to lower the voltage, and the charging polarity is always unipolar, and is added to the self-extinguishing type semiconductor element. A power converter that realizes downsizing, low cost, and high efficiency by reducing the components of a snubber circuit of a self-extinguishing semiconductor element without impairing the function of suppressing steep voltage and current rises to desired values. The effect is obtained.

According to a seventh aspect of the present invention, in the third, fourth or fifth aspect, a capacitor and a diode respectively connected in series between the positive and negative buses and the intermediate potential point, and A plurality of voltage clamp circuits each including a resistor connected in parallel are provided, and a snubber circuit and a recovery capacitor for recovering energy stored in the reactor are controlled to a voltage lower than the DC power supply voltage to reduce the voltage. The charging polarity is always unipolar, and the components of the self-extinguishing semiconductor device snubber circuit are reduced without impairing the function of suppressing the steep voltage and current rises applied to the self-extinguishing semiconductor device to desired values. ,
In addition, since the configuration is such that the degree of freedom in selecting the capacity of the snubber capacitor is increased, there is an effect that a power converter with improved reliability can be obtained while realizing miniaturization, low cost, and high efficiency.

According to claim 8 of the present invention, in claim 1 or claim 2, a voltage clamp circuit comprising a capacitor and a diode connected in series between the positive and negative buses is provided, and the energy stored in the capacitor is provided. A power regeneration circuit is provided to regenerate the power to the DC power supply, and the recovery capacitor for recovering the energy stored in the snubber circuit and the reactor is controlled to a voltage lower than the DC power supply voltage to lower the voltage and always change the charging polarity. Unipolar and reduced the components of the snubber circuit of the self-extinguishing type semiconductor element without impairing the function of suppressing the steep voltage and current rise applied to the self-extinguishing type semiconductor element to a desired value. There is an effect that a power converter that realizes low cost and high efficiency can be obtained.

According to a ninth aspect of the present invention, in the third, fourth or fifth aspect, a voltage clamp comprising a capacitor and a diode respectively connected in series between the positive and negative buses and the intermediate potential point. In addition to providing a plurality of circuits, a power regeneration circuit that regenerates energy stored in the capacitor to the DC power supply is provided, and a recovery capacitor for recovering the energy stored in the snubber circuit and the reactor is set to a voltage lower than the DC power supply voltage. The voltage is controlled to be low, the charge polarity is always unipolar, and the function of suppressing the steep voltage and current rising applied to the self-extinguishing semiconductor element to a desired value is not impaired. Since the configuration of the snubber circuit has been reduced by reducing the number of components and the degree of freedom in selecting the capacitance of the snubber capacitor, the size and size have been reduced. While realizing cost reduction and high efficiency, the effect of power conversion device with improved reliability can be obtained.

According to claim 10 of the present invention, in claim 1 or claim 2, the power regeneration circuit comprises:
In order to recover the energy stored in the snubber circuit and the reactor while controlling the charging voltage of the second capacitor to a value lower than the voltage of the DC power supply while regenerating excess energy stored in the DC power supply to the DC power supply. The recovery capacitor is controlled to a voltage lower than the DC power supply voltage to lower the voltage, and its charging polarity is always unipolar, and the steep voltage and current rising applied to the self-extinguishing semiconductor element are suppressed to desired values. Since the components of the snubber circuit of the self-extinguishing type semiconductor element are reduced without impairing the function, there is an effect that a power converter that realizes downsizing, low cost, and high efficiency can be obtained.

According to claim 11 of the present invention, in claim 3, the first and second power regeneration circuits regenerate excess energy stored in the third and fourth capacitors to the DC power supply. In addition, the charging voltage of the third and fourth capacitors is controlled to a value lower than the voltage of the DC power supply, and the recovery capacitor for recovering the energy stored in the snubber circuit and the reactor is connected to a voltage lower than the DC power supply voltage. The self-extinguishing type semiconductor element without impairing the function of suppressing the steep voltage and current rise applied to the self-extinguishing type semiconductor element to a desired value while lowering the voltage and controlling the charging polarity to always be unipolar. The size of the snubber circuit is reduced, and the size of the snubber capacitor can be freely selected. While realizing an effect of power conversion device with improved reliability can be obtained.

According to the twelfth aspect of the present invention, in the fourth aspect, the first and second power regeneration circuits regenerate excess energy stored in the fifth and sixth capacitors to the DC power supply. In addition, the charging voltage of the fifth and sixth capacitors is controlled to a value lower than the voltage of the DC power supply, and the recovery capacitor for recovering the energy stored in the snubber circuit and the reactor is connected to a voltage lower than the DC power supply voltage. The self-extinguishing type semiconductor element without impairing the function of suppressing the steep voltage and current rise applied to the self-extinguishing type semiconductor element to a desired value while lowering the voltage and controlling the charging polarity to always be unipolar. The size of the snubber circuit is reduced, and the size of the snubber capacitor can be freely selected. While realizing an effect of power conversion device with improved reliability can be obtained.

According to the thirteenth aspect of the present invention, the first and second self-extinguishing semiconductor elements connected in series as a positive arm between the positive and negative buses of a DC power supply having an intermediate potential point, The third connected in series as a negative arm
And a fourth self-extinguishing semiconductor device, a freewheel diode connected in anti-parallel to each of the self-extinguishing semiconductor devices, a series connection point of the first and second self-extinguishing semiconductor devices, and an intermediate potential. A first clamp diode connected between the first clamp diode and a second clamp diode connected between a series connection point of the third and fourth self-extinguishing semiconductor elements and an intermediate potential point; In a power converter including a three-level inverter having an output terminal connected to a connection point between an arm and a negative arm, an anode reactor connected in series to each of the positive and negative arms, and first and fourth self-extinguishing arcs , Second, third and fourth snubber circuits each comprising a snubber diode and a snubber capacitor connected in parallel to the mold semiconductor element and the first and second clamp diodes, respectively. A first diode and a first recovery capacitor connected between a connection point between the snubber diode and the snubber capacitor of the first snubber circuit with respect to the first self-extinguishing semiconductor device and the positive bus, A second diode and a second recovery capacitor connected between the connection point of the snubber diode and the snubber capacitor of the second snubber circuit to the self-extinguishing type semiconductor device of No. 4 and the negative bus; A first discharge resistor connected between a connection point between the snubber diode and the snubber capacitor of the third snubber circuit with respect to the clamp diode and an intermediate potential point, and a snubber of the fourth snubber circuit with respect to the second clamp diode; Energy from the second discharge resistor connected between the connection point of the diode and the snubber capacitor and the intermediate potential point, and from the first recovery capacitor; A first power regenerating circuit for regenerating to the positive side of the DC power supply divided at the intermediate potential point, and extracting energy from the second recovery capacitor to produce a negative side of the DC power supply divided at the intermediate potential point And a second power regenerating circuit for regenerating the power supply, connecting a recovery capacitor to the P side and the N side of the DC power supply to reduce the withstand voltage of the recovery capacitor, and connecting a snubber circuit to the clamp diode to form a self-extinguishing type semiconductor. Control the voltage of the recovery capacitor to recover the energy stored in the snubber circuit and the reactor to a voltage lower than the DC power supply voltage to lower the withstand voltage of the element and lower the voltage.Also, the charging polarity is always unipolar. Reduces the components of the snubber circuit of the self-extinguishing semiconductor device without impairing the function of suppressing the steep rise of the voltage and current applied to the self-extinguishing semiconductor device to a desired value. In addition, since the configuration is such that the degree of freedom in selecting the capacity of the snubber capacitor is increased, there is an effect that a power converter with improved reliability can be obtained while realizing miniaturization, low cost, and high efficiency. In addition, when applied to a three-level converter device to drive various electric motors as a three-level converter / inverter system, or when applied to a power phase adjustment facility, the running cost is reduced and energy saving of the entire system is realized. This has the effect of obtaining a power conversion device with improved performance.

According to the fourteenth aspect of the present invention, the first and second self-extinguishing semiconductor elements connected in series as a positive arm between the positive and negative buses of a DC power supply having an intermediate potential point, The third connected in series as a negative arm
And a fourth self-extinguishing semiconductor device, a freewheel diode connected in anti-parallel to each of the self-extinguishing semiconductor devices, a series connection point of the first and second self-extinguishing semiconductor devices, and an intermediate potential. A first clamp diode connected between the first clamp diode and a second clamp diode connected between a series connection point of the third and fourth self-extinguishing semiconductor elements and an intermediate potential point; In a power converter including a three-level inverter having an output terminal connected to a connection point between an arm and a negative arm, an anode reactor connected in series to each of the positive and negative arms, and first and fourth self-extinguishing arcs , Second, third and fourth snubber circuits each comprising a snubber diode and a snubber capacitor connected in parallel to the mold semiconductor element and the first and second clamp diodes, respectively. A first discharge resistor connected between the connection point and the intermediate potential point of the snubber diode and the snubber capacitor of the third snubber circuit to the first clamp diode, the fourth to the second clamp diodes
A second discharge resistor connected between a connection point between the snubber diode and the snubber capacitor of the snubber circuit and the intermediate potential point, and a snubber diode of the first snubber circuit for the first self-extinguishing semiconductor element A third discharge resistor connected between a connection point between the second self-extinguishing type semiconductor element and a snubber diode and a snubber capacitor connected to a fourth self-extinguishing type semiconductor element; Providing a fourth discharge resistor connected between the point and the negative bus, connecting a recovery capacitor to the P and N sides of the DC power supply to reduce the withstand voltage of the recovery capacitor, and providing a snubber circuit to the clamp diode. To increase the current interrupting capability of the self-extinguishing type semiconductor element, and to provide a recovery capacitor for recovering the energy stored in the snubber circuit and the reactor to a voltage lower than the DC power supply voltage. The voltage is controlled to be low, the charge polarity is always unipolar, and the function of suppressing the steep voltage and current rising applied to the self-extinguishing semiconductor element to a desired value is not impaired. The configuration reduces the components of the snubber circuit and allows flexibility in the selection of the snubber capacitor capacity, so that a compact, low-cost and high-efficiency power converter with improved reliability is obtained. Has the effect.
In addition, when applied to a three-level converter device to drive various electric motors as a three-level converter / inverter system, or when applied to a power phase adjustment facility, the running cost is reduced and energy saving of the entire system is realized. This has the effect of obtaining a power conversion device with improved performance.

According to the fifteenth aspect of the present invention, the first and second self-extinguishing semiconductor elements connected in series as a positive arm between the positive and negative buses of a DC power supply having an intermediate potential point, The third connected in series as a negative arm
And a fourth self-extinguishing semiconductor device, a freewheel diode connected in anti-parallel to each of the self-extinguishing semiconductor devices, a series connection point of the first and second self-extinguishing semiconductor devices, and an intermediate potential. A first clamp diode connected between the first clamp diode and a second clamp diode connected between a series connection point of the third and fourth self-extinguishing semiconductor elements and an intermediate potential point; In a power converter including a three-level inverter having an output terminal connected to a connection point between an arm and a negative arm, an anode reactor connected in series to each of the positive and negative arms, and first and fourth self-extinguishing arcs , Second, third and fourth snubber circuits each comprising a snubber diode and a snubber capacitor connected in parallel to the mold semiconductor element and the first and second clamp diodes, respectively. A first diode and a first recovery capacitor connected between a connection point between the snubber diode and the snubber capacitor of the first snubber circuit with respect to the first self-extinguishing semiconductor device and the positive bus, A second diode and a second recovery capacitor connected between the connection point of the snubber diode and the snubber capacitor of the second snubber circuit to the self-extinguishing type semiconductor device of No. 4 and the negative bus; A third diode, a first reactor, and a third recovery capacitor connected between an intermediate potential point and a connection point between the snubber diode and the snubber capacitor of the third snubber circuit with respect to the clamp diode;
A fourth diode, a second reactor and a fourth recovery capacitor connected between an intermediate potential point and a connection point between the snubber diode and the snubber capacitor of the fourth snubber circuit with respect to the second clamp diode; Energy is extracted from the first recovery capacitor, and a first power regeneration circuit that regenerates the positive side of the DC power supply divided at the intermediate potential point, and energy is extracted from the second recovery capacitor,
The second regenerating to the negative side of the DC power supply divided at the intermediate potential point
Energy from the third power recovery circuit, the third recovery capacitor, and a third power regeneration circuit that regenerates the positive side of the DC power supply divided at the intermediate potential point, and energy from the fourth recovery capacitor. And a fourth power regenerating circuit for regenerating on the negative side of the DC power supply divided at the intermediate potential point, and connecting a recovery capacitor to the P and N sides of the DC power supply to reduce the withstand voltage of the recovery capacitor, A snubber circuit is connected to the diode to increase the current blocking capability of the self-extinguishing type semiconductor element, and the snubber circuit and the recovery capacitor for recovering the energy stored in the reactor are controlled to a voltage lower than the DC power supply voltage. To lower the voltage and make the charging polarity always unipolar, impairing the function of suppressing the steep rise of the voltage and current applied to the self-extinguishing semiconductor device to a desired value. In addition, the configuration of the snubber circuit of the self-extinguishing type semiconductor element is reduced, and the degree of freedom in selecting the capacitance of the snubber capacitor is increased.Furthermore, the configuration of the snubber circuit connected to the self-extinguishing type semiconductor element or the clamp diode All the energy stored in the snubber capacitor and anode reactor, which are the elements, can be recovered by the four recovery capacitors, and the positive side of the DC power supply divided at the intermediate potential point by the power regeneration circuit connected to each recovery capacitor or Since it is configured to be able to regenerate on the negative side, there is an effect that a compact, low-cost, high-efficiency power conversion device with improved reliability can be obtained. Also, when applied to a three-level converter,
When various electric motors are driven as a level converter / inverter system, or when applied to power phase adjustment equipment, there is an effect that a power conversion device that reduces the running cost and realizes energy saving of the entire system can be obtained.

According to claim 16 of the present invention, in claim 15, the first, second, third, and fourth recovery capacitors, and the first, second, third, and fourth power regenerating capacitors are provided. And the circuit are connected in common for each of the multiple phases, the recovery capacitors are connected to the P and N sides of the DC power supply to reduce the withstand voltage of the recovery capacitors, and a snubber circuit is connected to the clamp diode for self-extinguishing. Controls the recovery capacitor for recovering the energy stored in the snubber circuit and the reactor to a voltage lower than the DC power supply voltage to reduce the current interruption withstand capability of the semiconductor element and to lower the voltage, and the charging polarity is always unipolar. And reducing the components of the snubber circuit of the self-extinguishing semiconductor device without impairing the function of suppressing the steep rise of the voltage and current applied to the self-extinguishing semiconductor device to a desired value. In addition, the configuration that allows flexibility in the selection of the capacitance of the snubber capacitor, and furthermore, all the energy stored in the snubber capacitor and the anode reactor, which are components of the snubber circuit connected to the self-extinguishing type semiconductor element or the clamp diode, are used. The recovery capacitor and the power regeneration circuit can be recovered to four recovery capacitors, and can be regenerated to the positive side or the negative side of the DC power supply divided at the intermediate potential point by the power regeneration circuit connected to each recovery capacitor. Can be shared by a plurality of phases, and there is an effect that a compact, low-cost and high-efficiency power supply device with improved reliability can be obtained.

According to a seventeenth aspect of the present invention, in the fifteenth aspect, the fifth, sixth, and seventh capacitors connected in parallel to the first, second, third, and fourth recovery capacitors, respectively.
And an eighth recovery capacitor, and the fifth, sixth, seventh
And the eighth recovery capacitor and the first, second, third, and fourth power regeneration circuits are connected in common for each of a plurality of phases, and the combined capacitance of the recovery capacitors is increased to enhance the voltage clamping action. Then, the recovery capacitor is connected to the P side and the N side of the DC power supply to reduce the withstand voltage of the recovery capacitor, and the snubber circuit is connected to the clamp diode to increase the current interruption withstand capability of the self-extinguishing type semiconductor element, And the recovery capacitor for recovering the energy stored in the reactor is controlled to a voltage lower than the DC power supply voltage to lower the voltage, and the charging polarity is always unipolar, and the steepness applied to the self-extinguishing type semiconductor element is reduced. Reduce the components of the self-extinguishing type semiconductor element snubber circuit without impairing the function of suppressing the rise of voltage and current to a desired value,
In addition, the configuration that allows flexibility in the selection of the capacitance of the snubber capacitor, and furthermore, all the energy stored in the snubber capacitor and the anode reactor, which are components of the snubber circuit connected to the self-extinguishing type semiconductor element or the clamp diode, are used. The recovery capacitor and the power regeneration circuit can be recovered to four recovery capacitors, and can be regenerated to the positive side or the negative side of the DC power supply divided at the intermediate potential point by the power regeneration circuit connected to each recovery capacitor. Can be shared by a plurality of phases, and there is an effect that a compact, low-cost and high-efficiency power supply device with improved reliability can be obtained.

According to claim 18 of the present invention, in claim 13, claim 14, claim 15, claim 16 or claim 17, the snubber capacitor of the third and fourth snubber circuits is The third and fourth snubber circuits each have a capacitance smaller than that of the snubber capacitors and reduce the energy stored in the snubber capacitors constituting the third and fourth snubber circuits. And miniaturizing the snubber capacitor constituting the fourth snubber circuit and realizing a reduction in power consumption in the discharge resistor, realizing a miniaturization, low cost and high efficiency, and improving reliability. This has the effect of obtaining an improved power converter.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing an inverter device according to a first embodiment of the present invention.

FIG. 2 is an explanatory diagram showing a relationship between a switching mode and an output terminal voltage of the self-extinguishing type semiconductor device in FIG. 1 for explaining an operation of the first embodiment of the present invention;

FIG. 3 is an explanatory diagram showing a path of a current flowing through the circuit of FIG. 1 for explaining the operation of the first embodiment of the present invention;

FIG. 4 is a circuit diagram showing an inverter device according to a second embodiment of the present invention.

FIG. 5 is a circuit diagram showing a three-level inverter device according to a third embodiment of the present invention.

FIG. 6 is an explanatory diagram showing the relationship between the switching mode and the output terminal voltage of the self-extinguishing type semiconductor device in FIG. 5 for explaining the operation of the third embodiment of the present invention.

FIG. 7 is an explanatory diagram showing a path of a current flowing through the circuit of FIG. 5 for explaining the operation of the third embodiment of the present invention.

FIG. 8 is a circuit diagram showing a three-level inverter device according to a fourth embodiment of the present invention.

FIG. 9 is a circuit configuration diagram showing a specific example of a power regeneration circuit according to the first to fourth embodiments of the present invention.

FIG. 10 is a circuit diagram showing a three-level inverter device according to a sixth embodiment of the present invention.

FIG. 11 is a circuit diagram showing an inverter device according to Embodiment 7 of the present invention.

FIG. 12 is a circuit diagram showing a three-level inverter device according to a seventh embodiment of the present invention.

FIG. 13 is a circuit diagram showing an inverter device according to an eighth embodiment of the present invention.

FIG. 14 is a circuit diagram showing a three-level inverter device according to an eighth embodiment of the present invention.

FIG. 15 shows a thirteenth embodiment of the present invention.
FIG. 2 is a circuit diagram showing a three-level inverter device according to the first embodiment.

FIG. 16 is a timing chart showing a switching operation of the self-extinguishing type semiconductor element in FIG. 15 for explaining the operation of the thirteenth embodiment of the present invention.

FIG. 17 is an explanatory diagram showing a path of a current flowing through the circuit of FIG. 15 for explaining the operation of the thirteenth embodiment of the present invention.

FIG. 18 shows a fourteenth embodiment of the present invention.
FIG. 2 is a circuit diagram showing a three-level inverter device according to the first embodiment.

FIG. 19 shows a fifteenth embodiment of the present invention.
FIG. 2 is a circuit diagram showing a three-level inverter device according to the first embodiment.

FIG. 20 shows a sixteenth embodiment of the present invention.
FIG. 2 is a circuit diagram showing a three-level inverter device according to the first embodiment.

FIG. 21 is a circuit diagram showing a connection portion of a discharge resistor of a three-level inverter device according to Embodiment 17 corresponding to Claims 13 and 14 of the present invention.

FIG. 22 is a block diagram showing an embodiment 18 of the present invention;
FIG. 2 is a circuit diagram showing a three-level inverter device according to the first embodiment.

FIG. 23 shows a nineteenth embodiment of the present invention.
FIG. 2 is a circuit diagram showing a three-level inverter device according to the first embodiment.

FIG. 24 is a twentieth embodiment of the present invention.
FIG. 2 is a circuit diagram showing a three-level inverter device according to the first embodiment.

FIG. 25 shows a twenty-first embodiment of the present invention.
FIG. 2 is a circuit diagram showing a three-level inverter device according to the first embodiment.

FIG. 26 is a circuit diagram showing a main part of a three-level inverter device according to Embodiment 21 of the present invention.

FIG. 27 is a circuit configuration diagram showing an inverter device as a conventional power converter.

FIG. 28 is a circuit configuration diagram showing another example of an inverter device as a conventional power converter.

FIG. 29 is a circuit configuration diagram showing a three-level inverter device as a conventional power converter.

FIG. 30 is a circuit configuration diagram showing another example of a three-level inverter device as a conventional power converter.

FIG. 31 is a circuit configuration diagram showing still another example of a three-level inverter device as a conventional power converter.

[Explanation of symbols]

 1a to 1d GTO (self-extinguishing semiconductor element) 2a to 2d Freewheel diode 3, 3a to 3d Snubber diode 4, 4a to 4d Snubber capacitor 5, 5a, 5b Anode reactor 6, 6a to 6d Polarity diode 7, 7a to 7h Recovery capacitor 8, 8a to 8d Power regeneration circuit 9, 9a, 9b DC power supply 14a, 14b Clamp diode 18, 18a to 18d Discharge resistor 26, 26a, 26b Diode 27, 27a, 27b Capacitor 30a, 30b Auxiliary reactor A, X Output terminal C Intermediate potential point P Positive bus N Negative bus

──────────────────────────────────────────────────続 き Continued on front page (58) Field surveyed (Int.Cl. ⁶ , DB name) H02M 1/06 H02M 7/515

Claims (18)

(57) [Claims] 1. A first and a second self-extinguishing type semiconductor element connected in series between a positive and negative bus of a DC power supply, and anti-parallel connected to each of the first and second self-extinguishing type semiconductor elements. First and second diodes, a reactor connected in series between the first and second self-extinguishing semiconductor devices, and a connection point between the second self-extinguishing semiconductor device and the reactor. A first output terminal provided in parallel with the first self-extinguishing semiconductor device;
A snubber circuit including a capacitor and a third diode; a second capacitor and a fourth diode connected in series between a connection point between the first capacitor and the third diode and the output terminal; A power regenerating circuit for regenerating energy stored in the second capacitor to the DC power source by a switching operation of the first and second self-extinguishing semiconductor elements. . 2. A first and a second self-extinguishing semiconductor element connected in series between a positive and negative bus of a DC power supply, and anti-parallel connected to each of the first and second self-extinguishing semiconductor elements. First and second diodes, a reactor connected in series between the first and second self-extinguishing semiconductor devices, and a connection point between the first self-extinguishing semiconductor device and the reactor. A first output terminal connected in parallel with the second self-extinguishing type semiconductor element;
A snubber circuit including a capacitor and a third diode; a second capacitor and a fourth diode connected in series between a connection point between the first capacitor and the third diode and the output terminal; A power regenerating circuit for regenerating energy stored in the second capacitor to the DC power source by a switching operation of the first and second self-extinguishing semiconductor elements. . 3. A first, second, third and fourth self-extinguishing semiconductor element connected in series between the positive and negative buses of a DC power supply having an intermediate potential point, and said first, second and third self-extinguishing semiconductor elements. First, second, third and fourth diodes connected in anti-parallel to the first and second self-extinguishing semiconductor devices, respectively, and connected between the first and second self-extinguishing semiconductor devices. A first reactor, a second reactor connected between the third and fourth self-extinguishing semiconductor devices, and a connection between the second self-extinguishing semiconductor device and the first reactor. A fifth point connected between the point and the intermediate potential point.
A sixth diode connected between a connection point between the third self-extinguishing type semiconductor element and the second reactor and the intermediate potential point.
An output terminal provided at a connection point between the second self-arc-extinguishing semiconductor element and the third self-arc-extinguishing semiconductor element; and a diode connected in parallel to the first self-arc-extinguishing semiconductor element. The first
A first snubber circuit including a capacitor and a seventh diode; and a second snubber circuit connected in parallel to the fourth self-extinguishing type semiconductor element.
A second snubber circuit including a capacitor and an eighth diode; a connection point between the first reactor and the second self-extinguishing semiconductor element; and a connection point between the first capacitor and the seventh diode. A third capacitor and a ninth diode connected in series between the connection point and a connection point between the second reactor and the third self-extinguishing semiconductor element; the second capacitor; A fourth capacitor and a tenth diode connected in series between a connection point with a diode of No. 8 and a switching operation of the first, second, third and fourth self-extinguishing semiconductor elements. A power conversion device comprising: first and second power regeneration circuits that regenerate energy stored in third and fourth capacitors to the DC power supply. 4. A first, second, third and fourth self-extinguishing semiconductor element connected in series between the positive and negative buses of a DC power supply having an intermediate potential point, and said first, second and third self-extinguishing semiconductor elements. First, second, third and fourth diodes connected in anti-parallel to the first and second self-extinguishing semiconductor devices, respectively, and connected between the first and second self-extinguishing semiconductor devices. A first reactor, a second reactor connected between the third and fourth self-extinguishing semiconductor devices, and a connection between the second self-extinguishing semiconductor device and the first reactor. A fifth point connected between the point and the intermediate potential point.
A sixth diode connected between a connection point between the third self-extinguishing type semiconductor element and the second reactor and the intermediate potential point.
An output terminal provided at a connection point between the second self-arc-extinguishing semiconductor element and the third self-arc-extinguishing semiconductor element; and a diode connected in parallel to the first self-arc-extinguishing semiconductor element. The first
A first snubber circuit including a capacitor and a seventh diode; and a second snubber circuit connected in parallel to the fourth self-extinguishing type semiconductor element.
A second snubber circuit composed of a capacitor and an eighth diode; a third snubber circuit composed of a third capacitor and a ninth diode connected in parallel with the fifth diode; A fourth snubber circuit including a fourth capacitor and a tenth diode connected in parallel; a connection point between the third capacitor and the ninth diode; the first capacitor and the seventh diode; A fifth capacitor and an eleventh diode connected in series between the second capacitor and the eighth diode; a connection point between the second capacitor and the eighth diode; the fourth capacitor and the tenth diode; A sixth capacitor and a twelfth diode connected in series between the first, second, third and fourth self-extinguishing semiconductors Power conversion apparatus characterized by comprising a first and second power regeneration circuit for regenerating the energy stored in the fifth and sixth capacitor by the switching operation of the child to the DC power source. 5. A first, second, third and fourth self-extinguishing type semiconductor element connected in series between the positive and negative buses of a DC power supply having an intermediate potential point, and said first, second and third self-extinguishing semiconductor elements. First, second, third and fourth diodes connected in anti-parallel to the first and second self-extinguishing semiconductor devices, respectively, and connected between the first and second self-extinguishing semiconductor devices. A first reactor, a second reactor connected between the third and fourth self-extinguishing semiconductor devices, and a connection between the second self-extinguishing semiconductor device and the first reactor. A fifth point connected between the point and the intermediate potential point.
A sixth diode connected between a connection point between the third self-extinguishing type semiconductor element and the second reactor and the intermediate potential point.
An output terminal provided at a connection point between the second self-arc-extinguishing semiconductor element and the third self-arc-extinguishing semiconductor element; and a diode connected in parallel to the first self-arc-extinguishing semiconductor element. The first
A first snubber circuit including a capacitor and a seventh diode; and a second snubber circuit connected in parallel to the fourth self-extinguishing type semiconductor element.
A second snubber circuit composed of a capacitor and an eighth diode; a third snubber circuit composed of a third capacitor and a ninth diode connected in parallel with the fifth diode; A fourth snubber circuit including a fourth capacitor and a tenth diode connected in parallel; a connection point between the third capacitor and the ninth diode; the first capacitor and the seventh diode; A first resistor connected between the second capacitor and a connection point between the second capacitor and the eighth diode, and a connection point between the fourth capacitor and the tenth diode. A power converter comprising: a second resistor connected therebetween. 6. A voltage clamp circuit according to claim 1, further comprising a voltage clamp circuit comprising a capacitor and a diode connected in series between said positive and negative buses, and a resistor connected in parallel to said diode. Power converter. 7. A plurality of voltage clamp circuits each including a capacitor and a diode connected in series between the positive and negative buses and the intermediate potential point, and a resistor connected in parallel to the diode. The power converter according to claim 3, 4, or 5. 8. A voltage clamp circuit comprising a capacitor and a diode connected in series between the positive and negative buses, and a power regeneration circuit for regenerating energy stored in the capacitor to the DC power supply is provided. The power converter according to claim 1 or 2, wherein 9. A plurality of voltage clamp circuits each including a capacitor and a diode connected in series between the positive and negative buses and the intermediate potential point, and regenerates energy stored in the capacitor to the DC power supply. 4. A power regeneration circuit is provided.
The power converter according to claim 4 or claim 5. 10. The power regeneration circuit regenerates excess energy stored in the second capacitor to the DC power supply, and sets a charging voltage of the second capacitor to a value lower than a voltage of the DC power supply. The power converter according to claim 1, wherein the power is controlled to be equal to or smaller than the power. 11. The first and second power regeneration circuits regenerate excess energy stored in the third and fourth capacitors to the DC power supply, and regenerate the third and fourth capacitors. 4. The method according to claim 3, wherein the charging voltage is controlled to a value lower than the voltage of the DC power supply.
Power converter. 12. The first and second power regeneration circuits regenerate excess energy stored in the fifth and sixth capacitors to the DC power supply, and regenerate the energy of the fifth and sixth capacitors. 5. The method according to claim 4, wherein the charging voltage is controlled to a value lower than the voltage of the DC power supply.
Power converter. 13. A first and a second self-extinguishing type semiconductor element connected in series as a positive arm between positive and negative buses of a DC power supply having an intermediate potential point, and connected in series as a negative arm between said positive and negative buses. A third and a fourth self-extinguishing semiconductor device, a freewheel diode connected in anti-parallel to each of the self-extinguishing semiconductor devices, and a serial connection of the first and second self-extinguishing semiconductor devices A first clamp diode connected between a point and the intermediate potential point; and a first clamp diode connected between the series connection point of the third and fourth self-extinguishing semiconductor elements and the intermediate potential point. A power conversion device comprising a three-level inverter having two clamp diodes and an output terminal connected to a connection point between the positive arm and the negative arm. A first, a second, a third, and a second reactor each including a node reactor and a snubber diode and a snubber capacitor connected in parallel to the first and fourth self-extinguishing semiconductor devices and the first and second clamp diodes, respectively. 4, a first diode connected between a connection point of a snubber diode and a snubber capacitor of the first snubber circuit with respect to the first self-arc-extinguishing semiconductor element and a positive bus. And a second diode connected between a connection point between the snubber diode of the second snubber circuit and the snubber capacitor with respect to the fourth self-arc-extinguishing semiconductor device and a negative bus. A recovery capacitor, and a snubber diode and a snubber capacitor of the third snubber circuit with respect to the first clamp diode. A first discharge resistor connected between a connection point of the fourth snubber circuit and a snubber capacitor of the fourth snubber circuit with respect to the second clamp diode; A second discharge resistor connected between the intermediate potential point; and extracting energy from the first recovery capacitor;
A first power regeneration circuit that regenerates to the positive side of the DC power supply divided at the intermediate potential point, and extracts energy from the second recovery capacitor,
A second power regeneration circuit that regenerates to the negative side of the DC power supply divided at the intermediate potential point. 14. A first and a second self-extinguishing type semiconductor element connected in series as a positive arm between positive and negative buses of a DC power supply having an intermediate potential point, and connected in series as a negative arm between the positive and negative buses. A third and a fourth self-extinguishing semiconductor device, a freewheel diode connected in anti-parallel to each of the self-extinguishing semiconductor devices, and a serial connection of the first and second self-extinguishing semiconductor devices A first clamp diode connected between a point and the intermediate potential point; and a first clamp diode connected between the series connection point of the third and fourth self-extinguishing semiconductor elements and the intermediate potential point. A power conversion device comprising a three-level inverter having two clamp diodes and an output terminal connected to a connection point between the positive arm and the negative arm. A first, a second, a third, and a fourth node comprising a node reactor, and a snubber diode and a snubber capacitor connected in parallel to the first and fourth self-extinguishing semiconductor elements and the first and second clamp diodes, respectively. A first discharge resistor connected between the intermediate potential point and a connection point between the snubber diode and the snubber capacitor of the third snubber circuit with respect to the first clamp diode; A second discharge resistor connected between a connection point between the snubber diode and the snubber capacitor of the fourth snubber circuit with respect to the second clamp diode and the intermediate potential point; the first self-arc-extinguishing semiconductor A third node connected between a connection point of a snubber diode and a snubber capacitor of the first snubber circuit to the element and a positive bus. A discharge resistor, a fourth discharge resistor connected between a connection point between the snubber diode and the snubber capacitor of the second snubber circuit with respect to the fourth self-extinguishing semiconductor element and a negative bus. A power conversion device comprising: 15. A first and second self-extinguishing type semiconductor element connected in series as a positive arm between positive and negative buses of a DC power supply having an intermediate potential point, and connected in series as a negative arm between the positive and negative buses. A third and a fourth self-extinguishing semiconductor device, a freewheel diode connected in anti-parallel to each of the self-extinguishing semiconductor devices, and a serial connection of the first and second self-extinguishing semiconductor devices A first clamp diode connected between a point and the intermediate potential point; and a first clamp diode connected between the series connection point of the third and fourth self-extinguishing semiconductor elements and the intermediate potential point. A power conversion device comprising a three-level inverter having two clamp diodes and an output terminal connected to a connection point between the positive arm and the negative arm. A first, a second, a third, and a fourth node comprising a node reactor, and a snubber diode and a snubber capacitor connected in parallel to the first and fourth self-extinguishing semiconductor elements and the first and second clamp diodes, respectively. A first diode connected between a connection point between a snubber diode and a snubber capacitor of the first snubber circuit with respect to the first self-extinguishing type semiconductor element and a positive bus, and a first diode connected to a first bus. A second diode connected between a connection point between the snubber diode of the second snubber circuit and the snubber capacitor with respect to the fourth self-extinguishing type semiconductor element and a negative bus, and And a snubber diode and a snubber capacitor of the third snubber circuit for the first clamp diode. A third diode, a first reactor, and a third recovery capacitor connected between a connection point of the first and second intermediate potential points; and a snubber diode and a snubber of the fourth snubber circuit for the second clamp diode. A fourth diode, a second reactor, and a fourth recovery capacitor connected between a connection point with a capacitor and the intermediate potential point; extracting energy from the first recovery capacitor;
A first power regeneration circuit that regenerates to the positive side of the DC power supply divided at the intermediate potential point, and extracts energy from the second recovery capacitor,
A second power regeneration circuit that regenerates to the negative side of the DC power supply divided at the intermediate potential point, and extracts energy from the third recovery capacitor,
A third power regeneration circuit that regenerates on the positive side of the DC power supply divided at the intermediate potential point, and extracts energy from the fourth recovery capacitor,
And a fourth power regeneration circuit that regenerates on the negative side of the DC power supply divided at the intermediate potential point. 16. The first, second, third, and fourth recovery capacitors, and the first, second, third, and fourth power regeneration circuits are connected in common for a plurality of phases, respectively. The power converter according to claim 15, wherein: 17. A fifth, sixth, seventh, and eighth recovery capacitors connected in parallel to the first, second, third, and fourth recovery capacitors, respectively, Seventh and eighth recovery capacitors;
The first, second, third and fourth power regeneration circuits are:
The power converter according to claim 15, wherein the power converters are connected in common for a plurality of phases. 18. The snubber capacitor of the third and fourth snubber circuits has a capacitance smaller than the capacitance of the snubber capacitors of the first and second snubber circuits, and The energy stored in the snubber capacitor constituting the fourth snubber circuit is reduced.
Or the power converter according to claim 17.