JP2766859B2 - Driving method of insulated gate thin film transistor logic circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial applications]

The present invention relates to a method of driving an insulated gate thin film transistor logic circuit that is configured using an insulated gate thin film transistor and has two logic signal input terminals and one logic signal output terminal.

[Prior art]

Conventionally, an insulated gate thin film transistor logic circuit described below with reference to FIG. 6 has been proposed. That is, for example, n-channel enhancement type first and second insulated gate thin film transistors Q1 and Q1
An insulated gate thin film transistor series circuit in which Q2 connects the drain or source (normal drain) of the insulated gate thin film transistor Q1 to the drain or source (normal source) of the insulated gate thin film transistor Q2 H, and the insulated gate thin film transistor series circuit H includes an insulated gate thin film transistor Q1 between first and second power supply terminals E1 and E2.
Are connected to the first power supply terminal side, and the first and second terminals are connected to the gates of the insulated gate thin film transistors Q1 and Q2.
, And a logic signal output terminal TO is derived from a connection point between the insulated gate thin film transistors Q1 and Q2. The above is the configuration of the conventionally proposed insulated gate thin film transistor logic circuit. Conventionally, there has been proposed a method for driving the above-described insulated gate thin film transistor logic circuit (hereinafter referred to as M) for driving the above insulated gate thin film transistor logic circuit. That always gives a positive relatively high the voltages V ₁ to the power supply terminal E1, also, with the condition that gives always lower for example a voltage V2 of zero than the power supply terminal E2 to the voltage V1, the logic signal input terminal T1
To a logical signal S1 that takes "1" and "0" in binary representation, and takes "1" and "0" in binary representation in which the logic signal S1 is logically inverted with respect to the input terminal T2. The logic signal S2 is applied to drive the insulated gate thin film transistor logic circuit M. In this case, the logic signals S1 and S2 have, for example, a positive logic, and when taking "1" in binary display, assuming that the insulated gate thin film transistors Q1 and Q2 have the same threshold voltage _Vth as (V ₁ + V _th) takes a large positive voltage V _H than when taking "0" in binary display, taking the voltage V _L of the lower example zero than the voltage V _H. The above is a method of driving an insulated gate thin film transistor logic circuit that has been conventionally proposed. According to such an insulated gate thin film transistor logic circuit driving method, when the logic signals S1 and S2 given to the logic signal input terminals T1 and T2 respectively take "1" and "0" in binary display, Since the thin film transistors Q1 and Q2 are turned on and off, respectively, the load connected from the power supply terminal T1 to the logic signal output terminal TO through the insulated gate thin film transistor Q1, and then to the logic signal output terminal TO The current flows toward the side (not shown), and the input capacitance of the load is charged. Therefore, the logic signal SO is displayed at the logic signal output terminal TO as “1” in binary display.
When the logic signals S1 and S2 take "0" and "1" in binary representation, respectively, the insulated gate thin film transistors Q1 and Q2 turn off and on, respectively, so that the logic signal output terminal TO From the load side connected to
A current flows through the logic signal output terminal TO, then through the insulated gate thin film transistor Q2, toward the power supply terminal E2, and the input capacitance of the load is discharged. Therefore, the logic signal SO is output to the logic signal output terminal TO. Can be obtained by taking "1" in binary display.

[Problems to be solved by the invention]

However, in the case of the conventional driving method of the insulated gate thin film transistor logic circuit shown in FIG. 6, the logic signals S1 and S2 applied to the logic signal input terminals T1 and T2, respectively.
However, as shown in FIGS. 7C and D, taking “1” and “0” in binary display, and taking “0” and “1” in binary display, respectively, are alternately performed in turn. When repeated, the logic signal SO obtained at the logic signal output terminal TO takes "1" in binary display as shown in FIG. 7G;
Obtained repeatedly sequentially alternately and taking "0", but to the power supply terminal E1, as shown in FIG. 7 A, a positive relatively high voltages V ₁ is always applied, also to the power supply terminal E2 , the voltage V ₂ of the ,, zero as shown in FIG. 7 B is always given to the insulated gate thin film transistor Q1, as shown in FIG. 7 E, the logic signal output terminal tO from the power supply terminal E1 Only the current that flows to the side (this is I1) flows repeatedly,
As shown in FIG. 7F, only the current (referred to as I2) flowing from the logic signal output terminal TO to the power supply terminal E2 flows through the insulated gate thin film transistor Q2. Therefore, in this case, the insulated gate thin film transistor
Carriers accumulate and accumulate in the gate insulating films of Q1 and Q2, and the characteristic of the drain current (A) with respect to the gate voltage (V) changes from the initial characteristic shown by the curve a in FIG. The characteristic moves to the characteristic shown by the curve b in the direction along the axis of ()), and accordingly, the threshold voltages of the insulated gate thin film transistors Q1 and Q2 move accordingly. Thus, in the case of the conventional insulated gate thin film transistor logic circuit described above with reference to FIG. 6, the insulated gate thin film transistor logic circuit M always allows current to flow only in the same direction to the insulated gate thin film transistors Q1 and Q2. , And the insulated gate thin film transistor logic circuit M is repeatedly driven to drive the insulated gate thin film transistor Q1.
And the threshold voltage _{Vth of} Q2 is largely moving in one direction, so that the insulated gate thin film transistor logic circuit M is accompanied by a decrease in driving capability or the insulated gate thin film transistor logic circuit does not operate stably. To do so. Accordingly, the present invention proposes a novel insulated gate thin film transistor logic circuit without the above-mentioned disadvantages.

[Means for Solving the Problems]

The driving method of the insulated gate thin film transistor logic circuit according to the present invention is the same as the insulated gate thin film transistor logic circuit driven by the method of driving the insulated gate thin film transistor logic circuit described above with reference to FIG.
And an insulated gate type thin film transistor connected in series with the second insulated gate thin film transistor connecting the drain or source of the first insulated gate thin film transistor to the drain or source of the second insulated gate thin film transistor A thin film transistor series circuit, wherein the insulated gate thin film transistor series circuit is connected between first and second power supply terminals, and first and second logic signal input terminals from the gates of the first and second transistors; Respectively, and a method of driving an insulated gate thin film transistor logic circuit that drives a insulated gate thin film transistor logic circuit by deriving a logic signal output terminal from a connection midpoint of the first and second insulated gate thin film transistors, First and second power supply voltages are applied to the first and second power supply terminals, respectively. And to obtain, and to give each of the first and second power supply terminals to said second and first power supply voltage, and alternately allowed sequentially performed to drive the insulated gate thin film transistor logic circuit.

[Action / Effect]

According to the insulated gate thin film transistor logic circuit of the present invention, the first logic signal input terminal is represented by a binary value “1”.
And at the same time providing a first logic signal taking "0", and providing a second logic signal which is logically inverted with respect to the first logic signal to the logic signal input terminal of FIG. Depending on whether the first or second logic signal takes "1" or "0" in binary representation at the output terminal,
The same function as that of the conventional method of driving an insulated gate thin film transistor logic circuit described above with reference to FIG. 6, which is obtained by taking "1" or "0" in binary display, can be obtained. However, in the case of the driving method of the insulated gate thin film transistor logic circuit according to the present invention, the first and second power supply terminals are supplied with the first and second power supply voltages, respectively, and the first and second power supply terminals are supplied with the first and second power supply terminals. 2 and the first power supply voltage are alternately and sequentially applied to drive the insulated gate thin film transistor logic circuit.
The insulated gate thin film transistor logic circuit is driven by passing a current through the first and second insulated gate thin film transistors in a first direction or in a second direction opposite thereto, thereby providing an insulated gate. It is effectively avoided that the threshold voltage of the first and second insulated gate thin film transistors is largely shifted to one side by the repetitive driving of the insulated gate thin film transistor logic circuit. It is possible to effectively avoid the possibility that the capacity is reduced or the insulated gate thin film transistor logic circuit does not operate stably.

Embodiment 1 Next, a first embodiment of a method of driving an insulated gate thin film transistor logic circuit according to the present invention will be described with reference to FIG. In FIG. 1, parts corresponding to those in FIG. 6 are denoted by the same reference numerals, and detailed description thereof will be omitted. In the method of driving an insulated gate thin film transistor logic circuit according to the present invention shown in FIG. 1, the same insulated gate thin film transistor logic circuit driven by the conventional method of driving an insulated gate thin film transistor logic circuit described above with reference to FIG. for driving the M, giving to the power supply terminal E1 and E2, when the same voltage V ₁ and V ₂ a driving method of a conventional insulated gate type thin film transistor logic circuit described above in Fig. 6 only the respective predetermined time T _S it and, and giving to the power supply terminal E1 and E2 voltages V2 and V ₁ the same amount of time T _S, respectively,
It is performed alternately and periodically at a repetition period of 2T _S. Further, the same logic signals S1 and S2 as those in the method of driving the conventional insulated gate thin film transistor logic circuit described above with reference to FIG. 6 are applied to the logic signal input terminals T1 and T2, and the logic signal input terminals T1 and T2 in the providing a logic signal S2 and S1, and giving to the power supply terminals E1 and E2 in the voltage V ₁ and V _2, alternating with providing a voltage V ₂ and V ₁ to the power supply terminal E1 and E2 respectively The insulated gate thin film transistor logic circuit M is driven by alternately performing the operation in synchronization with the sequential operation. The above is the first embodiment of the driving method of the insulated gate thin film transistor logic circuit according to the present invention. According to such an insulated gate thin film transistor logic circuit driving method according to the present invention, the logic signals S1 and S2 are:
As shown in FIGS. 2C and 2D, in each section of the period T _S , “1” and “0” are respectively taken in binary display, and then “0” and “1” are taken in binary display. Each time, and apply a period to the logic signal input terminals T1 and T2.
It is given in the first section of the 2T _S logic signals S1 and S2, respectively, if provides a logic signal S2 and S1, respectively, in a subsequent section of period 2T _S, the insulated gate thin film transistors Q1, as shown in FIG. 2 E to, in the first section of period 2T _S, the current I1 flowing to the logic signal output terminal tO side occurs from the power supply terminal E1 side, in the next section of the cycle 2T _S, the power supply terminal E1 side from the logic signal output terminal tO side A current I1 'flows, and then a current I1 flows from the power supply terminal E1 to the logic signal output terminal TO. FIG. 2F shows an insulated gate thin film transistor Q2.
As shown in the figure, a current I2 flowing from the power supply terminal E2 to the logic signal output terminal TO occurs in the first section of the cycle 2T _S , and then a current I2 ′ flowing from the logic signal output terminal TO to the power supply terminal E2. Occurs, and a current I2 flowing from the power supply terminal E2 side to the logic signal output terminal TO side occurs in the next section of the cycle 2T _S. Then, the logical output signal SO is output to the logical signal output terminal TO.
It is obtained as shown in FIG. 2G, corresponding to "1" or "0" of the logic input signal S1 or S2. Therefore, in each of the insulated gate thin film transistors Q1 and Q2, carriers are not accumulated and accumulated in the gate insulating film, and the characteristic of the drain current (A) with respect to the gate voltage (V) is determined by Even if the state moves in the direction along the axis of (V), as shown in FIG. 3, the curve b 'or c'
As is clear from the characteristic shown by, the threshold voltage of the insulated gate thin film transistors Q1 and Q2 is only slightly shifted in the positive or negative direction along the axis of the gate voltage (V). It hardly moves Even if it moves, it moves only by a small value. As described above, in the case of the method of driving the insulated gate thin film transistor logic circuit according to the present invention shown in FIG. 1, the insulated gate thin film transistor logic circuit M may cause a current to flow through the insulated gate thin film transistors Q1 and Q2 in the first direction. ,
Since the driving is performed while flowing in the second direction, the threshold voltage _{Vth of} the insulated gate thin film transistors Q1 and Q2 is largely moved in one direction even by the repeated driving of the insulated gate thin film transistor logic circuit M. Not
Therefore, there is no fear that the driving capability of the insulated gate thin film transistor logic circuit M is reduced or the insulated gate thin film transistor logic circuit M does not operate stably.

Second Embodiment Next, a second embodiment of the method of driving an insulated gate thin film transistor logic circuit according to the present invention will be described with reference to FIG. In FIG. 4, parts corresponding to those in FIG. 1 are denoted by the same reference numerals, and detailed description thereof will be omitted. In the driving method of the insulated gate thin film transistor logic circuit according to the present invention shown in FIG. 4, in the insulated gate thin film transistor logic circuit M described in FIG. 1, the gate of the insulated gate thin film transistor Q1 and the logic signal input terminal T1 are connected. Between and insulated gate thin film transistor
Between the gate of Q2 and the logic signal input terminal T2, n-channel enhancement-type insulated gate thin film transistors Q1 'and Q2' are interposed, respectively, and the gates of the insulated gate thin film transistors Q1 and Q2 are connected to the ground. Between,
The insulated gate thin film transistor logic circuit M to which the capacitance elements C1 and C2 are connected is driven as described below. That is, the insulated gate thin film transistors Q1 'and Q1
2 'is given to the gate of the transfer signal G which takes "1" and "0" in binary representation as "1" in binary representation.
By turning on both, the logic signals S1 and S2 given to the logic signal input terminals T1 and T2 are changed to the capacitance elements C1 and
C2, and then the transfer signal G is given as a binary "0" to hold the logic signals S1 and S2 written in the capacitors C1 and C2, respectively. The logic signals S1 and S2 written to C1 and C2 respectively turn on or off the insulated gate thin film transistors Q1 and Q2 to drive the insulated gate thin film transistor logic circuit M. In this case, the power supply terminal E1 and the providing the voltages V ₁ and V ₂ respectively, E2, and giving to the power supply terminal E1 and E2 the voltage V ₂ and V _1, respectively, sequentially alternating, causing performed periodically. The above is the second embodiment of the driving method of the insulated gate thin film transistor logic circuit according to the present invention. According to such an insulated gate thin film transistor logic circuit driving method according to the present invention, the logic signal S1 is now
As shown in FIG. 5D, it repeatedly repeats "1" and "0" sequentially in binary display, and the logical signal S2 which is logically inverted with respect to the logical signal S1 is shown in FIG. 5E. As shown in the figure, the sequence of taking "0" and "1" sequentially in binary display is repeated, and the cycle of the repetition is set to T _S, and the transfer signal G is accordingly changed as shown in FIG. 5C. , And the cycle of taking “1” and “0” in binary display is repeated.
When T _S / 2, power supply terminals E1 and E2 are
As shown in, for example, 2T _S interval only voltages V ₁ and V ₂ and to give each sequentially alternately providing respectively by the voltage V ₂ and V ₁ a section of the same 2T _S to the power supply terminals E1 and E2 If it is performed repeatedly (the cycle of the repetition is 4T _S ),
As shown in FIG. 5F, the current I1 in the first direction and the current I1 'in the second direction flow sequentially and alternately through the insulated gate thin film transistor Q1. 5 Current I2 in the first direction as shown in FIG.
As the current I2 'in the second direction flows alternately, the logic signal output terminal TO repeatedly takes "1" and "0" in binary display as shown in FIG. 5H. A logic signal SO is obtained. Therefore, the method of driving the insulated gate thin film transistor logic circuit according to the present invention shown in FIG. 4 is the same as the method of driving the insulated gate thin film transistor logic circuit of the present invention described above with reference to FIG. The thin-film transistor logic circuit M is driven while passing a current through the insulated gate thin-film transistors Q1 and Q2 in the first direction or in the second direction. Also, the threshold voltage _{Vth of} the insulated gate thin film transistor Q1 and Q2 does not greatly move in one direction, so that the insulated gate thin film transistor logic circuit M has a reduced driving capability, There is no fear that the thin film transistor logic circuit M will not operate stably. In the above description, the case where the present invention is applied to the case where the insulated gate thin film transistor logic circuit described above with reference to FIGS. 1 and 4 is driven has been described.
The first and second insulated gate thin film transistors are first
An insulated gate thin film transistor in series, wherein the drain or source of the insulated gate thin film transistor is connected to the drain or source of the second insulated gate thin film transistor; A series circuit is connected between the first and second power supply terminals, and derives first and second logic signal input terminals from the gates of the first and second insulated gate transistors, respectively, for the first and second power supply terminals. It is apparent that the same operation and effect as described above can be obtained by applying the present invention to the case of driving an insulated gate thin film transistor logic circuit that derives a logic signal output terminal from the connection midpoint of the insulated gate thin film transistor. Would.

[Brief description of the drawings]

FIG. 1 is a diagram showing a first embodiment of a method for driving an insulated gate thin film transistor logic circuit according to the present invention. FIG. 2 is a waveform diagram for explaining the operation of the insulated gate thin film transistor logic circuit. FIG. 3 is a diagram for explaining the operation of the insulated gate thin film transistor logic circuit according to the first embodiment of the method for driving the insulated gate thin film transistor logic circuit according to the present invention shown in FIG. 1; FIG. 6 is a diagram showing characteristics of drain current (A) with respect to V). FIG. 4 is a diagram showing a second embodiment of the method of driving the insulated gate thin film transistor logic circuit according to the present invention. FIG. 5 is a waveform chart for explaining the operation of the insulated gate thin film transistor logic circuit. FIG. 6 is a diagram showing a method of driving a conventional insulated gate thin film transistor logic circuit. FIG. 7 is a waveform chart for explaining the operation of the insulated gate thin film transistor logic circuit. FIG. 8 is a graph for explaining the operation of the insulated gate thin film transistor logic circuit according to the conventional method of driving the insulated gate thin film transistor logic circuit shown in FIG. FIG. M: Insulated gate thin film transistor logic circuit Q1, Q2, Q1 ', Q2': Insulated gate thin film transistor E1, E2: Power supply terminal T1, T2: Logic signal input terminal TO: Logic signal output terminal C1, C2 …… Capacitive element

Claims (2)

(57) [Claims] A first and a second insulated gate thin film transistor are connected in series in such a manner that the drain or the source of the first insulated gate thin film transistor is connected to the drain or the source of the second insulated gate thin film transistor. A connected insulated gate thin film transistor series circuit, wherein the insulated gate thin film transistor series circuit is connected between the first and second power supply terminals, and the first and second transistors have first and second gates connected from the gates of the first and second transistors. An insulated gate thin film transistor for driving an insulated gate thin film transistor logic circuit that derives a second logic signal input terminal and derives a logic signal output terminal from a connection point between the first and second insulated gate thin film transistors In the method for driving a logic circuit, the first and second power terminals are connected to first and second power terminals. Driving the insulated gate thin film transistor logic circuit by alternately and sequentially applying a source voltage and applying the second and first power supply voltages to the first and second power supply terminals, respectively. A method for driving an insulated gate thin film transistor logic circuit. 2. A method for driving an insulated gate thin film transistor logic circuit according to claim 1, wherein said first and second logic signal input terminals include a first logic signal and a second logic signal having a polarity opposite to said first logic signal. Providing a logic signal, respectively, and connecting the second and third logic signal input terminals to the second and third logic signal input terminals.
And applying the first logic signal, respectively, applying the first and second power supply voltages to the first and second power supply terminals, and applying the second power supply voltage to the first and second power supply terminals. And applying the first power supply voltage alternately and sequentially in synchronism with the alternately and sequentially applying the first power supply voltage to drive the insulated gate thin film transistor. Drive method.