JP2746733B2 - Multiple disc player parallel operation image playback device - Google Patents

Description

TECHNICAL FIELD The present invention relates to a video format signal (an information signal including a horizontal and vertical synchronizing signal section and an information signal section; the same applies hereinafter) output from a plurality of disk players operating in parallel. The present invention relates to an image reproducing apparatus that obtains a single video format signal by combining a plurality of video signals and displays the obtained signal.

BACKGROUND ART A video signal is frequency-divided, for example, and the obtained divided signal is recorded on a set of video discs. The set of video discs is played by operating a plurality of disc players in parallel, and the obtained signal is reproduced. 2. Description of the Related Art An image reproducing apparatus for displaying an image by combining images is known, for example, from JP-A-63-175595.

When playing a video disc composed of a plurality of discs as a set by such an image reproducing apparatus, special reproduction accompanied by a jump operation such as search or scan may be performed by a user's operation. In such special reproduction, the continuity of the video signal in the read signal is lost, and the image display is disturbed.

Therefore, an image memory such as a frame memory or a field memory is provided in the apparatus, an image is displayed using the image data in the image memory during a special reproduction operation such as a search or a scan, and a read signal is not detected during a jump period. Disturbance in image display due to continuity may be avoided.

However, such an image memory requires a large-capacity memory and is expensive.

SUMMARY OF THE INVENTION [Object of the Invention] Accordingly, the present invention provides a method for displaying images without disturbance even during a special reproduction operation such as search or scan without using a large-capacity memory such as a frame memory or a field memory. An object of the present invention is to provide a disk player parallel operation image reproducing apparatus.

[Constitution of the Invention] A multi-disc player parallel operation image apparatus according to the present invention includes a frame designating unit for issuing a frame designating signal indicating a frame to be reproduced, and searching for a frame designated by the designated frame signal. A plurality of disc players for reading and outputting frame signals;
A synthesizing means for synthesizing a video format signal comprising a supplied horizontal and vertical synchronizing signal portion and an information signal portion, and performing at least a time axis adjustment on each output signal of the disc player, unless a disable signal is given. A multi-disc player parallel operation image reproducing apparatus including: a relay circuit for relaying the signal to the synthesizing circuit; and an image reproduction processing circuit for displaying an image based on the synthesized signal emitted from the synthesizing circuit. Outputs the number of the frame currently being read as the current frame number. The frame specifying means determines a temporary target frame corresponding to the externally specified frame specified from the outside, and sets the temporary target frame as a specified frame. First means for supplying to at least one of the plurality of disc players,
Second means for issuing the disable signal as long as the current frame number of the at least one disc player and the designated frame do not match, while instructing another disc player of the at least one disc player to perform a reproducing operation; At the end of the frame search operation of the at least one disk player, a second provisional designation signal is supplied to the other disk player, while the other disk player is supplied with the second provisional designation signal until the end of the frame search operation of the other disk player. And a third means for instructing a reproduction operation.

[Operation of the Invention] In the multi-disk player parallel operation image reproducing apparatus according to the present invention, a frame designating signal indicating a frame to be reproduced is issued, a frame designated by the frame designating signal is searched, and a signal of the designated frame is searched. A plurality of disc players for reading and outputting the video signal, a synthesizing circuit for synthesizing the supplied video format signal, and adjusting the time axis of the output signal from the disc player, as long as the disable signal is not provided, A relay circuit for relaying the current frame number to the synthesizing circuit, and an image reproduction processing circuit for displaying an image based on the synthesized signal from the synthesizing circuit. A provisional target frame corresponding to the specified externally designated frame is determined and A first provisional designation signal to be used as a system is supplied to one of the plurality of disc players, a frame search for a designated frame is commanded, and the current frame number from the disc player matches the designated frame number of the first provisional designation signal. If not,
It issues a disable signal and instructs the other disk player to perform a reproducing operation. At the end of the frame search operation of the one disk player, supplies a second provisional designation signal to the other disk player. Until the end of the frame search operation of another disc player,
Command of the reproducing operation to the disc player.

Embodiment Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a diagram showing a system configuration in which a Hi-Vision signal is divided into three channels and recorded on a recording medium (a laser video disk in this case). In FIG. 1, a high-vision signal source 1 outputs an analog signal of a luminance signal Ya and two kinds of color difference signals Pr and Pb. Here, the luminance signal Ya is 30 MHz.
, And the color difference signals Pr and Pb have a 15 MHz band. Figure 2 is Y
FIG. 3 shows a schematic diagram of signal waveforms of a, Pr, and Pb.
It is the reciprocal of 5 KHz, which is about 29.63 μs.

These high-definition signals are supplied to the encoder 2 shown in FIG. 1. However, in practice, the above-mentioned band is not required, and the luminance signal Ya is supplied to the A through a 22 MHz low-pass filter 3Y.
-Supplied to the D converter 4Y. The color difference signals Pr and Pb are 11
The signals are supplied to A / D converters 4R and 4B via MHz low-pass filters 3R and 3B, respectively. The sampling clock in the AD converter group 4 is supplied from the timing pulse generation circuit 5. In the A / D converter 4Y, the analog luminance signal Ya is converted into an 8-bit digital luminance signal Y by a clock of 74.25 MHz and converted into a Y process circuit.
Supplied to 6Y. The analog color difference signals Pr and Pb are A-
74.25 / 2MHz (= 37.125MHz) for D converters 4R and 4B
The 8-bit digital color difference signal P is generated by the clock of z).
Is converted to _R and P _B, respectively P _R process circuit 6R, it is supplied to the P _B processing circuit 6B.

FIG. 3 is a more detailed block diagram of each of the above process circuits. Here, since the color difference signals P _R and P _B performs a so-called line sequential process of transmitting alternately every H line, the P _R processing circuit 6R and P _B processing circuit 6B in order to prevent aliasing, the vertical digital Pre-low-pass filters 19 and 20 are provided.

Y luminance signal is supplied to the processing circuit 6Y Y and P _R processing circuit 6R, P _B processing circuit 6B color difference signals passed through the location lowpass filter before being supplied to the P _R, P _B is the write clock from the timing pulse generating circuit 5, First channel FIFO 16Y, 16R, 16B, second channel FIFO by write enable
17Y, 17R, 17B, and written to the third channel FIFOs 18Y, 18R, 18B. At this time, the synchronizing signal component is deleted, the line-sequential processing of the color difference signal is performed, and the first, second, and
And a third three-channel signal. Figure 4 (a) is first of each process circuit digital HDTV signal after A-D conversion to be supplied to the Y, P _R, shows the sequence of P _B, Fig. 4 (b) Each process circuit Tunnel FI
Write enable signal YW1, RW1, BW1 to FO 16Y, 16R, 16B
It is. FIG. 5 (a) shows an array of the luminance signal data YD1 and the color difference signal data RD1 and BD1 which are written into the first channel FIFOs 16Y, 16R and 16B by the write enable signal. 4 (a) and FIG. 5 (a), the synchronizing signal component described as H-SYNC in FIG. 5 (a) is deleted, and a signal for every three lines is written in the FIFO. color difference signal is made sequentially processed line has become alternating P _R and P _B. FIGS. 5 (b) and 5 (c) show arrays of luminance signal data and color difference signal data written to the second channel FIFOs 17Y, 17R, 17B and the second channel FIFOs 18Y, 18R, 18B, respectively. It is. In addition, FIFO
The speed of writing to the memory follows the write clock of the timing pulse generation circuit 5. The write clock YWφ of the luminance signal Y is
74.25 MHz, the write clocks RWφ and BWφ of the color difference signals P _R and P _B are
74.25 / 2MHz = 37.125MHz. On the other hand, the read clock for reading from the FIFO is supplied from the timing pulse generation circuit 5, and the read clocks YRφ, RRφ, and BRφ of the luminance signal Y and the color difference signals P _R and P _B are all 33.75 MHz. Here, the clock ratio for writing and reading is obtained.

74.25 MHz ÷ 33.75 MHz = 2.2 (1) 37.125 MHz ÷ 33.75 MHz = 1.1 (2) From the above equation (1), the time axis of the luminance signal Y is extended by 2.2 times, and the equation (2) is obtained. More color difference signals P _R , P
_B means that the time axis was extended 1.1 times. The signals divided into three channel signals by the time axis expansion are converted into a first channel signal V ₁ , a second channel signal V _2, and a third channel signal from the first, second, and third FIFOs for each process circuit.
It is output as V _3. The output channel signals are combined by a wired OR circuit (not shown) for each channel, and a disk synchronization signal and a disk code signal provided from the timing pulse generation circuit 5 are added thereto. It is supplied to 7a, 7b, 7c. FIG. 6A shows a first channel signal V ₁ , a second channel signal V ₂ and a third channel signal supplied to the DA converter.
The sequence of the V _3. In FIG. 6 (a), the luminance signal Y is about 29.63 μs of the 1H line of the original HDTV signal, of which about 3.77 μs of the synchronizing signal component has been removed, and about 25.86 μs of the video signal component alone is 2.2 times as long. Shaft extended about 56.89μ
s is read with a 33.75 MHz read clock.

56.89 μs × 33.75 MHz ≒ 1920 (3) From equation (3), the digital luminance signal components of Y ₁ , Y ₂ ... In FIG. 6A are in 1920 × 8 bit units. Similarly, the color difference signal component is 25.86 μs × 1.1 = 28.45 μs (4) 28.45 μs × 33.75 MHz ≒ 960 (5) From the equations (4) and (5), P _R1 and P in FIG. _R2 ……, P
The digital color difference signal components of _B1 , _PB2 ... Are in units of 960 × 8 bits. Further, a guard section is provided between the luminance signal component and the color difference signal component for eight clocks.

Also, the added synchronization signal is for 112 clocks, and 1920 + 960 + 8 + 112 = 3000 (6) From the equation (6), 3000 clocks are supplied to the DA converters 7a, 7b, and 7c as one new line. . Three channel signals V ₁ , V ₂ and V consisting of a luminance signal component, a color difference signal component and a synchronization signal or a disk code signal and a synchronization signal
₃ is converted D-A converter 7a, 7b, at 7c, from a digital signal to an analog signal at a clock timing of 33.75MHz given from the timing pulse generating circuit 5.

Since the luminance signal in the 22 MHz band is extended by 2.2 times in the time axis, it is sufficient if there is a band of 10 MHz than 22 MHz ÷ 2.2 = 10 MHz, and the color difference signal in the 11 MHz band is extended by 1.1 times in the time axis. Similarly, a band of 10 MHz is sufficient than 11 MHz ÷ 1.1 = 10 MHz. Therefore, the output of the DA converters 7a, 7b, 7c is cut off unnecessary high frequency components after the DA conversion by the 10 MHz low-pass filters 8a, 8b, 8c, and the encoder 2 outputs ch1, ch.
It is output as three analog signals of 2, ch3. FIG. 6 (b) shows a schematic diagram of the output signal waveform, in which the analog luminance signal component Ya and the analog color difference signal component Pr or
Pb is synthesized in the disk H, which is a new line. In FIG. 6A, the color center level is set to a value obtained by equally dividing the signal peak level and the pedestal level into two. This is necessary when a video signal is reproduced from a recorded disk.

The signal for each channel output from the encoder 2 is supplied to the selection circuit 9 and the three channel signals ch1, ch2, ch3
Are independently and sequentially selected and supplied to the FM modulation circuit 10. In the FM modulation circuit 10, the supplied channel signal is output as an FM video signal of a low frequency of 11.61 MHz to 14.91 MHz (deviation 3.3 MHz) and supplied to the synthesis circuit 11.

On the other hand, a digital audio signal output from a high-definition digital (PCM) audio source 12 separate from the HDTV signal source 1 is supplied to an EFM encoder 13, encoded and output, and supplied to a synthesis circuit 11. The synthesis circuit 11 adds the FM video signal and the coded digital audio signal to add 1
And output from the output terminal 14 as an RF signal. The system controller 15 controls the above-described series of operation control.

The RF signal output from the output terminal 14 is limited in amplitude by a limiter (not shown) and shaped into a square wave. As a result, a multiplex signal whose repetition frequency represents video signal information and whose change in duty represents audio information is obtained. The signal rectified into a square wave is applied to an optical modulator of a laser cutting machine (not shown), and the three channel signals are recorded on three disks for each channel. FIGS. 7A, 7B and 7C show formats of video signals recorded on three disks A, B and C. FIG. 7 (a), (b) and (c), the line number is the number of the disk H in FIG.
It consists of 375 lines, and 375 lines x 3 = 1125 lines ... (7) As is apparent from the above equation (7), 1125 H-line high-vision signals are recorded per set of frames on three disks. can do.

In the present embodiment, recording is performed independently on three disks. However, by using a cutting machine device (not shown) having an optical modulator that emits three independent laser beams, the data can be recorded on one disk. It is also possible to record three tracks simultaneously.

As described above, a broadband Hi-Vision signal can be divided into three channel signals and each can be independently recorded as video signals of 10 MHz or less on three disks. A method of reproducing the original Hi-Vision signal by using three independent video disk players on a recording disk having three Hi-Vision signals recorded as one set will be described in detail.

FIG. 8 is a configuration diagram of a system for reproducing a high-definition signal. In FIG. 8, a first player 21, a second player
22. The third player 23 simultaneously plays the recording disks of the high-definition signal, which is a set of three, and supplies a reproduced video signal and the like to the decoder 24. FIG. 9 shows the configuration of each player. A video disk 40 is driven to rotate by a spindle motor 41, and a pickup 42 reads a recorded video signal. The pickup 42 includes a laser diode, an objective lens, a collimator lens, a focus actuator, a tracking actuator, a photodiode, and the like. The output of the pickup 42 is supplied to the RF amplifier 43 and simultaneously to a focus servo circuit (not shown) and a tracking servo circuit (not shown). The RF video signal output from the RF amplifier 43 is supplied to a dropout detection circuit 44 and an FM demodulation circuit 45. The RF video signal supplied in the FM demodulation circuit 45 is demodulated and output, and is output from the player via the low-pass filter 46. The reproduced output signal waveform is the sixth
It is equivalent to FIG. However, a so-called dropout may occur due to scratches on the video disc 40 or adhesion of dust. The dropout detection circuit 44 detects these dropouts and sets the output to a high level (Hi) during the dropout period.

It is widely known that compensation for dropout is performed by a CCD or the like which is an analog delay element that replaces and compensates for a signal one line before. However, although a wideband Hi-Vision signal is divided into three channels to narrow the band as in this embodiment, a high-speed CCD is required to compensate for a reproduced video signal in a 10 MHz band. 1 by CCD
Replacement of the signal before the line does not provide sufficient characteristics as a video signal. Therefore, compensation for dropout is performed in the decoder 24 at the stage of a digital signal using a line memory described later. Incidentally, in order to control the speed of the spindle motor 41 in the player, a synchronization signal component in the video signal is required. Therefore, the output of the low-pass filter 46 is a lower-frequency low-pass filter 47.
Is supplied to the dropout compensation circuit 48 for the synchronization signal. This circuit is composed of a CCD 48a, a selection circuit 48b, and the like, but compensates for a 11.25 KHz synchronization signal and a 30 Hz frame pulse signal, so that a relatively low-speed CCD 48a can be used.

The dropout detection signal (hereinafter abbreviated as DOS) output by the dropout detection circuit is supplied to the decoder 24 that performs dropout compensation of the reproduced video signal, and is also supplied to the selection circuit 48b. Select circuit 48b is DO
When S is at a low level, that is, when no dropout occurs, it is connected to the side a in FIG. When dropout occurs, DOS goes high, the selection circuit 48b is connected to the b side, and transmits the reproduced video signal one line before from the CCD 48a to the synchronization separation circuit 49.

In the synchronization separation circuit 49, a synchronization signal (PBH) and a frame pulse signal (PBFP) are separated and extracted from the supplied video signal, and supplied to the spindle servo circuit 50.
The synchronization signal (PBH) and the frame pulse signal (PBFP) supplied in the spindle servo circuit 50 are supplied to the decoder 24.
The phase is compared with the reference synchronization signal (REFH) and the reference frame signal (ADFP) supplied from the controller, respectively, and the speed of the spindle motor 41 is controlled.

On the other hand, the EFM audio signal component in the recording signal of the video disk 40 is supplied to the EFM demodulation circuit 51 via the pickup 42 and the RF amplifier 43. The EFM demodulation circuit 51 performs processing such as EFM demodulation and error correction, outputs 8-bit digital audio signals for the L channel and the R channel, and supplies the digital audio signals to DA converters 52L and 52R. Here, the digital audio signal is converted to an analog audio signal, and the low-pass filters 53L and 53R
Is output from the player via

The player controller controls the above-described series of operations in the player, and is connected to the main controller in the decoder 24 by a serial interface. As described later, the serial interface communicates with the main controller at a period of a frame signal which is a so-called V period to exchange necessary information. Further, when the operation of the player is abnormal, a player disable signal is immediately output to the main controller via a connection line separate from the serial interface, regardless of the V cycle.

In FIG. 8, the sixth output from the three players is shown.
The three-channel reproduced analog video signal having the output signal waveform as shown in FIG. 3B is supplied to signal processing circuits 25, 26 and 27 including an AD conversion circuit in the decoder 24. The signal processing circuit 25 includes an automatic level control circuit 25a, a pulse generation circuit 25b, an AD conversion circuit 25c, and the like.

FIG. 10 is a diagram showing the signal processing circuit 25 in more detail. In FIG. 10, the supplied reproduced video signal is an ALC / AGC circuit 55 for performing level shift and gain control.
The output is supplied through a low-pass filter 56 to a limiter circuit 57 provided to prevent a trouble when the signal is excessive. The output of the limiter circuit 57 is AD
The signals are supplied to the converter 25c and the sample and hold circuits 58 and 59. In the sample and hold circuit 58, the voltage at the petestal level shown in FIG. 6B is held by the sampling pulse SP1 and supplied to the integration circuit 60. Integrator circuit
At 60, the supplied pedestal level is compared with a reference pedestal level, the difference is integrated and output through a limit circuit or the like (not shown), and supplied to an ALC / AGC circuit 55, where the pedestal level of the reproduced video signal is changed. The level is shifted to be equal to the reference pedestal level. Similarly, in the sample and hold circuit 59, the voltage of the color center level shown in FIG. 6B is held by the sampling pulse SP2 and supplied to the signal processing circuit 55 through the integration circuit 61, and the color center level of the reproduced video signal is changed. The gain is controlled to be equal to the reference color center level.

The reproduced video signal supplied to the ALC / AGC circuit 55 is also supplied to the waveform shaping circuit 62 at the same time, and amplified, filtered,
Impedance conversion and the like are performed and supplied to the synchronization separation circuit 63, the pedestal clamp circuit 68, and the disk frame pulse separation circuit 72. In the synchronization separation circuit 63, the separated synchronization signal is supplied to a ramp generation circuit 64 via a dropout sync gate circuit (not shown) for stopping transmission of the synchronization signal at the time of dropout. In the ramp generation circuit 64, a capacitor (not shown) is charged and discharged in accordance with the supplied synchronization signal, and a ramp is generated and supplied to the comparators 65, 66 and 67. The comparators 65 and 66 are window comparators for holding the output at a high level or a low level within a predetermined voltage range, and timing (time) for appropriately sampling and holding the color center level and the pedestal level shown in FIG. 6B. Are respectively defined. Since the ramp wave supplied to the comparator has a voltage proportional to the passage of time with the synchronization signal as a time reference, the outputs of these window comparators are supplied to the sample and hold circuits 59 and 58 as sampling pulses SP2 and SP1. Appropriate sample hold is performed.

Waveform shaping circuit 62 supplied to pedestal level circuit 68
From the comparator 66, the pedestal level is clamped to a predetermined voltage by SP1 which is the output of the comparator 66, and the signal is DC-reproduced. The comparator 67 supplies a gate pulse before and after the rising edge of the synchronizing signal to the H-sync separation circuit 69. The rising point of the synchronizing signal pulse is accurately detected again within the range of the gate pulse. Is output. This output is supplied to a pulse width extending circuit (not shown), and the trailing edge of the pulse is extended, and the PLL circuit 70
Is supplied as one input. The PLL circuit 70 includes a phase comparator, a loop filter, a limiter, a VCO that generates a 33.75 MHz clock, and the like. VCO output is PLL circuit 7
The output of 0 is supplied to the frequency dividing circuit 71. Where 33.75MH
The z clock is divided by a factor of 3000 to become a 11.25 KHz pulse and output from the frequency dividing circuit 71. The output is supplied as the other input of the PLL circuit 70 and is output from the reproduced video signal by the phase comparator. The phase is compared with the 11.25 KHz synchronization signal. When the phase difference is fed back to the VCO, a 33.75 MHz clock pulse synchronized with the reproduced video synchronization signal is generated and supplied to the A / D converter 25c. A
In the -D converter 25c, the reproduced analog video signal is converted into an 8-bit reproduced digital video signal (hereinafter, simply referred to as a reproduced signal) by a 33.25 MHz clock pulse. Since the pedestal level and the color center level are adjusted to the reference level in the above-described ALC / AGC circuit 55, the reproduced signal expressed in hexadecimal after AD conversion has a pedestal level of [20] _H and a color center. The level is [80] _H. Further, at the time of recording, since the value of the color center level is set to a value obtained by equally dividing the signal peak level and the pedestal level into two, the peak value of the reproduced signal is [E0] _H. Therefore, from [E1] _H to [FF]
_The value up to _H (the maximum output value of the AD converter) does not exist as a reproduced signal.

In the disc frame pulse separation circuit 72, the frame pulse (PBFP) of the reproduced video signal is separated and extracted and
Output as a Hz pulse. Therefore, the pulse generation circuit 25
b. 33.75MHz clock, 11.25KHz synchronization signal (PB
H) and the disc frame pulse (PBFP) are output and supplied to the write timing circuit 28 in FIG.

In the signal processing of such a signal processing circuit 25, exactly the same signal processing is performed in the signal processing circuits 26 and 27 in which the internal blocks are omitted in FIG. The reproduced signals output from the three-channel signal processing circuits 25, 26, and 27 are supplied to circuits (hereinafter, abbreviated as TBC circuits) 29, 30, and 31, which perform time axis compression and time axis correction. The write timing circuit 28 has a three-channel clock and a synchronization signal (PB
H), from the reproduction frame pulse (PBFP), a three-channel write control signal synchronized with the reproduction signal is generated and supplied to the TBC circuits 29, 30 and 31 of the respective channels.

Since the 8-bit reproduction signal supplied to the TBC circuit includes a time axis fluctuation (jitter) due to the eccentricity of the disc, etc., the respective reproduction signals are synchronized, that is, by a write control signal including jitter. The data is written to a FIFO (not shown) in the TBC circuit. At the time of writing, the synchronization signal component of the playback signal is deleted, and only the video signal component is 33.75 MHz.
Is written to the FIFO at the timing of the clock. Accordingly, in the format diagrams of the video signals shown in FIGS. 7A, 7B and 7C, 960 clocks of the color difference signal and the luminance signal in the lines from line numbers 13 to 374 excluding the H synchronization and the guard section. 1920 clocks are written. Further, the FIFO is provided with a luminance signal FIFO and a color difference signal FIFO separately. During reading from the FIFO, the luminance signal is the color difference signal is output after being compressed axis along 1 / 1.1 times to 1 / 2.2, the luminance signal Y processing circuit 32, the color difference signals P _R
/ P _B processing circuit 33 to the three channels are supplied are connected in wired-OR.

On the other hand, the DOS (dropout detection signal) output from each of the players 21, 22, and 23 is supplied to each TBC, and when dropout occurs, that is, when DOS is at a high level, [2
[0] Write a value of [FF] _H instead of an 8-bit reproduced signal having a value from _H to [E0] _H.

The main controller 34 has a three-channel TBC circuit 29,
Selection control signal to the 30 and 31 (hereinafter, abbreviated as SEL) giving performs control of readout from the TBC circuit, three channels and supplies to the Y processing circuit 32 and P _R / P _B processing circuit 33 Of the readout signal of the reproduction signal is controlled.

The read timing circuit 35 generates a read clock without time axis fluctuation (jitter) and supplies it to each TBC circuit. Thus reproduced signal read is time-base-compressed by the read clock is supplied to the Y processing circuit 32 and P _R / P _B processing circuit 33 as a reproduction signal jitter is removed. Further, the sync trigger signal (SYNCTRG) output from the read timing circuit 35 is output to the Y processing circuit 32 and the PR / PB
The synchronizing signal of the high definition signal applied to the ROM in the processing circuit 33 is read from the ROM.

FIG. 11 is a block diagram of a portion of the Y processing circuit 32 for performing signal identification and signal replacement processing. In FIG. 11, a reproduced signal of a luminance signal supplied from a three-channel signal line connected by a wired OR (hereinafter, abbreviated as “reproduced Y”)
Are supplied to the FF detection circuit 73 and the latch circuit 74.

When the value of [FF] _H is included in the reproduction Y supplied to the FF detection circuit 73, the value is detected and the output is held at the high level during the [FF] _H period. During periods other than _H , it is kept at low level. The latch circuit 74 includes the FF detection circuit 73
Performs a time adjusting operation for delaying and transmitting the supplied reproduction Y to the a side of the selection circuit 75 for a time for which the detection operation is performed and the output is determined. The output of the FF detection circuit is supplied to the selection circuit 75. When the output is at the low level, the selection circuit 75 is connected to the a side, and the output of the latch circuit 74 is supplied to the line memory 76 and the next stage circuit (not shown). Is done.

The line memory 76 delays the reproduction Y by one line time and supplies its output to the b side of the selection circuit 75. FF detection circuit
When the output of 73 is at the high level, the selection circuit 75 is connected to the b side, and the reproduction Y of one line before is supplied to the circuit of the next stage and the line memory 76.

Thus, when a dropout occurs, the period DOS goes high, since replacing the reproduced Y to the value of [FF] _H, [FF] period or drop-out period _H 1
Dropout compensation is performed by replacing the portion of the reproduction Y in the period before the line.

Circuit of Figure 11 is not only Y processing circuit 32 performs the same operation have also provided two circuits for playback chrominance signals P _R and P _B in the P _R / P _B processing circuit 33. Processing line sequential back of the color difference signals are sequentially of the line is performed in the P _R / P _B processing circuit 33 further. The method for color difference signals P _R and P _B, is the average value by performing an arithmetic mean of each two successive lines of the signal intended to cover inserted between the two lines. Since the video signal, especially the color difference signal, has a strong line correlation, the original Hi-Vision color signal can be sufficiently reproduced by such compensation.

In this way, the drop-out compensation is made, line sequential reverse playback signal processing is performed reproduced luminance signal Y of the color difference signal, as three reproduction signals of the reproduction color difference signals P _R and reproduced color difference signals P _B, Y processing circuit 32 and output from the P _R / P _B processing circuit 33 and supplied to DA converters 36Y, 36R and 36B.

These three reproduced signals are the same as those in FIG.
However, the odd lines of the even lines and P _B signal P _R signals as described above is the arithmetic mean of the front and rear of the line signal. When a character multiplexing command from the main controller 34 is given to the read timing circuit 35,
ROM output Te character data from the (not shown) (DISP) is supplied superimposed on the reproduction signal to the Y processing 32 and P _R / P _B processing circuit 33 (the superpose).

The (digital) reproduced signals supplied to the DA converters 36Y, 36R and 36B are converted into analog reproduced signals, the luminance signal Ya is converted to a 22 MHz low-pass filter 37Y, and the color difference signals Pr and Pb are converted to 11 MHz low-pass filters 37R and 37B. Supplied to Unnecessary high-frequency components, noise, and the like are removed from each low-pass filter, and are output from the decoder. The output analog signals Ya, Pr, and Pb are supplied to a color display (not shown) to reproduce and display a Hi-Vision signal.

By the way, it is a matter of course that the combination of three high-definition signal recording disks must be correct. Therefore, it is necessary for the three players 21, 22, and 23 to determine the type of the disc when starting the disc performance. This determination is made based on the disc code recorded on the line numbers 10 to 12 in FIGS. 7A, 7B and 7C, which indicates the recording signal in one frame. Fig. 12 shows the contents of this disc code HD-L
D disk code format. In this embodiment, the disc to be used is a CAV (constant angular velocity) disc.
In FIG. 2, the lead-in area corresponds to 1200 frames on the inner circumference of the recording unit. The eleventh line of this lead-in area contains 2-byte read TOC (Table of Contents) data. FIG. 13 shows the contents of the TOC data, in which necessary TOC information is recorded in 300 byte units. Since the TOC is 2 bytes per frame, 1
The unit of TOC information is 50 frames. This T
The disc ID of the OC data classification is an absolute number unique to the disc (including both sides).

The TOC information is read by the player, and is communicated with the main controller 34 in the V cycle through the serial interface as described above to exchange the TOC information and other necessary information. This main controller 34
The operation of the disk combination determination subroutine executed by the above is determined according to FIG.

When three disks are mounted on each player, the main controller 34 proceeds to step S1 and waits for reception of information that all three disks have been clamped.
When it is determined that all the clamps have been completed, a search is made for a lead-in frame, and a command to read a disc ID is transmitted (step S2). Receive disk ID and its ID
It is determined whether or not the number matches the ID number stored in the memory at the time of the previous performance (step S3). Last time
If it is determined that the disc ID matches the disc ID, the disc ID is an absolute number unique to the disc, and since the last performance was performed and the combination of the three discs was found to be correct, the disc was immediately read without reading other TOC information. Then, a frame 1 search command is transmitted to start reproduction (playing) (step S4), and then the process proceeds to the main routine. If it is determined that the ID numbers do not match the previous ID numbers, a command to read the TOC information of the three discs is transmitted to each player again (step S5). If the read TOC information is received from each player, the TOC
The disc number and the disc side data in the information are compared and decoded, and the disc numbers and disc sides of the three discs are discriminated (step S6). If it is determined that the three disk numbers and the disk side match, the disk ID numbers of these three disks are stored and stored in place of the old ID numbers in the memory (step
S7) Then, the process proceeds to step S4 to transmit a command to start reproduction (performance). If it is determined that only two of the three discs have the same disc number and disc side and the remaining one disc number or disc side does not match, the player with the one disc mounted is notified. A tray open (eject) command is transmitted (step S8), a park (stop) command is transmitted to the two players with matching discs mounted (step S9), and the process proceeds to the main routine. If it is determined that the disc numbers or disc sides do not match for all three players, a tray open (eject) command is transmitted to all three players (step S10), and the process proceeds to the main routine.

In addition to the TOC information, information exchange such as the operation state of the player is performed by communication between the main controller 34 and the player (controller) through a serial interface and a player disable signal line. FIG. 15A shows transmission data for giving a command from the main controller 34 to each of the players 21, 22 and 23. “TRAY” data is open when 0, parked when 1, and played (played) when 2.
The “ADRESS” data indicates a frame number, becomes valid in the play state, and instructs each player to reproduce the transmitted frame.

Conversely, received data as shown in FIG. 15 (b) arrives at the main controller 34 from each player. The “ERROR” data is a positive number for the designated frame number transmitted from the main controller 34 when the pickup of the player is searching for the designated frame, and becomes zero when the designated frame number is on the designated frame. . Further, if the spindle lock is released, the value becomes a negative number. “ADRESS” in FIG. 15 (b) represents the current position frame number of the pickup of the player.

In the case of normal reproduction, the main controller 34 transmits the same frame number to each player. When the frame number received from each player matches the transmission frame number, the reproduction signal of that player is output, and the non-matching player sets the reproduction signal as squelch.

The operation of monitoring the player and performing the squelch control performed by the main controller 34 will be described with reference to FIG. 15 (c). The main controller 34 moves to the player monitoring subroutine receives the current position frame F _C from the player and transmits to set the specified frame F _{I (N)} to each player (step S11) in the same V period (step S12). Since this F _C specifies the frame number corresponding to is transmitting to the V periphery period before one F _{I (N-1),} whether the F _C and F _{I (N-1)} matches A determination is made (step S13). If it is determined that they match, it is determined whether or not a disable signal has been received via the player disable line i, j, k (step S14).
When it is determined that the disable signal has not been received, the "STATUS" information of the player is determined (step S15).
This "STATUS" information indicates the servo status of the slider servo, tracking servo, spindle servo, and focus servo of the player. Step S1
If it is determined in step 5 that the servo status (status) is normal, the process proceeds to the main routine without performing squelch. When it is determined that the servo state is not normal, there is a difference in abnormal level depending on whether the servo state is abnormal or so-called quasi-normal. For example, in a normal state, the slider and the tracking servo are closed, but in the case of special reproduction including a jump operation such as a scanning operation, the tracking servo repeats closing and opening. In step S16, it is determined whether or not such a jump operation is included. If it is determined that a jump operation is included, the process proceeds to the main routine without performing squelch. When it is determined that the jump operation is not included, it is determined that the operation is abnormal, and the squelch is performed by setting the 2-bit SEL signal in the main controller 34 to the high level [11] _B for both bits (step S17). If it is determined in step S13 that the designated frame does not match the current position frame, the process proceeds to step S17, and if a disable signal is received in step S14, the process immediately proceeds to step S17 (without waiting for communication in the V cycle). Do squelch.

The SEL signal is applied to the TBC circuits 29, 30 and 31 in FIG.
Given bits (S1, S2), [00] _B , [0
1] _B , [10] _B , [11] There are four types of binary values, _B.
Even if the combination of the three disks is correct, the main controller 34 must determine which of the three disks is mounted on the three players.

In FIGS. 7 (a), (b) and (c), Y, Pr or
The number in parentheses following Pb is the line number of the original Hi-Vision number, and is recorded in the order of disk A → disk B → disk C in the case of FIG. Therefore, the SEL signal of the TBC circuit supplied with the reproduction signal of the disk A is set to [00] _{B in} order to combine the reproduction signals of the three channels in the correct order. The SEL signals of the time axis compression circuit supplied with the reproduction signals of the disc B and the disc C are respectively set to [0
1] _B , [10] _B. In the case of squelch, the SEL signal is set to [11] _B as described above.

The operation of the subroutine of the main controller 34 for playing the three players to reproduce the signal, jump and perform the search will be described with reference to FIG. 16 (a).

After starting the search operation, the main controller 34 proceeds to step S18 and sets a search target frame _FTF .
Next, the provisional target frames F _1TT and F _2TT of the first player 21 and the second player 22 are _commanded as the target frames F _TF , and the provisional target frame F _3TT of the third player 23 is commanded to the current frame F _C (step S19). ). That is, the first player 2
To jump with priority 1 and the second player 22, the third player 23 to output a current still picture frame F _C. Next, the SEL signals of the first player 21 and the second player 22 are set to [1
1] Change to _B (step S20) and perform squelch. Then whether jump is finished, i.e. the current frame F _1C and F _2C of the first and second player waits whether equal to the target frame F _TF (step S21). When matched, the provisional frame F _3TT the third player instructs the F _TF (step S22), and the squelch the third player releases the squelch of the first and second player (step S23). Third
It is waited whether or not the jump of the player has ended (step S24). When the jump has ended and the target frame has been reached, the squelch of the third player is released (step S2).
Five). The squelch of all three players is released, the search is terminated, and the process proceeds to the main routine.

FIG. 16 (b) shows the operation of each player described above. In FIG. 16, the movement of the reading points of the first and second players is A → C → D, and the movement of the reading points of the third player is A → B → D.

In the present embodiment, a still image is output, but each player may perform playback. Main controller 34 at that time
After the step 21, the first and second players are instructed to perform a reproduction command, and the step S22 is performed in the following manner: F _3TT = F _1C = F
_2C . Then, in FIG. 16 (b), the first and second
The movement of the reading point of the player is A → C → D ′, and the movement of the reading point of the third player is A → B ′ → D ′.

The operation of the main processor 34 in another embodiment of the image search will be described with reference to FIGS. 17 (a) and 17 (b). This is for setting the intermediate frame F _m in the middle of the target frame F _TF and the current frame F _C. Setting the F _TF (step S26) after set the F _m by the calculation (step S27), the main controller 34 instructs each player against temporary target frame (step S28). The current frame F _C in the first player, the second Bureya intermediate frame F _m, the third player instructs the target frame F _TF, respectively. Therefore, in FIG. 17 (b), the reading point moves from A to B while the first player remains at F _C , the reading point moves from A to C, and the reading point moves from the third player. A → D. Therefore, the main controller causes only the first player to output a still image. Therefore, the second and third players are set as squelch (step S2).
9), the second player waits whether reaches the intermediate frame F _m (step S30). Upon reaching a F _m in the tm of view the 17 (b), performing an instruction to jump to the F _TF for the first player to output a still image of F _m in the second player (step S31). Next, the squelch of the second player is released, and the squelch of the first player is set (step S32).
Player waits whether reached F _TF (step S33).
In FIG. 17 (b), the movement of the reading point of the first player is B
→ E, and the movement of the reading point of the second player becomes C → E. When the third player has reached the F _TF at time tb, the squelch the second player releases the squelch of the third player (step S34). Therefore, the third player outputs the target frame _FTF as a still image, and the reading point moves from D to F. The movement of the reading point of the first and second players changes from E to F. The first and second players are in target frame F
Wait whether reached _TF (step S35), when the second player has reached the F _TF at time tc, the first and second
The squelch of the players is released (step S36), and the squelch of all three players is released, and the process proceeds to the main routine.

Comparing Figure 16 (a) and FIG. 17 a (b), it can be seen that the time tc when three players by setting the intermediate frame F _m reaches all target frames F _TF is shortened.

Next, a method of performing a scanning operation by three players will be described with reference to FIG. In FIG. 18 (a), when the scanning operation is started, the main controller 34
Is the provisional target frame _FTT and the number of frames to jump K
Is set (step S37). The provisional frames F _1TT and F _2TT of the first and second players are designated as provisional target frames F _TT, and the provisional frame F _3TT of the third player is designated as the current frame F _C.
(Step S38). Next, the first and second players are set to squelch (step S39).

First and second player waits whether reaching F _TT in step S40. When it is determined to have reached the F _TT adds the next number of frames to jump K to F _TT temporary target frame set before setting the new temporary target frame F _TT (step S41). Then issuing the temporary frame F _3TT third player to the new temporary target frame F _TT (step S42), and squelch the third player releases the squelch of the first and second player (step S43).
Then, the third player waits whether reaches the temporary target frame F _TT (step S44). If the _FTT has been reached, a new provisional target frame is set again (step S45), and the third
The squelch of the player is released (step S46). Next, it is determined whether or not a scan end command has been received by operating a command button (not shown) (step S47). If it is determined that the command has not been received, the process proceeds to step S38 to repeat the scan operation again. When it is determined that it has received the scan end command, the process proceeds to step S48, the issuing the same F _TT against three players (step S48), whether or not the three player reaches all F _TT Wait (Step S4
9). When all three _FTTs are reached, the routine shifts to the main routine. At this time, of course, all squelches have been released. The above description assumes forward scanning, but in the case of backward scanning, the value of K is made negative. In FIG. 18B, the movement of the reading point of the third player is represented by A → B ₁ → B ₂ → B _3.
And the movement of the reading point of the first and second players is A → C ₁
→ C ₂ → C ₃ ...

It should be noted that reproduction may be commanded without instructing the player to output a still image. In this case, a step of instructing the third player to reproduce after step S38 and step S44 in FIG. 18 (a) is executed, and after step S40, instructing the first and third players to reproduce. Perform the following steps:

In the above embodiment, the TBC circuits 29, 30, and 31 perform the squelch operation when the SEL signal is [11] _B. However, the levels of these output signals are set to the highest level [FF] _H. The circuit may be changed.

In this way, in the case of special reproduction such as search or scan, the dropout compensation circuit is used to replace the squelch and replace the output signal of the player being reproduced with the reproduction signal of the jumping player to compensate. You do it.

In FIG. 8, a sync / clock separation circuit 38 is for displaying a reproduced signal in synchronization with an external video.

The audio selection circuit 39 selects two audio channel signals from the convenient six-channel audio signals output from the three players and supplied to the selection circuit 39 in accordance with a command (AUDIO SEL) of the main controller 34. And output.

If the selected audio signal is lost for some reason, it is possible to automatically switch to an audio signal of another channel.

In the case of scanning or searching, if an audio signal of a player performing normal reproduction is selected, the audio signal does not stop during scanning or searching, thereby preventing silence.

In the search operation, if audio is designated by operating a command button (not shown), the audio-designated disc may be preferentially jumped. In this case, in FIG. 16 (a), the step of setting the audio-designated disk number to M is executed after step S18.
Step S19 is set to F _MTT = F _TT and F _LT = F _C (L ≠ M).

As described above, in the multiple disc player parallel operation image reproducing apparatus according to the present invention, the first provisional designation signal is issued to at least one of the plurality of disc players to search for the designated frame, and other An image reproducing operation is instructed to the disc player. The at least one
At the end of the frame search operation of the disc player
An image reproduction operation is instructed to the at least one disk player, and a second provisional designation signal is issued to the other disk player to instruct a search operation for a frame to be designated.

As described above, when one of the plurality of disc players is searching for a frame, the other disc player performs image reproduction, so that even during special reconstruction, a large-capacity memory is not required and an image without disturbance is obtained. The display can be performed.

[Brief description of the drawings]

FIG. 1 is a block diagram of a recording system as an embodiment according to the present invention, FIG. 2 is a waveform diagram of a bivision signal, FIG. 3 is a block diagram of a part of the recording system of FIG. 1, and FIG. ) Is an array diagram of the HDTV signals, FIG. 4B is a time chart of control signals generated in the system of FIG. 1,
FIGS. 5 (a), (b), (c) and 6 (a) are arrangement diagrams of signals in the system of FIG. 1, FIG. 6 (b) is a waveform diagram of the signals in FIG. 7 (a), (b) and (c) are arrangement diagrams of recording signals of three disks recorded by the recording system of FIG. 1, and FIG. 8 is a reproduction system as an embodiment according to the present invention. Block diagram, FIG. 9, FIG. 10, FIG.
8 is a block diagram of a part of the circuit shown in FIG. 8, FIG. 12 is an arrangement diagram of disk codes in the recording signals shown in FIGS. 7 (a), (b) and (c), and FIG. The arrangement diagram of the lead-in TOC data of the disc code shown in FIG. 12, FIG. 14, FIG. 15 (c), FIG. 16 (a), FIG. 17 (a), and FIG. 15 is a flowchart of a subroutine executed by the main controller in the reproduction system shown in FIG.
FIG. 16B is a table showing transmission / reception data of communication between the main controller and the player in the reproduction system of FIG.
FIGS. 17 (b), 17 (b) and 18 (b) are graphs showing the movement of the reading point of the player in the reproducing system of FIG. Description of the sign of the main parts 1 ...... HDTV signal source 2 ...... encoder 5 ...... timing pulse generating circuit 6Y ...... Y process circuit 6R ...... P _R process circuit 6B ...... P _B processing circuit 9 ...... selection circuit 12 ... … PCM audio source 13… EFM encoder 21,22,23… Player 24… Decoder 29,30,31… A circuit that performs time axis compression and time axis correction 34… Main controller 39… Audio selection circuit 48 …… Dropout compensation circuit 73 …… FF detection circuit 76 …… Line memory

Continued on the front page (72) Inventor Takeo Tobe 4-2610 Hanazono, Tokorozawa-shi, Saitama Prefecture Pioneer Corporation Tokorozawa Plant (72) Inventor Jun Kawano 4-2610 Hanazono Tokorozawa City, Saitama Prefecture Pioneer Corporation Tokorozawa Plant (72) Inventor Takuo Fujimura 4-2610 Hanazono, Tokorozawa-shi, Saitama Prefecture, Pioneer Corporation Tokorozawa Plant (72) Inventor Isao Kikuchi 4-2610 Hanazono, Tokorozawa-shi, Saitama Prefecture Pioneer Corporation Tokorozawa Plant (72) Inventor Atsushi Takada 4-2610 Hanazono, Tokorozawa, Saitama Prefecture Pioneer Corporation Tokorozawa Plant (56) References JP-A-2-123882 (JP, A) JP-A-3-296380 (JP, A) JP-A Heisei 3-296381 (JP, A)

Claims (7)

(57) [Claims] 1. A frame designation means for issuing a frame designation signal indicating a frame to be reproduced, and a plurality of disc players each of which searches for a frame designated by the frame designation signal, reads and outputs a signal of the designated frame. A synthesizing circuit for synthesizing a video format signal comprising a supplied horizontal and vertical synchronizing signal portion and an information signal portion, and a disable signal is not given while adjusting at least a time axis for each output signal of the disc player. A disc player parallel operation image reproducing device including a relay circuit for relaying the signal to the synthesizing circuit, and an image reproduction processing circuit for displaying an image based on a synthesized signal generated from the synthesizing circuit. Each outputs the number of the frame currently being read as the current frame number The frame designating means determines a provisional target frame corresponding to an externally designated frame designated from the outside and supplies a first provisional designation signal using the designated provisional frame to at least one of the plurality of disc players. A means for issuing the disable signal as long as the current frame number of the at least one disc player does not match the designated frame, while instructing another disc player of the at least one disc player to perform an image reproducing operation. A second means for supplying a second provisional designation signal to the other disk player at the end of the frame search operation of the at least one disk player, while providing at least one of the at least one disk player until the end of the frame search operation of the other disk player; Third means for instructing a reproduction operation to one disc player An image reproducing apparatus comprising: 2. The image reproducing apparatus according to claim 1, wherein designated frames by said first and second provisional designated signals are equal to each other. 3. The image reproducing apparatus according to claim 1, wherein said first means sets the provisional target frame equal to the externally specified frame. 4. The apparatus according to claim 1, wherein the number of the disc players is three, and the first means is an intermediate position frame located at an intermediate position between the externally designated frame and the current frame as a first provisional target frame for the first of the disc player; 2. A frame according to claim 1, wherein a second provisional target frame for the second of the disc player is the externally designated frame.
The image reproducing apparatus according to any one of the preceding claims. 5. The image reproducing apparatus according to claim 1, wherein a frame designated by the second provisional designation signal is farther than a frame designated by the second provisional designation signal. 6. The first means supplies a first re-temporary designation signal to the at least one disc player upon termination of the another disc player by the third means, and designates the first re-temporary designation signal. The image reproducing apparatus according to claim 1, wherein the re-temporary target frame to be executed is a frame farther from the current frame than the temporary target frame. 7. An audio signal deriving means for deriving an audio signal from each of the video format signals, wherein the audio signal deriving means inhibits the derivation of an audio signal from an output signal of a video disc player during a frame search operation. The image reproducing apparatus according to claim 1, wherein: