JP2743814B2 - Semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a protection element for preventing electrostatic breakdown (hereinafter referred to as a protection element).

[0002]

2. Description of the Related Art When a high voltage due to static electricity or the like is applied to an input / output terminal of a semiconductor integrated circuit, the protection circuit built in the semiconductor integrated circuit alone cannot prevent electrostatic breakdown. Sometimes. To prevent this, externally connect a semiconductor device with a constant voltage diode as a protection element between the input / output terminal and the ground terminal of the semiconductor integrated circuit,
A method of strengthening the protection function has been adopted.

A first example of this conventional semiconductor device is shown in FIG.
As shown in the sectional view of FIG. 1, a P-type guard ring 22 formed on the upper surface of an N-type silicon substrate 21 and a guard ring 22 are formed.
The silicon oxide film 24 provided on the surface of the N-type silicon substrate 21 including the silicon oxide film is selectively etched to expose an area surrounded by the guard ring 22.
Connected to the P ⁺ -type diffusion layer 23 formed by introducing a high concentration P-type impurities to achieve a desired breakdown voltage is 1, and is formed on the P ⁺ -type diffusion layer 23 of the opening P ⁺ -type diffusion layer 23 And a cathode electrode 26 formed on the lower surface of the N-type silicon substrate 21.

A second example of a conventional semiconductor device, as shown in a sectional view of FIG. 6, is a P ⁺ type diffusion layer 23 of the first example.
Instead of having a P ⁺ -type polycrystalline silicon film 27 containing a high-concentration P-type impurity for obtaining a desired breakdown voltage on the surface of the N-type silicon substrate 1 in the opening, the structure is the same as that of the first example. doing.

The breakdown voltage of the semiconductor device (constant voltage diode) thus configured is lower than the withstand voltage of the semiconductor integrated circuit so that a surge current does not flow into the connected semiconductor integrated circuit, and the breakdown voltage of the semiconductor integrated circuit. The voltage must be set higher than the input / output signal voltage so as not to disturb the input / output signal waveform.

[0006]

With the recent trend toward higher integration (miniaturization of patterns) and lower power consumption of semiconductor integrated circuits, the breakdown voltage and operating voltage of the semiconductor integrated circuits tend to decrease.

This conventional semiconductor device has a breakdown voltage of about 5
When the voltage is lower than V, the Zener breakdown becomes dominant, and the leakage current and the operating resistance become extremely large. Therefore, a product in which the operating voltage (input / output signal voltage) of the semiconductor integrated circuit is smaller than 5 V (for example, a semiconductor integrated circuit operating at 3 V) ) And used as a protection element, the leakage current increases,
There is a problem that the input / output signal waveform is disturbed and the semiconductor integrated circuit does not operate normally.

An object of the present invention is to provide a semiconductor device having an electrostatic protection function suitable for a semiconductor integrated circuit having a low withstand voltage and low operating voltage.

[0009]

According to the present invention, there is provided a semiconductor device comprising:
A first P-type region provided on the lower surface of the N-type semiconductor substrate as an anode, a second P-type region formed on the upper surface of the N-type semiconductor substrate facing the first P-type region as a gate, A thyristor portion having a first N-type region formed in a second P-type region as a cathode, and a second P-type region serving as a gate of the thyristor portion serving as a drain; A third P-type region formed on the upper surface of the adjacent N-type semiconductor substrate and electrically connected to the anode of the thyristor portion is used as a source, and the N-type region between the second and third P-type regions is provided. A MOS transistor portion formed on a semiconductor substrate via a gate insulating film and having an electrode electrically connected to a cathode of the thyristor portion as a gate electrode;

[0010]

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a sectional view of a semiconductor chip showing a first embodiment of the present invention.

As shown in FIG. 1, an N ^- type silicon substrate 1
An oxide film formed by thermally oxidizing an upper surface and a lower surface of the substrate is selectively etched to form a first opening, and the oxide film is used as a mask to form boron on the surface of the N ⁻ -type silicon substrate 1 in the first opening. Ions are implanted at an acceleration energy of 100 keV and at a dose of 1 × 10 ¹⁴ to 1 × 10 ¹⁵ cm ⁻² and are pressed in by a heat treatment at a temperature of 1140 ° C. for 3 hours, and a P-type region 4 on the lower surface of the N ⁻ -type silicon substrate 1; The P-type region 2 on the upper surface facing the P-type region 4 and the P-type region 3 near the outer periphery of the P-type region 2 are formed. Next, after the first opening is coated with a thermal oxide film, the oxide film is selectively etched to form a second opening, and the second opening is formed on the surface of the N ⁻ type silicon substrate 1. Phosphorus is introduced by thermal diffusion using POCl ₃ gas, and is pushed in by a heat treatment at 1000 ° C. for 2 hours to form an ohmic contact in contact with the N ⁺ type region 5 on the inner surface of the P type region 2 on the upper surface and the outer periphery of the P type region 3. Of the N ⁺ -type region 6 and the N ⁺ -type region 7 for the ohmic contact in contact with the outer periphery of the P-type region 4 on the lower surface.

[0013] Next, N between the P-type region 2 and the P-type region 3 by selectively etching the oxide film on the upper surface ^- thermal oxidation a gate oxide film after exposing the surface of the type silicon substrate 1 8 is formed, an impurity for adjusting the threshold voltage V _T to the channel region is ion-implanted through the gate oxide film 8. next,
The upper surface of the N ⁺ -type region 5 an oxide film on the upper surface is selectively etched, and a contact hole is formed on each of the upper surfaces including the portion and the N ⁺ -type region 6 of a P-type region 3, the contact holes An electrode 9 connected to the N ⁺ type region 5 and extending on the gate oxide film 8 and also serving as a gate electrode, and an electrode 10 commonly connected to the P type region 3 and the N ⁺ type region 6 are formed. Next, the oxide film on the lower surface is removed, and an electrode 11 commonly connected to the P-type region 4 and the N ⁺ -type region 7 is formed.

Here, a P-type region 4 (anode), an N ^- type silicon substrate 1, a P-type region 2 (gate), and an N ⁺ -type region 5
A thyristor portion composed of (cathode), an electrode 9 on a gate oxide film 8 connected to the cathode of the thyristor portion as a gate electrode, a P-type region 2 also serving as a gate of the thyristor portion as a drain, and an electrode 10, an N ⁺ type A MOS transistor portion having a source as a P-type region 3 connected to an anode of a thyristor portion via a region 6, an N ⁻ type silicon substrate 1, an N ⁺ type region 7, and an electrode 11 in order, A protection element having an equivalent circuit as shown in FIG. In this protection element, as shown in the voltage-current characteristic shown in FIG. 2B, a positive potential is applied to the electrode 11 with respect to the electrode 9, and a voltage exceeding the threshold voltage is applied between the gate and the source of the MOS transistor. When the voltage is applied, a drain current flows and is injected into the gate of the thyristor portion, thereby conducting the thyristor portion. On the other hand, when a negative potential is applied to the electrode 11 with respect to the electrode 9, the reverse direction of the thyristor portion is applied. No current flows until a voltage exceeding the withstand voltage is applied.

[0015] The semiconductor device having the above-described structure is an MO.
Since the turn-on voltage is determined by the threshold voltage of the S-transistor section, the leakage current is very small. For example, when forming a protection element of a 3 V signal system semiconductor integrated circuit, the field-effect transistor section May be controlled to about 4V. As an example,
When the resistivity of the N ⁻ type silicon substrate 1 is 0.4 Ωcm, the thickness of the gate oxide film is 120 nm, and boron ions are implanted into the channel region at a dose of 1 × 10 ¹¹ cm ⁻² , the turn-on voltage is about 4V. In this case, the leakage current of the semiconductor element is about several tens nA or less, which can be greatly reduced compared to the leakage current of the conventional protection element of about several mA.

Since the protection element of the present invention has a negative resistance characteristic, the voltage between terminals when a large current flows due to static electricity can be reduced as compared with the conventional example. Therefore, the resistance to static electricity is larger than that of the conventional example. Further, the difference between the voltage between the terminals of the protection element and the breakdown voltage of the semiconductor integrated circuit is larger than in the conventional example, so that the protection element can reliably absorb static electricity.

When the inner diameter of the P-type region 3 is set to about 80 μm or less, the inter-terminal capacitance becomes about 10 pF or less, and it can be used for protecting a semiconductor integrated circuit having a high operating frequency as well.

At this time, the withstand static electricity has a capacity of 200 pF,
Electrostatic breakdown test of resistance 0 Ω (Electronic Machinery Manufacturers Association Standard (E
IAJ), a method of testing the environment and durability of individual SD-21 individual semiconductor devices) can withstand about 2 KV.

FIG. 3 is a sectional view of a semiconductor chip showing a second embodiment of the present invention.

As shown in FIG. 3, an N ^- type silicon substrate 1
A P-type region 12 that is laid out by interrupting a part of a P-type region 2 formed on the upper surface of
The N-type semiconductor device is laid out by cutting into a part of the P-type region 4 on the lower surface opposed to the P-type region 12 and connected to the electrode 11.
^It has the same configuration as that of the first embodiment except that the ⁺ -type region 13 is provided. As shown in the equivalent circuit diagram of FIG. By providing the connected diode portion, as shown in the voltage-current characteristic diagram of FIG.
When a negative potential is applied to the diode, a forward current flows through the diode portion, and the integrated circuit to which the protection element is connected can be prevented from being destroyed by the surge current of the positive potential and the negative potential.

[0021]

As described above, the present invention provides a semiconductor device for static electricity protection having a small leakage current and a low turn-on voltage by synthesizing a MOS transistor portion and a thyristor portion on the same semiconductor substrate. This configuration has the effect of improving the static electricity resistance without disturbing the input / output signal waveform of a semiconductor integrated circuit having a low operating voltage.

[Brief description of the drawings]

FIG. 1 is a sectional view of a semiconductor chip showing a first embodiment of the present invention.

FIG. 2 is a diagram showing an equivalent circuit diagram and a voltage-current characteristic of the first embodiment of the present invention.

FIG. 3 is a sectional view of a semiconductor chip showing a second embodiment of the present invention.

FIG. 4 shows an equivalent circuit diagram and a voltage-current characteristic of a second embodiment of the present invention.

FIG. 5 is a sectional view of a semiconductor chip showing a first example of a conventional semiconductor device.

FIG. 6 is a sectional view of a semiconductor chip showing a second example of a conventional semiconductor device.

[Explanation of symbols]

Reference Signs List 1 N ^- type silicon substrate 2, 3, 4, 12 P-type region 5, 6, 7, 13 N ⁺ -type region 8 Gate oxide film 9, 10, 11 Electrode 21 N-type silicon substrate 22 Guard ring 23 P ⁺ -type diffusion Layer 24 Silicon oxide film 25 Anode electrode 26 Cathode electrode 27 P ⁺ type polycrystalline silicon film

Claims (2)

(57) [Claims] A first P provided on a lower surface of an N-type semiconductor substrate.
A second P-type region formed on the upper surface of the N-type semiconductor substrate facing the first P-type region as a gate, and a first P-type region formed in the second P-type region as a gate. N
A thyristor portion having a type region as a cathode, and the second P-type region also serving as a gate of the thyristor portion serving as a drain. A third P-type region electrically connected to the anode of the thyristor portion as a source, formed on the N-type semiconductor substrate between the second and third P-type regions via a gate insulating film; A MOS transistor portion having an electrode electrically connected to the cathode of the thyristor portion as a gate electrode. 2. A fourth P-type region formed on an upper surface of an N-type semiconductor substrate and electrically connected to a cathode of the thyristor portion is connected between a cathode of the thyristor portion and an anode of the thyristor portion as an anode of a diode. 2. The semiconductor device according to claim 1, further comprising a diode.