JP2725170B2 - De-charging electrode - Google Patents

De-charging electrode

Info

Publication number
JP2725170B2
JP2725170B2 JP7309696A JP30969695A JP2725170B2 JP 2725170 B2 JP2725170 B2 JP 2725170B2 JP 7309696 A JP7309696 A JP 7309696A JP 30969695 A JP30969695 A JP 30969695A JP 2725170 B2 JP2725170 B2 JP 2725170B2
Authority
JP
Japan
Prior art keywords
electrode
circuit board
printed circuit
pattern
electrode needle
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP7309696A
Other languages
Japanese (ja)
Other versions
JPH09129391A (en
Inventor
善次 岡村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kasuga Denki Inc
Original Assignee
Kasuga Denki Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kasuga Denki Inc filed Critical Kasuga Denki Inc
Priority to JP7309696A priority Critical patent/JP2725170B2/en
Publication of JPH09129391A publication Critical patent/JPH09129391A/en
Application granted granted Critical
Publication of JP2725170B2 publication Critical patent/JP2725170B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0254High voltage adaptations; Electrical insulation details; Overvoltage or electrostatic discharge protection ; Arrangements for regulating voltages or for using plural voltages

Landscapes

  • Elimination Of Static Electricity (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、直流又は交流の高
電圧を電極針に印加して物体(気体も含む)を除電又は
帯電するための除帯電電極に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a static elimination electrode for eliminating or charging an object (including a gas) by applying a high DC or AC voltage to an electrode needle.

【0002】[0002]

【従来の技術】本出願人は、特開平4−163898号
公報に記載されているように、電極針の支持台としてプ
リント基板を使用し、静電容量を確保する容量結合によ
って電極針に電圧を印加する除帯電電極を既に提供して
いる。この除帯電電極は、電極針を植設した複数の誘電
体コアを、プリント基板の互いにプリント配線接続され
た複数のスルホールにそれぞれ嵌着し、各電極針を誘電
体コアによって配線パターンに容量結合したものであ
る。
2. Description of the Related Art As described in Japanese Patent Application Laid-Open No. Hei 4-163898, the present applicant uses a printed circuit board as a support for electrode needles, and applies a voltage to the electrode needles by capacitive coupling to secure capacitance. Has already been provided. The charge-eliminating electrode has a plurality of dielectric cores on which electrode needles are implanted, fitted into a plurality of through holes connected to each other on a printed circuit board, and each electrode needle is capacitively coupled to a wiring pattern by the dielectric core. It was done.

【0003】[0003]

【発明が解決しようとする課題】しかし、これによる
と、各電極針ごとにセラミックの誘電体コアを用意し、
電極針を誘電体コアに1本ごとに植設した上、誘電体コ
アをスルホールに嵌着するため、電極針と同数の誘電体
コアが必要で、部品点数が多く、組み立ても面倒で、か
つ誘電体コアの分だけ厚さが厚くなるとともに、電極針
の間隔を密にすることができなく、またスルホールの大
きさも大きくなってプリント基板の強度が弱くなるた
め、プリント基板の厚さを厚くする必要があった。
However, according to this, a ceramic dielectric core is prepared for each electrode needle,
Since the electrode needles are implanted one by one in the dielectric core and the dielectric cores are fitted in the through holes, the same number of dielectric cores as the electrode needles is required, the number of parts is large, assembly is troublesome, and The thickness of the printed circuit board is increased because the thickness of the printed circuit board is reduced because the thickness of the dielectric core increases and the distance between the electrode needles cannot be reduced, and the size of the through hole also increases and the strength of the printed circuit board decreases. I needed to.

【0004】本発明の課題は、誘導体コアのような容量
結合するための別部品を使用とせずに、電極針をプリン
ト基板上で配線パターンと容量結合できるとともに、ス
ルホールを小さくできることにより、従来に比べて部品
点数の削減、組み立て作業性の向上、小型化、低価格
化、電極針間隔の縮小、プリント基板の強度確保及び薄
型化が図れる除帯電電極を提供することにある。
[0004] An object of the present invention is to provide an electrode needle that can be capacitively coupled with a wiring pattern on a printed circuit board without using a separate component for capacitive coupling such as a derivative core, and that a through hole can be reduced. An object of the present invention is to provide a charge-eliminating electrode capable of reducing the number of parts, improving the assembling workability, reducing the size and cost, reducing the distance between electrode needles, securing the strength of a printed circuit board, and reducing the thickness.

【0005】[0005]

【課題を解決するための手段】本発明による除帯電電極
は、複数の電極針をプリント基板に間隔をおいて配設し
た除帯電電極において、複数の電極針の全てに電圧を印
加するための配線パターンを、一連に連続するようにか
つ各電極針と接触しないようにしてプリント基板の片面
に形成し、また各電極針と接触させた各電極針毎のチッ
プパターンを、互いに分離させてプリント基板の反対側
の面に間隔をおいて形成することにより、各電極針を、
各チップパターンによりプリント基板を介して配線パタ
ーンと電気的に容量結合したものである。
According to the present invention, there is provided a charge removing electrode in which a plurality of electrode needles are arranged at intervals on a printed circuit board, and a voltage is applied to all of the plurality of electrode needles.
Make sure that the wiring patterns to be added
One side of the printed circuit board so that it does not
The tip of each electrode needle formed in contact with each electrode needle
Separated from each other on the opposite side of the printed circuit board.
By forming at intervals on the surface of each electrode needle,
Wiring pattern via printed circuit board by each chip pattern
This is electrically capacitively coupled to the ground.

【0006】各電極針の基端部を、プリント基板に設け
られたスルホールに圧入するだけで配線パターンと容量
結合できる。配線パターンを各スルホールの周囲におい
て欠如し、その欠如されていない部分に対向して各チッ
プパターンを形成すると、電極針同士の干渉を避けなが
ら必要な静電容量を充分に確保できる。電極針の基端部
と、プリント基板と、その両面の配線パターン及びチッ
プパターンとを樹脂中に埋設することにより、プリント
基板の両面の絶縁性を確保できる。
[0006] Capacitive coupling with a wiring pattern can be achieved only by press-fitting the base end of each electrode needle into a through hole provided on a printed circuit board. If a wiring pattern is missing around each through hole and each chip pattern is formed facing a portion that is not missing, a necessary capacitance can be sufficiently secured while avoiding interference between electrode needles. Proximal end of electrode needle
And the printed circuit board and the wiring patterns and chips on both sides.
By embedding the backup pattern in the resin, the insulation of both sides of the printed circuit board can be ensured.

【0007】[0007]

【発明の実施の形態】次に、本発明の実施の形態を図面
に基づいて詳述する。図2はプリント基板の表側、図3
はその裏側、図4はその断面構造を示す。これらの図に
示すように、硬質樹脂による帯状のプリント基板1に
は、多数の小さいスルホール2が等間隔で一列に設けら
れている。プリント基板1の裏面には、その幅員よりも
若干細い配線パターン3が、一枚の連続した金属箔によ
って形成されている。この配線パターン3は、各スルホ
ール2の周囲で円形に欠如することにより、各スルホー
ル2の周りを円形に囲む多数の切欠部4を形成してい
る。
Next, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 2 shows the front side of the printed circuit board, and FIG.
4 shows the back side, and FIG. 4 shows the cross-sectional structure. As shown in these figures, a large number of small through holes 2 are provided in a line at equal intervals on a belt-shaped printed board 1 made of a hard resin. On the back surface of the printed board 1, a wiring pattern 3 slightly thinner than the width thereof is formed by one continuous metal foil. The wiring pattern 3 lacks a circular shape around each through hole 2, thereby forming a large number of cutouts 4 surrounding each through hole 2 in a circular shape.

【0008】一方、プリント基板1の表面には、金属箔
チップによる多数のチップパターン5が各スルホール2
ごとに形成されている。これらチップパターン5は、図
5に示すように配線パターン3の各切欠部4と対向する
部分を除くように、しかも互いに分離して等間隔に形成
されており、鼓形の平面形状となっている。各チップパ
ターン5には細い延長部6があり、この延長部6の先端
部分7は、各スルホール2の内周からプリント基板1の
裏面まで延びて各スルホール2の小さな口縁を縁取る形
態となっている。
On the other hand, a large number of chip patterns 5 made of metal foil chips
Each is formed. As shown in FIG. 5, these chip patterns 5 are formed at equal intervals so as to exclude portions facing the respective notches 4 of the wiring pattern 3 and are separated from each other, and have a drum-shaped planar shape. I have. Each chip pattern 5 has a thin extension 6, and the tip 7 of the extension 6 extends from the inner periphery of each through hole 2 to the back surface of the printed circuit board 1 to border a small edge of each through hole 2. Has become.

【0009】各スルホール2には、電極針8の基端部が
圧入植設されている。この場合、例えばスルホール2の
内径を0.8mmとすると、電極針8の外径をそれより
少し大きい0.9mmとして、電極針8の基端部をスル
ホール2に単に強制的に圧入してある。このことにより
各電極針8は、スルホール2内で各チップパターン5と
電気的に接続され、また全電極針8は、プリント基板1
の表面から直角に突出して等間隔で一列に配列してい
る。
The base end of the electrode needle 8 is press-fitted into each through hole 2. In this case, for example, assuming that the inner diameter of the through hole 2 is 0.8 mm, the outer diameter of the electrode needle 8 is slightly larger than 0.9 mm, and the base end of the electrode needle 8 is simply forcibly pressed into the through hole 2. . As a result, each electrode needle 8 is electrically connected to each chip pattern 5 in the through hole 2, and all the electrode needles 8 are connected to the printed circuit board 1.
Protruding at right angles from the surface, and are arranged in a line at equal intervals.

【0010】配線パターン3は、チップパターン5の全
てに共通であるため、この配線パターン3を電源に接続
して高電圧を印加すると、配線パターン3と各チップパ
ターン5との間で、プリント基板1の比誘電率を利用し
た電極針8ごとの静電容量が生じ、全電極針8は、配線
パターン3との容量結合によって一斉に高電圧を印加さ
れる。
Since the wiring pattern 3 is common to all of the chip patterns 5, when the wiring pattern 3 is connected to a power source and a high voltage is applied, the printed pattern between the wiring pattern 3 and each chip pattern 5 is printed. A capacitance is generated for each of the electrode needles 8 using the relative dielectric constant of 1, and all the electrode needles 8 are simultaneously applied with a high voltage by capacitive coupling with the wiring pattern 3.

【0011】一般に、平板状コンデンサの基本式は、C
=0.088・ε・E/t・10(pF)で与えられ
る。但し、0.088は真空中の誘電率、εは誘電体の
比誘電率、tは誘電体の厚さである。従って、プリント
基板1の両面に設けた配線パターン3と各チップパター
ン5との対向面積Eを確保することにより、その面積に
応じた静電容量を各電極針8ごとに得ることができる。
In general, the basic formula of a flat capacitor is C
= 0.088 · ε · E / t · 10 (pF). Here, 0.088 is the dielectric constant in a vacuum, ε is the relative dielectric constant of the dielectric, and t is the thickness of the dielectric. Therefore, by securing the opposing area E between the wiring patterns 3 provided on both sides of the printed board 1 and the chip patterns 5, it is possible to obtain a capacitance corresponding to the area for each electrode needle 8.

【0012】本例の除帯電電極は、電極針8をスルホー
ル2に植設した上記のようなプリント基板1を、図1に
示すように断面U形のアースボデー9内において樹脂1
0中に埋設して作られている。全電極針8の一部は、樹
脂10の表面から突出し、アースボデー9の両側縁部を
折曲したアース電極部11と所定の間隔を保持して一列
に並んでおり、このアース電極部11との間で放電す
る。
In the present example, the above-described printed circuit board 1 having an electrode needle 8 implanted in the through hole 2 is provided on the grounding body 9 having a U-shaped cross section as shown in FIG.
It is made by burying it inside. A part of all the electrode needles 8 protrudes from the surface of the resin 10 and is arranged in a line with a predetermined interval from an earth electrode portion 11 having both side edges of the earth body 9 bent. Discharge between and.

【0013】なお、上記の例では、プリント基板1を帯
状として電極針8を一列だけ植設したが、プリント基板
1の形状は方形や円形など任意にでき、また電極針8を
複数列とすることもできる。
In the above example, the printed circuit board 1 is band-shaped and the electrode needles 8 are implanted in a single line. However, the printed circuit board 1 can have any shape such as a square or a circle, and the electrode needles 8 are arranged in a plurality of rows. You can also.

【0014】[0014]

【発明の効果】以上説明したように本発明によれば、プ
リント基板上に電極針ごとのチップパターンを形成し、
反対側の共通の配線パターンとの間で各チップパターン
の面積に応じた静電容量を確保して各電極針を配線パタ
ーンと容量結合したので、各電極針ごとに誘電体コアを
用いた従来の除帯電電極に比べ、部品点数の削減、組み
立て作業性の向上、小型化、低価格化、電極針間隔の縮
小が図れる。
As described above, according to the present invention, a chip pattern for each electrode needle is formed on a printed circuit board,
Conventionally, each electrode needle was capacitively coupled to the wiring pattern by securing the capacitance corresponding to the area of each chip pattern with the common wiring pattern on the opposite side. As compared with the non-electrostatic electrode, the number of parts can be reduced, the workability of assembling can be improved, the size and the price can be reduced, and the distance between electrode needles can be reduced.

【0015】請求項2によれば、電極針をスルホールに
直接植設したので、スルホールを小さくでき、プリント
基板の強度確保及び薄型化が図れる。
According to the second aspect, since the electrode needle is directly implanted in the through hole, the through hole can be reduced, and the strength and the thickness of the printed circuit board can be secured.

【0016】請求項3によれば、配線パターンを各スル
ホールの周囲において欠如し、その欠如されていない部
分に対向して各チップパターンを形成したので、電極針
同士の干渉を避けながら必要な静電容量を充分に確保で
きる。また、配線パターン及びチップパターンを有効な
ところだけ形成してその材料を節約できる。
According to the third aspect of the present invention, the wiring pattern is absent around each through hole, and each chip pattern is formed so as to oppose a portion which is not absent. A sufficient electric capacity can be secured. Further, the wiring pattern and the chip pattern can be formed only where they are effective to save the material.

【0017】請求項4によれば、電極針の一部分を残し
てプリント基板を樹脂中に埋設したので、プリント基板
の周囲の絶縁性を確保できる。
According to the fourth aspect, the printed board is buried in the resin while leaving a part of the electrode needles, so that the insulation around the printed board can be ensured.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明による除帯電電極の一例の断面図であ
る。
FIG. 1 is a cross-sectional view of an example of a charge removing electrode according to the present invention.

【図2】この除帯電電極におけるプリント基板の表側を
示す平面図である。
FIG. 2 is a plan view showing a front side of a printed circuit board in the charge removing electrode.

【図3】プリント基板の裏側を示す平面図である。FIG. 3 is a plan view showing the back side of the printed circuit board.

【図4】プリント基板を主体とした断面図である。FIG. 4 is a sectional view mainly showing a printed circuit board;

【図5】プリント基板の裏面と表面にそれぞれに付設さ
れた配線パターンとチップパターンの関係を示す斜視図
である。
FIG. 5 is a perspective view showing a relationship between a wiring pattern and a chip pattern provided on a back surface and a front surface of a printed circuit board, respectively.

【符号の説明】[Explanation of symbols]

1 プリント基板 2 スルホール 3 配線パターン 4 切欠部 5 チップパターン 8 電極針 10 樹脂 DESCRIPTION OF SYMBOLS 1 Printed circuit board 2 Through hole 3 Wiring pattern 4 Notch 5 Chip pattern 8 Electrode needle 10 Resin

Claims (4)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】複数の電極針をプリント基板に間隔をおい
て配設した除帯電電極において、前記複数の電極針の全
てに電圧を印加するための配線パターンを、一連に連続
するようにかつ各電極針と接触しないようにして前記プ
リント基板の片面に形成し、また各電極針と接触させた
各電極針毎のチップパターンを、互いに分離させて前記
プリント基板の反対側の面に間隔をおいて形成すること
により、各電極針を、各チップパターンにより前記プリ
ント基板を介して前記配線パターンと電気的に容量結合
したことを特徴とする除帯電電極。
1. A dividing charging electrode at a distance a plurality of electrode needles on a printed circuit board arranged, all of the plurality of electrode needle
Wiring patterns for applying voltage to
To prevent contact with each electrode needle
Formed on one side of the lint substrate and contacted with each electrode needle
The tip pattern for each electrode needle is separated from each other
Form at intervals on the opposite side of the printed circuit board
The electrode needles with each tip pattern.
A decharging electrode electrically coupled to the wiring pattern via a printed circuit board .
【請求項2】各電極針の基端部を、プリント基板に設け
られたスルホールに圧入したことを特徴とする請求項1
に記載の除帯電電極。
2. The method according to claim 1, wherein a base end of each electrode needle is press-fitted into a through hole provided on a printed circuit board.
3. The electrode according to 1.
【請求項3】配線パターンを各スルホールの周囲におい
て欠如し、その欠如されていない部分に対向して各チッ
プパターンを形成したことを特徴とする請求項2に記載
の除帯電電極。
3. The charge removing electrode according to claim 2, wherein a wiring pattern is absent around each through hole, and each chip pattern is formed so as to face a portion which is not absent.
【請求項4】電極針の基端部と、プリント基板と、その
両面の配線パターン及びチップパターンとを樹脂中に埋
設したことを特徴とする請求項1、2又は3に記載の除
帯電電極。
4. A base portion of an electrode needle, a printed circuit board,
4. The charge removing electrode according to claim 1 , wherein the wiring pattern and the chip pattern on both surfaces are embedded in the resin.
JP7309696A 1995-11-06 1995-11-06 De-charging electrode Expired - Fee Related JP2725170B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7309696A JP2725170B2 (en) 1995-11-06 1995-11-06 De-charging electrode

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7309696A JP2725170B2 (en) 1995-11-06 1995-11-06 De-charging electrode

Publications (2)

Publication Number Publication Date
JPH09129391A JPH09129391A (en) 1997-05-16
JP2725170B2 true JP2725170B2 (en) 1998-03-09

Family

ID=17996189

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7309696A Expired - Fee Related JP2725170B2 (en) 1995-11-06 1995-11-06 De-charging electrode

Country Status (1)

Country Link
JP (1) JP2725170B2 (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1298201C (en) * 2003-02-14 2007-01-31 盛群半导体股份有限公司 Electrostatic protection structure on circuit board and method thereof
JP4512037B2 (en) * 2003-06-05 2010-07-28 シシド静電気株式会社 Ion generator
KR101104101B1 (en) * 2005-06-20 2012-01-12 휴글엘렉트로닉스가부시키가이샤 Discharge unit for ac ionizer
KR100761861B1 (en) 2006-10-11 2007-09-28 삼성전자주식회사 Semiconductor package preventing the static electricity
JP5138024B2 (en) * 2010-12-22 2013-02-06 春日電機株式会社 Electrode substrate unit for charging device or static eliminator
JP6334152B2 (en) * 2013-12-11 2018-05-30 シャープ株式会社 Ion generator

Also Published As

Publication number Publication date
JPH09129391A (en) 1997-05-16

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