JP2721286B2 - Temperature compensation type reference voltage generation circuit for semiconductor device - Google Patents

Temperature compensation type reference voltage generation circuit for semiconductor device

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Publication number
JP2721286B2
JP2721286B2 JP2291392A JP2291392A JP2721286B2 JP 2721286 B2 JP2721286 B2 JP 2721286B2 JP 2291392 A JP2291392 A JP 2291392A JP 2291392 A JP2291392 A JP 2291392A JP 2721286 B2 JP2721286 B2 JP 2721286B2
Authority
JP
Japan
Prior art keywords
reference voltage
circuit
semiconductor device
resistor
temperature
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2291392A
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Japanese (ja)
Other versions
JPH05218290A (en
Inventor
徳夫 井上
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Consejo Superior de Investigaciones Cientificas CSIC
Original Assignee
Consejo Superior de Investigaciones Cientificas CSIC
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Priority to JP2291392A priority Critical patent/JP2721286B2/en
Publication of JPH05218290A publication Critical patent/JPH05218290A/en
Application granted granted Critical
Publication of JP2721286B2 publication Critical patent/JP2721286B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、半導体装置の温度補償
型基準電圧発生回路に関し、より詳しくは任意の出力電
圧で温度特性をキャンセルすることができる半導体装置
の温度補償型基準電圧発生回路に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a temperature-compensated reference voltage generating circuit for a semiconductor device, and more particularly to a temperature-compensated reference voltage generating circuit for a semiconductor device capable of canceling a temperature characteristic with an arbitrary output voltage. .

【0002】[0002]

【従来の技術】半導体能動素子であるトランジスタ等を
備えた半導体装置においては、温度ドリフトを補償する
ために温度補償型基準電圧発生回路を設ける必要があ
る。
2. Description of the Related Art In a semiconductor device having a transistor or the like which is a semiconductor active element, it is necessary to provide a temperature-compensated reference voltage generating circuit to compensate for a temperature drift.

【0003】図2はこの種の温度補償型基準電圧発生回
路の一従来例を示す。以下にその回路構成を動作と共に
説明する。電源VCCとGNDとの間には、以下に示す回
路要素をそれぞれ直列接続した線路L1、L2、L3が
並列接続されている。この内、線路L1にはMOSトラ
ンジスタM1、M4およびダイオードQ1′が直列接続
され、線路L2にはMOSトランジスタM2、M5、抵
抗R0およびダイオードQ2′が直列接続されている。
また、線路L3にはMOSトランジスタM3、抵抗R1
およびダイオードQ3′が接続されている。
FIG. 2 shows a conventional example of this type of temperature-compensated reference voltage generating circuit. Hereinafter, the circuit configuration and the operation will be described. Lines L1, L2, and L3 in which the following circuit elements are connected in series are connected in parallel between the power supply V CC and GND. Of these, the MOS transistors M1 and M4 and the diode Q1 'are connected in series to the line L1, and the MOS transistors M2 and M5, the resistor R0 and the diode Q2' are connected in series to the line L2.
Further, a MOS transistor M3 and a resistor R 1 are connected to the line L3.
And a diode Q3 '.

【0004】なお、MOSトランジスタの内、MOSト
ランジスタM1、M2、M3はPチャネルのMOSトラ
ンジスタであり、MOSトランジスタM4、M5はNチ
ャネルのMOSトランジスタである。
Among the MOS transistors, MOS transistors M1, M2 and M3 are P-channel MOS transistors, and MOS transistors M4 and M5 are N-channel MOS transistors.

【0005】このような回路構成において、ダイオード
Q1′、Q2′のエミッタ面積に比を持たせ、バンドギ
ャップ電圧ΔVBEを抵抗ROの両端に発生させて線路L
2に基準定電流IOを発生させる。そして、該基準定電
流IOをカレントミラー回路で抵抗R1とダイオードQ
3′とを直列に接続した線路L3に流し、該線路L3に
接続された出力端子を介して基準電圧VOUTを得てい
る。
[0005] In such a circuit configuration, the diode Q1 ', Q2' to have a ratio to the emitter area of, by generating a bandgap voltage [Delta] V BE across the resistor R O line L
2 generates a reference constant current IO . Then, the reference constant current I O is supplied to the resistor R 1 and the diode Q by a current mirror circuit.
3 'flows through a line L3 connected in series, and a reference voltage V OUT is obtained via an output terminal connected to the line L3.

【0006】今、ダイオードQ1′、Q2′のエミッタ
面積の比を1:nとすると、抵抗ROの両端に発生する
バンドギャップ電圧ΔVBEは下記(1)式で示される。
[0006] Now, the diode Q1 ', Q2' the ratio of the emitter area of 1: When n, bandgap voltage [Delta] V BE generated across the resistor R O is represented by the following formula (1).

【0007】ΔVBE=VTnn …(1) 但し、VT=kT/qであり、 k:ボルツマン定数、 T:絶対温度、 q:電子の電荷量 である。[0007] ΔV BE = V T l n n ... (1) where a V T = kT / q, k : Boltzmann constant, T: absolute temperature, q: an electric charge of an electron.

【0008】また、抵抗ROにより発生する基準定電流
Oは下記(2)式で示される。
[0008] The reference constant current I O which is generated by the resistance R O is represented by the following equation (2).

【0009】IO =(VT/RO)・lnn …(2) また、基準電圧VOUTは下記(3)式で示される。I O = (V T / R O ) · ln n (2) The reference voltage V OUT is represented by the following equation (3).

【0010】 VOUT BE (R/R) ・Vn・・・ (3) ここで、基準電圧発生VOUTの温度特性をとするた
めには、上記(3)式を絶対温度Tで偏微分して、
なる条件を(3)式に与える必要がある。すなわち、下
記(4)式を満足する条件を上記(3)式に与える必要
がある。
V OUT = V BE + (R 1 / R 0 ) · V T1 n n (3) Here, in order to set the temperature characteristic of the reference voltage generation V OUT to 0 , the above (3) ) Needs to be partially differentiated with respect to the absolute temperature T, and the condition that becomes 0 must be given to the equation (3). That is, it is necessary to provide a condition satisfying the following expression (4) to the above expression (3).

【0011】[0011]

【数1】 (Equation 1)

【0012】よって、下記(5)式を満たすR1、R0
nを選べば温度特性がφの基準電圧VOUTを得ることが
できる。
Accordingly, R 1 , R 0 ,
If n is selected, a reference voltage V OUT having a temperature characteristic of φ can be obtained.

【0013】 (R/R)1n=q/k×2〔mV/°C〕 ・・・ (5)[0013] (R 1 / R 0) 1 n n = q / k × 2 [mV / ° C] (5)

【0014】[0014]

【発明が解決しようとする課題】上記従来の基準電圧発
生回路において、温度特性がφの基準電圧VOUTを得よ
うとすると、(5)式を満たす必要があることは上述の
通りであるが、(5)式の右辺は定数(=const)
であるため、(R1/R0)lnn≒23で一定の値とな
る。
As described above, in the above-mentioned conventional reference voltage generating circuit, it is necessary to satisfy the expression (5) in order to obtain a reference voltage V OUT having a temperature characteristic of φ. , (5) is a constant (= const)
Therefore, a constant value is obtained when (R 1 / R 0 ) l n n ≒ 23.

【0015】そうすると、上記(3)式において、VT
≒26mV(T=300゜K)、VBE≒0.65(T=
300゜K)とすると、基準電圧VOUTはVOUT≒1.2
5〔V〕となる。
Then, in the above equation (3), V T
≒ 26mV (T = 300 ゜ K), V BE ≒ 0.65 (T =
300 K), the reference voltage V OUT is V OUT ≒ 1.2
5 [V].

【0016】以上のように、従来の基準電圧発生回路に
おいては、基準電圧VOUTと温度特性φとの関係が一義
的に定まるため、1.25V以外の基準電圧を得ようと
すると温度特性をφにすることができなくなる。このこ
とは、任意の出力電圧で温度特性をキャンセルできない
ことを意味し、基準電圧発生回路の汎用性の向上を図る
上で限界があった。
As described above, in the conventional reference voltage generating circuit, since the relationship between the reference voltage V OUT and the temperature characteristic φ is uniquely determined, if a reference voltage other than 1.25 V is to be obtained, the temperature characteristic will be reduced. φ cannot be set. This means that the temperature characteristics cannot be canceled with an arbitrary output voltage, and there is a limit in improving the versatility of the reference voltage generation circuit.

【0017】本発明はこのような従来技術の欠点を解決
するものであり、任意の出力電圧で温度特性をキャンセ
ルでき、汎用性の向上を図ることができる半導体装置の
温度補償型基準電圧発生回路を提供することを目的とす
る。
The present invention solves the above-mentioned drawbacks of the prior art, and a temperature-compensated reference voltage generating circuit for a semiconductor device capable of canceling temperature characteristics with an arbitrary output voltage and improving versatility. The purpose is to provide.

【0018】[0018]

【課題を解決するための手段】本発明の半導体装置の温
度補償型基準電圧発生回路は、PNPトランジスタと抵
抗を有するバンドギャップ電圧増倍回路と、該バンドギ
ャップ電圧増倍回路に直列接続された抵抗とを備え、該
バンドギャップ電圧増倍回路と該抵抗との接続回路に基
準電流を通電するようにしてなり、そのことにより上記
目的が達成される。
According to the present invention, there is provided a temperature compensated reference voltage generating circuit for a semiconductor device, comprising: a bandgap voltage multiplying circuit having a PNP transistor and a resistor; and a series connection to the bandgap voltage multiplying circuit. A resistor is provided, and a reference current is supplied to a connection circuit between the bandgap voltage multiplier and the resistor, thereby achieving the above object.

【0019】[0019]

【作用】上記のようにPNPトランジスタと抵抗とでバ
ンドギャップ電圧増倍回路を構成し、バンドギャップ電
圧増倍回路と該バンドギャップ電圧増倍回路に直列接続
された抵抗で構成される接続回路に基準電流を通電する
と、後述の(8)式で示されるように、種々の温度特性
をキャンセルできる任意の出力電圧VOUTを得ることが
できる。
As described above, a bandgap voltage multiplying circuit is constituted by the PNP transistor and the resistor, and the bandgap voltage multiplying circuit and a connection circuit composed of a resistor connected in series to the bandgap voltage multiplying circuit are provided. When the reference current is supplied, an arbitrary output voltage V OUT capable of canceling various temperature characteristics can be obtained as shown by the following equation (8).

【0020】[0020]

【実施例】以下に本発明の実施例を説明する。Embodiments of the present invention will be described below.

【0021】図1は本発明半導体装置の温度補償型基準
電圧発生回路の回路構成を示す。以下にその回路構成を
動作と共に説明する。
FIG. 1 shows a circuit configuration of a temperature-compensated reference voltage generating circuit of a semiconductor device according to the present invention. Hereinafter, the circuit configuration and the operation will be described.

【0022】電源VCCとGNDとの間には、以下に示す
回路要素をそれぞれ直列接続した線路L1、L2、L3
が並列接続されている。この内、線路L1にはMOSト
ランジスタM1、M4およびダイオードQ1′が直列接
続され、線路L2にはMOSトランジスタM2、M5、
抵抗R0およびダイオードQ2′が直列接続されてい
る。また、線路L3にはMOSトランジスタM3および
抵抗R1、RA、RBが直列接続され、かつ抵抗RAの両端
にPNP構造のトランジスタ(以下PNPトランジスタ
という)Q3が接続されている。
Lines L1, L2, L3 each having the following circuit elements connected in series between the power supply V CC and GND.
Are connected in parallel. Of these, MOS transistors M1, M4 and a diode Q1 'are connected in series to line L1, and MOS transistors M2, M5,
The resistor R0 and the diode Q2 'are connected in series. A MOS transistor M3 and resistors R 1 , R A , and R B are connected in series to the line L3, and a PNP transistor (hereinafter, referred to as a PNP transistor) Q3 is connected to both ends of the resistor R A.

【0023】抵抗RAおよびRBとPNPトランジスタQ
3とで、バンドギャップ電圧VBの増倍回路が形成され
る。なお、MOSトランジスタの内、MOSトランジス
タM1、M2、M3はPチャネルのMOSトランジスタ
であり、MOSトランジスタM4、M5はNチャネルの
MOSトランジスタである。
[0023] The resistance R A and R B and the PNP transistor Q
3 and, multiplication circuit of the bandgap voltage V B is formed. Among the MOS transistors, the MOS transistors M1, M2, and M3 are P-channel MOS transistors, and the MOS transistors M4 and M5 are N-channel MOS transistors.

【0024】上記の回路構成において、ダイオードQ
1′、Q2′のエミッタ面積に比を持たせ、バンドギャ
ップ電圧ΔVBEを抵抗ROの両端に発生させて線路L2
に基準定電流IOを発生させる。そして、該基準定電流
Oを抵抗R1と上記の増倍回路とからなる直列接続回路
に流し、最終的に線路L3に接続された出力端子を介し
て任意の出力レベルの基準電圧VOUTを得ている。以下
にその詳細を説明する。
In the above circuit configuration, the diode Q
By giving a ratio to the emitter area of 1 ′ and Q2 ′, a band gap voltage ΔV BE is generated at both ends of the resistor R O , and the line L2
, A reference constant current I O is generated. Then, it flows to the series connection circuit comprising the reference constant current I O and a resistor R 1 and the multiplication circuit, finally the reference voltage of any output level through the output terminal connected to the line L3 V OUT Have gained. The details will be described below.

【0025】今、ダイオードQ1′とQ2′のエミッタ
面積の比を1:nとすると、抵抗ROの両端に発生する
バンドギャップ電圧ΔVBEは上記(1)式で示され、ま
た抵抗R0により発生する基準定電流I0は上記(2)式
で示される。
[0025] Now, the ratio of the emitter area of the diode Q1 'and Q2' 1: When n, bandgap voltage [Delta] V BE generated across the resistor R O is represented by the equation (1), also the resistance R 0 reference constant current I 0 generated by the represented by the formula (2).

【0026】また、出力電圧(基準電圧)VOUTは、上
記のように抵抗RAおよびRBとPNPトランジスタQ3
とで増倍回路を構成しているため、下記(6)で示され
る値となる。
The output voltage (reference voltage) V OUT is connected to the resistors R A and R B and the PNP transistor Q3 as described above.
Since this constitutes a multiplication circuit, the value shown in the following (6) is obtained.

【0027】 VOUT=(R1/R0 )・VTnn+VBE(1+RB/RA) …(6) ここで、出力電圧VOUTの温度特性をφとするために
は、上記(6)式を絶対温度Tで偏微分して、φとなる
条件を(6)式に与える必要がある。すなわち、下記
(7)式を満足する条件を上記(6)式に与える必要が
ある。
[0027] V OUT = (R 1 / R 0) · V T l n n + V BE (1 + R B / R A) ... (6) where, in order to make the temperature characteristics of the output voltage V OUT and φ is the It is necessary to partially differentiate the equation (6) with the absolute temperature T, and to give a condition to be φ to the equation (6). That is, it is necessary to provide a condition satisfying the following expression (7) to the above expression (6).

【0028】[0028]

【数2】 (Equation 2)

【0029】であるため、上記(7)式を変形すれば下
記(8)式を得る。
Therefore, if the above equation (7) is modified, the following equation (8) is obtained.

【0030】 〔(R1/R0 )・lnn〕=〔1+(RB/RA)〕×(q/k) ×2〔mV/゜C〕 …(8) 上記(8)式において、右辺の〔1+(RB/RA)〕は
変数である。従って、上記の(8)式によれば、〔(R
1/R0 )・lnn〕と〔1+(RB/RA)〕の関係を適
宜選択することにより、任意の出力電圧VOUTを得るこ
とができる。すなわち、本発明の温度補償型基準電圧発
生回路によれば、種々の温度特性をキャンセルできる任
意の出力電圧VOUTを得ることができる。
[(R 1 / R 0 ) · ln n ] = [1+ (R B / R A )] × (q / k) × 2 [mV / ΔC] (8) Equation (8) above in, the right side [1+ (R B / R a)] is a variable. Therefore, according to the above equation (8), [(R
1 / R 0) · l n n ] and [1+ (by appropriately selecting R B / R A)] of the relationship, it is possible to obtain an arbitrary output voltage V OUT. That is, according to the temperature compensated reference voltage generating circuit of the present invention, an arbitrary output voltage V OUT capable of canceling various temperature characteristics can be obtained.

【0031】[0031]

【発明の効果】以上の本発明半導体装置の温度補償型基
準電圧発生回路は、PNPトランジスタと抵抗とでバン
ドギャップ電圧増倍回路を構成し、バンドギャップ電圧
増倍回路と該バンドギャップ電圧増倍回路に直列接続さ
れた抵抗で構成される接続回路に基準電流を通電する構
成をとるので、種々の温度特性をキャンセルできる任意
の出力電圧VOUTを得ることができる。それ故、本発明
によれば、基準電圧発生回路の汎用性を格段に向上する
ことができる。
The temperature compensation type reference voltage generating circuit of the semiconductor device according to the present invention constitutes a band gap voltage multiplying circuit by using a PNP transistor and a resistor, and comprises the band gap voltage multiplying circuit and the band gap voltage multiplying circuit. Since the configuration is such that the reference current flows through the connection circuit formed by the resistors connected in series to the circuit, an arbitrary output voltage V OUT capable of canceling various temperature characteristics can be obtained. Therefore, according to the present invention, the versatility of the reference voltage generation circuit can be remarkably improved.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明半導体装置の温度補償型基準電圧発生回
路の構成を示す回路図。
FIG. 1 is a circuit diagram showing a configuration of a temperature-compensated reference voltage generation circuit of a semiconductor device of the present invention.

【図2】温度補償型基準電圧発生回路の一従来例を示す
回路図。
FIG. 2 is a circuit diagram showing a conventional example of a temperature-compensated reference voltage generation circuit.

【符号の説明】[Explanation of symbols]

L1、L2、L1 線路 Q1′、Q2′ダイオード Q3 PNPトランジスタ M1、M2、M3 PチャネルのMOSトランジスタ M4、M5 NチャネルのMOSトランジスタ R0、R1、RA、RB 抵抗L1, L2, L1 Line Q1 ', Q2' diode Q3 PNP transistor M1, M2, M3 P-channel MOS transistor M4, M5 N-channel MOS transistor R 0 , R 1 , R A , R B resistance

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】PNPトランジスタと抵抗を有するバンド
ギャップ電圧増倍回路と、 該バンドギャップ電圧増倍回路に直列接続された抵抗と
を備え、該バンドギャップ電圧増倍回路と該抵抗との接
続回路に基準電流を通電するようにした半導体装置の温
度補償型基準電圧発生回路。
1. A bandgap voltage multiplying circuit having a PNP transistor and a resistor, and a resistor connected in series to the bandgap voltage multiplying circuit, and a connection circuit between the bandgap voltage multiplying circuit and the resistor A temperature compensation type reference voltage generating circuit for a semiconductor device, wherein a reference current is supplied to the semiconductor device.
JP2291392A 1992-02-07 1992-02-07 Temperature compensation type reference voltage generation circuit for semiconductor device Expired - Fee Related JP2721286B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2291392A JP2721286B2 (en) 1992-02-07 1992-02-07 Temperature compensation type reference voltage generation circuit for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2291392A JP2721286B2 (en) 1992-02-07 1992-02-07 Temperature compensation type reference voltage generation circuit for semiconductor device

Publications (2)

Publication Number Publication Date
JPH05218290A JPH05218290A (en) 1993-08-27
JP2721286B2 true JP2721286B2 (en) 1998-03-04

Family

ID=12095883

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2291392A Expired - Fee Related JP2721286B2 (en) 1992-02-07 1992-02-07 Temperature compensation type reference voltage generation circuit for semiconductor device

Country Status (1)

Country Link
JP (1) JP2721286B2 (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100468710B1 (en) * 1998-05-12 2005-04-06 삼성전자주식회사 Semiconductor reference voltage generator
JP5762096B2 (en) * 2011-04-04 2015-08-12 新日本無線株式会社 Temperature detection circuit
JP2013029963A (en) * 2011-07-28 2013-02-07 New Japan Radio Co Ltd Constant voltage output circuit
JP2016057962A (en) * 2014-09-11 2016-04-21 株式会社デンソー Reference voltage circuit and power supply circuit

Also Published As

Publication number Publication date
JPH05218290A (en) 1993-08-27

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