JP2713654B2 - Synchronous tracking circuit for spread spectrum signal and communication device for the signal - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a synchronous tracking circuit used in a receiver for a direct spread (DS) -spread spectrum (SS) signal transmitted via a frequency selective fading line. , And the differentially coded information transmitted via the frequency selective fading line to the SS by the RZ coded spreading sequence for the DS.
The present invention relates to a communication apparatus for a spread spectrum signal including a transmitting apparatus for generating a signal and a receiving apparatus for a DS-SS signal.

[Conventional technology]

Conventionally, there has been a synchronous tracking circuit as shown in FIG. 4, for example.

This figure is IEICE Transactions B Volume, '86 / 11 Vo
l.J69-8 No.11pp.1540-1547, reprinted from "Spread spectrum communication equipment for satellite communication that demodulates data directly from matched filter".

In the figure, (401) is a terminal to which a correlation pulse is applied by a digital correlator on the in-phase axis, (402) is a terminal to which a correlation pulse is applied by a digital correlator on the orthogonal axis, and (403) and (404) are terminals. Squarer, (405) and (406) are 2
Multiplier output, (407) is an adder, (408) is an adder (407)
Output, (409) is an adder, (410) is a multiplier (417)
, (411) the output of the adder (410), (412) the frame memory, (413) the contents of the frame memory (412), (414) the max hold circuit, and (415) the maximum value. Timing (correlation pulse extraction timing),
(416) is the contents of the frame memory, (417) is the multiplier,
(418) is a weighting factor for cyclic addition. Note that (409) to (418) constitute a cyclic integrator.

Next, the operation will be described. Terminal (401), Terminal (40
2) Correlation pulses by the digital correlator of the in-phase axis and the orthogonal axis are applied from 2), are respectively squared by the squarers (403) and (404), and are added by the adder (407). An output (408) is obtained, input to the frame memory (412) at an information symbol duration period, and is cyclically added while being weighted by the weighting factor (418) in the multiplier (417). The value is determined, and the correlation pulse extraction timing is output.
With such a configuration, even when noise is large like a satellite link, the influence of random noise components is removed by cyclic addition. Also, like a satellite link, synchronous tracking is adaptively realized even with respect to a clock shift between transmission and reception due to relative position fluctuation.

As a conventional DS-SS signal transmitting apparatus, for example,
There was something like that shown in the figure. This figure is a report of IEICE's spread spectrum technology and its application workshop,
Reprinted from SSTA90-15, pp.97-101,1990.

In the figure, a portion surrounded by a dotted line is a portion showing a technical example related to the present invention, (501) is a data input terminal, (502) is a differential encoding circuit, and (503) is a differential encoding (504) is a clock for driving a PN (spreading) code, (505) is a PN code generation circuit, and (506) is a PN code.
Code, (507) is a spread modulator (MOD 2) adder, (508)
Is the spread spectrum transmission sequence, (509) is the local oscillator, (5
10) is a phase modulation circuit (multiplier), and (511) is a spread spectrum signal.

 The operation will be described below.

The transmission information data applied to the input terminal (501) is differentially encoded by the differential encoding circuit (502) to become differentially encoded transmission information data (503). The PN code (spread code) (5) given from the PN code generation circuit (505)
06), the spectrum is spread by a spread modulator (507) to form a spread spectrum transmission sequence (508), which is phase-modulated by a phase modulation circuit (510) by a sine wave given from a local oscillator (509). It becomes a spread spectrum signal (511).

Further, as a conventional DS-SS signal receiving apparatus, there is one as shown in FIG. 6, for example. This figure is reprinted from IEICE Spectral Spreading Technology and its Application Research Group Research Report, SSTA90-15, pp.97-101,1990.

In the figure, a portion surrounded by a dotted line is a portion showing a conventional example related to the present invention, (601) is a received signal input terminal, (602) is an in-phase axis synchronous detector (multiplier), (6)
03) is a quadrature axis synchronous detector (multiplier), (604), (60)
5) are the outputs of the detectors (602) and (603) and (60)
6) and (607) are low-pass filters on the in-phase and quadrature axes respectively, (608) and (609) are baseband received signal waves on the in-phase and quadrature axes, respectively, and (610) and (611) are in-phase respectively Axis, orthogonal axis A / D converter, (612) is (610), (611)
(613) and (614) are the baseband digital reception signals of the in-phase axis and the quadrature axis, respectively,
5) (616) is the digital correlator of the in-phase axis and the quadrature axis respectively, (617) and (618) are the digital correlator output (correlation pulse) of the in-phase axis and quadrature axis, respectively, and (619) is the synchronous tracking circuit (max. Value detection circuit), (620) is a timing at which the maximum value is given, (621) is a sampler, (622) and (623) are sampled correlation pulses of the in-phase axis and the quadrature axis, respectively,
4) is a differential decoding circuit (data determination circuit), (625) is reproduced data, (626) is a multiplier, (627) is a multiplier output (VCO correction amount), (628) is a loop filter, and (629) Is the loop filter output, and (630) is the carrier recovery circuit (VC
O), (631) is VCO output (regenerated carrier), (632) is π / 2
The phase shifter (633) is a quadrature reproduced carrier.

Next, the operation will be described. The received signal wave applied to the input terminal (601) is in-phase axis synchronous detector (602), in-phase axis low-pass filter (606), quadrature axis synchronous detector (60).
3) Synchronous detection is performed in the in-phase and quadrature directions by the low-pass filter (607) of the quadrature axis, respectively.
The baseband reception signal waves (608) and (609) of the orthogonal axis are obtained. Next, these are A / D-converted by an A / D converter (610) on the in-phase axis and an A / D converter (611) on the quadrature axis, and the baseband digital reception signal (61
3) and (614), which are digital correlators (61)
5) and (616) are correlated, and the in-phase axis and
Outputs correlation pulses (617) and (618) for the orthogonal axis, and a maximum value detection circuit (synchronous tracking circuit) (619) and a sampler (621)
Is input to The maximum value detection circuit (619) cyclically integrates the correlation pulses (617) and (618) to determine the maximum value of the correlation pulse, and gives the maximum value (correlation pulse extraction timing = demodulation clock) (620). Is output to the sampler. In the sampler (620), the correlation pulse (617),
(618) is sampled at a correlation pulse extraction timing (620), and an in-phase axis correlation pulse is output to a differential decoding circuit (624). Data is reproduced from two consecutive in-phase axis correlation pulses, and a data output terminal (625) Is output to The sampled samples (622) and (623) are multipliers (626)
And the output (627) is input to the loop filter (628) as the VCO correction amount. Multiplier output is VCO
The reason for the correction amount is that the IEICE Transactions on Transactions B, '86 / 11 Vol.J69-B No.11pp.1540-1547. "Spectral spread communication for satellite communications that demodulates data directly from a matched filter. Equipment ”. In the loop filter (628), the correction amount given from the VCO correction amount (627) is smoothed, the VCO (630) is controlled to reproduce the carrier wave (631), and one of them is sent to the π / 2 phase shifter (632). Input the quadrature playback carrier (63
3) Generate

The conventional technique is provided for providing a transmission / reception apparatus for a spread spectrum signal which realizes high quality transmission characteristics in satellite communication. In land mobile communications, it is known that severe frequency selective fading has a significant effect on signal transmission characteristics. However, what has been described in the prior art is satellite communication or mobile satellite communication, and these are mainly intended for satellite links. The differences between the characteristics of satellite links and land mobile links are as follows.

1) In a satellite link, a correlated pulse is only one of the signal components, while in a land mobile link, there is a delayed wave caused by reflection, scattering, diffraction, etc. in addition to the preceding wave (direct wave). As for the correlation pulse, in addition to the correlation pulse caused by the preceding wave, the correlation pulse caused by the delayed wave is generated at a position corresponding to the delay time.

2) In a satellite link, the level fluctuation of the correlation pulse is almost negligible with respect to the communication time, while in a land mobile link, the level fluctuation of the correlation pulse is very high, and is caused by the preceding wave. The level variation of the correlated pulse caused by the correlated pulse and the correlated pulse caused by the delayed wave is completely independent, for example, follows a Rayleigh distribution. Further, the phase difference between the correlation pulse caused by the preceding wave and the correlation pulse caused by the delayed wave is also independent of each other. This is because the carrier phases of the preceding wave and the delayed wave are independent of each other.

3) Correlation pulses caused by scattered waves are generated in mobile satellite links in addition to direct waves. Correlation pulses of direct waves have almost negligible level fluctuations, while correlation pulses caused by scattered waves have a level of negligible. It fluctuates fast according to the Rayleigh distribution.

[Problems to be solved by the invention]

Therefore, the conventional technology, as long as it is used in a satellite link or a mobile satellite link, after capturing a signal component (direct wave component),
Although good synchronization tracking is realized, in a land mobile line, the correlation pulse level of the preceding wave itself fluctuates with time and sometimes becomes so small that the signal cannot be reproduced. On the other hand, the amplitude of the correlation pulse caused by the delayed wave is often larger than that of the preceding wave.

In consideration of the above, if each conventional technology is examined, from the viewpoint of synchronization tracking and data determination, cyclic addition is performed to detect the maximum value of the correlation pulse, but this is not possible in the past. Only the state of the correlated pulse up to the present is taken into consideration, and if the level of the correlated pulse fluctuates greatly due to fading, it cannot always be said to be the optimal detection method.

In addition, the conventional DS-SS signal receiving apparatus using the synchronization tracking circuit, when the level of the preceding wave becomes smaller than the level of the delayed wave, the maximum value timing is for the delayed wave, the correlation pulse of the delayed wave The differential decoding and the calculation of the VCO correction amount are performed by sampling the carrier.In general, the phase of the carrier of the delayed wave is completely independent of the phase of the carrier of the preceding wave. There remains a problem that determination and phase tracking of a carrier wave become impossible.

Further, from the viewpoint of the spread spectrum communication method, since the transmission and reception device of the conventional spread spectrum communication method uses sharp autocorrelation characteristics, as long as the maximum value timing is accurate, the preceding wave and the correlation time (1 Tip duration)
For a delayed wave having the above delay time, it is possible to eliminate the mutual influence between the preceding wave and the delayed wave, but if the delay time is shorter than the correlation time, the effect cannot be completely eliminated. Challenges remained.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and has a synchronous tracking circuit capable of following a high-speed level change of a preceding wave and a delayed wave due to frequency selective fading. And a transmission apparatus for a spread spectrum signal, which is unlikely to lose synchronization even when the maximum value timing (data determination timing) is exchanged and the delay time of the delay wave is not easily affected by a delay wave within one chip. It is an object to provide a communication device in a spread signal with a receiving device.

[Means for Solving the Problems] The synchronization tracking circuit according to the first invention includes an input terminal for applying a sampling sequence of the in-phase axis reception signal, and an input terminal for applying a sampling sequence of the quadrature axis reception signal. A digital correlator for correlating the sampled sequence and spread sequence of the in-phase axis received signal and outputting a correlation pulse of a magnitude corresponding to the degree of correlation;
Correlate the sampled sequence and spread sequence of the orthogonal axis received signal,
A digital correlator for outputting a correlation pulse having a magnitude corresponding to the degree of correlation;
A squaring circuit, a squaring circuit for squaring the orthogonal axis correlation pulse, an adder for adding the outputs of the two squaring circuits, and a plurality of time series data of the adder output in units of one information symbol duration. A plurality of frame memories that store information symbols over the same and an adder that continuously adds only the sample values of the contents of each frame memory at a specific time while moving the specific time, and an adder obtained from the adder output. A maximum value timing detection circuit that detects a timing at which the maximum value of the added correlation pulse is given, and further detects a difference between the timing and the previous timing; and an output terminal that outputs the maximum value timing as a correlation pulse extraction timing. An output terminal that outputs a timing switching signal when the timing deviation of the correlation pulse extraction timing changes by a specific time or more. A plurality of frame memory for storing the pulse timing determination system and the Dishijitaru correlator output of the in-phase axis over a plurality of information symbols with one information symbol duration unit, a digital correlator output of the orthogonal axes 1
A plurality of frame memories for storing over a plurality of information symbols in units of information symbol duration, and two continuous in-phase axis correlation pulses corresponding to correlation pulse extraction timing given by the correlation pulse timing determination system; A correlation pulse extraction system comprising a correlation pulse input port for taking in the orthogonal axis correlation pulse and outputting to the VCO correction amount detection circuit and the data judgment circuit, and determining the maximum value timing based on the state of the past correlation pulse. In addition to this, the maximum value timing of the current correlation pulse is determined in consideration of the state of the future correlation pulse.

The communication apparatus for spread spectrum signals according to the second aspect of the present invention uses the transmission information data applied to the data input terminal to generate one
A differential encoding circuit that outputs a change between two pieces of information data and the next information data, a spread spectrum sequence provided from a spread spectrum sequence generation circuit, and a return zero coded spread based on a duty ratio provided from a duty ratio input terminal. An RZ encoding circuit that generates a sequence, the differential encoding circuit output, by the RZ encoded spreading sequence, performs spread spectrum by direct spreading, a spread modulator that generates an RZ encoded spread spectrum transmission sequence, A waveform shaping circuit that adaptively shapes the waveform in a band according to the duration of the RZ encoding unit pulse by a duty ratio given to the spread spectrum transmission sequence and a duty ratio input terminal, and a local oscillator for performing phase modulation And a modulation circuit that multiplies the output of the waveform shaping circuit by the local oscillation output and modulates the phase. The column was RZ coding performs generation of spreading sequence signals, in which to perform the waveform shaping in a band corresponding to the duration of the RZ coded pulse.

The spread spectrum signal communication apparatus according to the third aspect of the invention performs a specific operation from an input terminal to which a received signal wave is applied, and two in-phase axis correlation pulses and two consecutive orthogonal axis correlation pulses. A VCO correction amount detection circuit for detecting the VCO correction amount, a loop filter for smoothing the VCO correction amount by adaptively changing a loop band according to the presence or absence of a timing switching signal, and a correction amount given from the loop filter output. A carrier recovery circuit that reproduces a received carrier while receiving, a π / 2 phase shifter that generates a quadrature reproduction carrier by phase-shifting the reproduction carrier obtained by the carrier recovery circuit by π / 2, and using the reproduction carrier. An in-phase axis synchronous detector for dropping a received signal wave to a baseband band, a quadrature axis synchronous detector for dropping a received signal wave to a baseband band using the quadrature reproduced carrier, Phase axis synchronous detection output according to the duty ratio given from Ti ratio input terminal,
And a waveform shaping circuit for adaptively shaping the quadrature axis synchronous detection output in a band corresponding to the duration of the RZ encoding unit pulse, and the in-phase axis, and the quadrature axis of the quadrature axis according to a clock supplied from a sample clock input terminal. A correlator pulse extraction timing is generated by a digital correlator that performs a correlation operation between the sampler and the RZ-coded spread spectrum transmission sequence and the in-phase axis and the quadrature axis sampler output to sample the waveform shaping circuit output, 2 continuous according to the timing
A synchronous tracking circuit that extracts two in-phase axis correlation pulses and two consecutive orthogonal axis correlation pulses and outputs the same to a data determination circuit and a VCO correction amount detection circuit; and two consecutive in-phase axis correlation signals provided by the synchronous tracking circuit. Equipped with a data decision circuit that differentially demodulates data by performing a specific operation from a pulse and two consecutive orthogonal axis correlation pulses, perform waveform shaping in a band corresponding to the duration of the RZ encoded pulse, and use a digital correlator. Is calculated based on the content of RZ-DS-SS signal, and two consecutive correlation pulses from one correlation pulse extraction timing are considered not only for the in-phase axis but also for the orthogonal axis. In this case, data judgment and VCO correction amount detection are performed.

[Action]

The synchronous tracking circuit according to the first aspect of the present invention includes a plurality of frame memories each having two outputs of an in-phase axis and a quadrature axis digital correlator.
Since the sum-of-multiple correlation pulse time-series data is accumulated and the timing of giving the maximum value of the correlation pulse by adding the preceding correlation pulse to the subsequent correlation pulse is determined, the state of the past correlation pulse and the future It works so that the state maximum value of the current correlation pulse is given from the state of the correlation pulse.

Further, from the correlation pulse input port, four correlation pulses of two consecutive in-phase axis correlation pulses and two consecutive quadrature axis correlation pulses in which the correlation pulse extraction timing becomes effective every time the maximum value timing is given are extracted. Since it is connected to the data determination circuit and the VCO correction amount detection circuit, it operates so that the contents of continuous in-phase axis and quadrature axis correlation pulses can be used.

Since the communication apparatus for spread spectrum signals according to the second invention incorporates an RZ encoding circuit, the spread spectrum sequence is RZ encoded according to a given duty ratio, and the duration of an RZ encoded unit pulse is changed. Waveform shaping is performed in the corresponding band, so processing gain is not impaired
It works so that an RZ-DS-SS signal can be generated.

The communication device for spread spectrum signals according to the third aspect of the invention performs waveform shaping in a band corresponding to the duration of the RZ-coded terminal pulse, and the digital correlator performs the content calculation and the correlation operation corresponding to the RZ-DS-SS signal. It is configured to take advantage of the processing gain of the SS so that it can be used to the maximum. In addition, since the continuous correlation and quadrature axes of the four correlation pulses corresponding to the timing extracted at the correlation pulse extraction timing are input to the data determination and VCO correction amount detection circuit, the in-phase axis, It works so that correlation pulse information of both orthogonal axes can be used.

〔Example〕

Hereinafter, one embodiment of the first to third inventions will be described with reference to the drawings.

FIGS. 1A to 1C show a synchronous tracking circuit according to an embodiment of the first invention. FIG. 1A is an overall configuration diagram of a synchronization tracking circuit, FIG. 1B is a detailed diagram of a correlation pulse timing determination system, and FIG. 1C is a detailed diagram of a correlation pulse extraction system. In FIG. 1 (a), (101), (102)
Are input terminals for applying a sampling sequence of the in-phase axis and quadrature-axis received signals, respectively, and (103) and (104) are digital correlators of the in-phase axis and quadrature-axis received signals, respectively, each of which is a square circuit ( 107) and correlation pulse extraction system (116)
It is connected to a squaring circuit (108) and a correlation pulse extraction system (116). Both the squaring circuits (107) and (108) are connected to an adder (111), and the adder (111) is connected to a correlation pulse timing determination system (113).

Next, the correlation pulse timing determination system (113) is a portion surrounded by a dashed line in FIG. 1B, and includes a plurality of frame memories (11301) to (11306) and an adder (1131).
3), consisting of a maximum value timing determination system (11315)
It has an adder output (112) as input and has an output terminal (114) to the correlation pulse extraction system and a correlator external output terminal (115). The frame memories (11301) to (11306) have a memory length of one information symbol duration unit and are constituted by, for example, a shift register, and the contents are shifted according to the input clock of the digital correlator. (11307) to (11312) are led to the adder.

Next, the correlation pulse extraction system (116) is the same as the one shown in FIG.
This is a portion surrounded by a chain line, from a plurality of frame memories (11601) to (11604) for the in-phase axis, a plurality of frame memories (11605) to (11608) for the orthogonal axis, and from the correlation pulse input port (11613). The input is a digital correlator output (105) on the in-phase axis, a digital correlator output (106) on the quadrature axis, and a correlation pulse timing determination system output (114). The frame memories (11603), (11604) and (1160)
The contents at the time corresponding to the input (114) in (7) and (11608) are (11609), (11610) and (11611), (11612), respectively.
Is output to the correlation pulse input port through. These four contents are output terminals of (1171), (1172) and (1181), (1182) and (1191), (1192) and (1201), (120
It is output to the outside via 2). Here, the output terminal (117
1) and (1191) contain the contents extracted from the frame memory (11603), and similarly, the output terminals (1172) and (1192) contain the contents of the frame memory (11604) and the output terminals (118).
1) and (1201) contain the contents of the frame memory (11607),
Output terminals (1182) and (1202) have frame memory (1160
8) is output.

Next, the operation will be described. Here, a case where the number of frame memories of the synchronization tracking circuit is 6 will be described.

First, sampling sequences of in-phase axis and quadrature-axis reception signals are applied from terminals (101) and (102), respectively, and sampled sequences of in-phase axis and quadrature-axis reception signals in digital correlators (103) and (104), respectively. And a correlation operation of the diffusion sequence are performed, and correlation pulses (time series) (105) and (106) having a magnitude corresponding to the degree of the phase tube are output, respectively. These are squared in the squaring circuits (101) and (108), and then added to the adder (11).
It is added in 1). The adder output (112) is a plurality of frame memories (11301) of one information symbol duration unit.
Or (11306), and only the content at a specific time in the frame memory is guided to the adder (11313) through (11307) to (11312). For example, when the frame memories (11301) to (11306) are constituted by shift registers, the contents of the same stage of each shift register are added to the adder (1131) through (11307) to (11312).
This is achieved by outputting at the same time in 3). Here, a case is shown in which the contents of the last stage of each shift register are output to the adder (11313). When the frame memory is constituted by, for example, a shift register, the time sequence of each correlation pulse is shifted to the left for each correlator input clock. It is equivalent to taking the moving average of the correlation pulse time series for the duration. The correlation pulse of interest is stored in the frame memory (11
303) and (11304), the contents of the frame memories (11305) and (11306) include the past correlation pulse, the frame memories (11301) and (11330).
02) is the content of the future correlation pulse. In the conventional example shown in FIG. 4, since the correlation pulse time series in the frame memory is cyclically integrated, the operation of determining the current correlation pulse extraction timing from the information of the past correlation pulse is performed. By preparing a plurality of frame memories, it is possible to take into account information of future correlation pulse time series. If the level of the correlated pulse fluctuates greatly due to fading, it is preferable to determine the current correlated pulse extraction timing from past and future correlated pulse states.
This is based on the fact that fading variations are generally temporally correlated. The maximum value timing determination circuit observes the output of the adder (11314) for one information symbol duration and sets the timing at which the maximum level of the correlation pulse is given as the correlation pulse extraction timing falling within the frame memories (11303) and (11304). Output to (114). Furthermore, (11304) output before this operation and (1
When the correlation pulse extraction timing of 1305) and the correlation pulse extraction timing output this time have changed by one chip duration or more, a timing switching signal is output to the output terminal (115). This is because, taking into account that the correlation time of the normal SS signal is approximately one chip duration before and after, the extraction timing is changed from that for the correlation pulse caused by the preceding wave to that for the correlation pulse caused by the delayed wave (or (The reverse).

In the correlation pulse extraction system (116), when a correlation pulse extraction timing is given from the output terminal (114), the in-phase axis correlation pulses constituting the correlation pulses contained in the frame memories (11304) and (11305) are included. The contents are output to the correlation pulse input port (11613) according to the correlation pulse extraction timing from the frame memories (11603) and (11604) and the frame memories (11607) and (11608) including the orthogonal axis correlation pulse. The contents [X (i + 1)] of the frame memory (11604) are output to the output terminals (1171) and (1191), and the contents [X (i)] of the frame memory (11603) are output to the output terminals (1172) and (1192). The contents [Y (i + 1)] of the frame memory (11608) are output to the output terminals (1181) and (1201).
The contents [Y (i)] of the frame memory (11609) are output to output terminals (1182) and (1202).

Although FIG. 1 shows a case where the number of frame memories of the synchronization tracking circuit is 6, the number of memories is not particularly limited in the present invention. Also, all the additions in the adder (11313) have been described as adding at the same level. However, even if weighting is added according to the time difference from the current point in time as in cyclic integration, the addition is equivalent as long as the weighting is appropriately performed. Or more.

FIG. 2 shows an apparatus for transmitting an RZ-DS-SS signal according to an embodiment of the second invention.

In FIG. 2, (201) is a data input terminal to which transmission information data is applied, and (202) is a differential encoding circuit for taking a differential of transmission information data. Reference numeral (204) denotes a spread spectrum sequence generation circuit, which is an RZ encoding circuit (20
7), the RZ encoding circuit (207) is maintained in the multiplier (209) together with the differential encoding circuit (202). Reference numeral (211) denotes a waveform shaping filter that shapes the output of the multiplier. Both the RZ encoding circuit (207) and the waveform shaping filter (211) have terminals for inputting the duty ratio of (206). A multiplier (214) multiplies the output of the waveform shaping filter by an oscillation signal supplied from the local oscillator (213) to generate an RZ-DS-SS signal (215).

Next, the operation will be described. Data input terminal (201)
Is output as differential information (203) between successive information data in the differential encoding circuit (202). The spread sequence is generated in a spread spectrum sequence generation circuit (204), and the spread sequence (205) is spread in an RZ coding circuit (207) according to a duty ratio given from a duty ratio input terminal (206). A sequence signal (208) is generated, and in a multiplier (209), spread modulation is performed by multiplying with the differentially coded information (203), and an RZ coded spread spectrum transmission sequence (21
0). The transmission sequence (210) is supplied to a duty ratio input terminal (20) in a waveform shaping filter (211).
According to the duty ratio given by 6), the waveform is shaped in a band corresponding to the duration of the RZ encoding unit pulse to generate a baseband spread spectrum transmission signal (212).
Here, the band corresponding to the duration of the RZ encoding unit pulse basically corresponds to the reciprocal of the duration. Although the filter shape is not particularly limited in the present invention, for example, if the transmission and reception sides are root Nyquist filters (the frequency characteristic function of which takes the root of a Nyquist roll-off filter), a chip caused by band limitation may be used. Since there is no interfering, matched reception for the chip is realized. The baseband spread-spectrum signal wave (212) is phase-modulated by being multiplied with a local oscillation signal provided by a local oscillation circuit (213) in a multiplier (214) to generate a spread-spectrum transmission signal (215). .

7 and 8, waveforms (1) and (2) are the in-phase axis component and the quadrature-axis component of the output wave (preceding wave) of the transmitting device, respectively, and waveforms (3) and (4) are the delayed wave, respectively. In-phase axis components and orthogonal axis components are shown. Where the delay time is 1 /
The case where the level of the delayed wave is the same as the level of the preceding wave for the duration of 2 chips is shown. The waveform (5) is obtained by linearly complementing the time series of the adder output (112) of the synchronous tracking circuit according to the first invention. Waveforms (6) and (7) are linear complements of the correlation pulse time series of the digital correlator outputs (105) and (106) according to the first invention, respectively. The waveforms resulting from the individual correlation pulses correspond as shown in the table of FIG. Also, the height of the correlation pulse when there is no dashed-dotted line fading (no delay wave) shown in waveforms (5) and (6) is shown. Correlation pulse 702 (2) and correlation pulse 802 (2)
When comparing the former, the correlation pulse 703 caused by the delayed wave
Although the pulse level is reduced due to the influence of (2), the correlation pulse 802 (2) due to the introduction of the RZ coding is not affected by the correlation pulse 803 (2) due to the delayed wave. Is confirmed. Also, comparing the waveform (5) in FIG. 7 with the waveform (5) in FIG. 8, it can be seen that the level of the former varies depending on the carrier phase difference of the delayed wave, whereas the latter always outputs a constant level. Recognize.

As described above, by using the RZ-DS-SS signal transmitting / receiving apparatus according to the present invention, for example, when the duty ratio is 50%, the effect of fading due to a delayed wave of 1/2 chip duration is eliminated. Have.

FIG. 3 shows an RZ-DS-SS according to an embodiment of the third invention.
3 shows a demodulation device in a signal receiving device.

In FIG. 3, (301) is a received signal input terminal, (302) and (303) are multipliers, and (322) is π /
2 phase shifters. (306) and (307) are in-phase axes, respectively.
Reference numeral 308 denotes a duty ratio input terminal. (311) and (312) are respectively
A sampler for an in-phase axis and a quadrature axis. An analog signal is converted into a digital signal in accordance with a clock applied to a terminal (313), and is input to the synchronous tracking circuit of the first invention. However, the digital correlators (103) and (104) correlate with the RZ-coded spread spectrum sequence having the same duty ratio as the transmitting side. The output terminals of the synchronous tracking circuit are (115), (1171), (1172), (1181), (1182),
There are nine (1191), (1192), (1201), and (1202), and (115) is a terminal to which a timing switching signal is output when the timing of correlated pulse extraction timing is switched, and (1171), (1191) ) Is the extraction pulse preceding the continuous in-phase axis correlation pulse extracted at the correlation pulse extraction timing (114), (1172) and (1192) are the extraction pulses after the continuous in-phase axis correlation pulse, (1181) and (1181) 1201) is an extraction pulse preceding a continuous orthogonal axis correlation pulse, (1182),
(1202) is an extracted pulse after a continuous orthogonal axis correlation pulse. Reference numeral (314) denotes a data determination circuit, which differentially demodulates the four pulses supplied from the correlation pulse extraction system to reproduce data (315). (316) is a VCO correction amount detection circuit, which is maintained in the loop filter (318). The loop filter (318) receives the timing switching signal and the output of the VCO correction amount detection circuit as inputs and outputs a control signal to the carrier recovery circuit (VCO) (321).

Next, the operation will be described. First, the sampler output (10
The operations until 1) and (102) are obtained are basically the same as the operations shown in the conventional example. However, in the present invention, since the RZ coded SS signal is used, the waveform shaping filter (30) is used to maximize the effect of the RZ coding.
6) and (307) are different from the conventional example in that the waveform is shaped based on the reciprocal band of the duration of the RZ-coded unit pulse as in the embodiment of the second invention. Also, in the digital correlator, what is prepared for correlating with the received signal is obtained by sampling the same RZ coded spread sequence as that on the transmitting side. Another difference is that the time lag for detecting the switching of the extraction timing is switched from one chip duration to the RZ encoding unit pulse duration because the RZ encoding pulse is used.

Now, if the correlation pulse extraction timing (114) gives the extraction timing of the correlation pulse caused by the preceding wave, and if the detection axis is ideally taken with respect to the preceding wave, the signal component will be on the orthogonal axis. No signal is output, and the signal component is X (i +
1), occurs only in X (i). In this case, the data determination circuit can observe only the changes in X (i + 1) and X (i) and perform differential demodulation to obtain reproduced data. However, the level of the preceding wave is smaller than the level of the delayed wave. When (114) is reached, the correlation pulse extraction timing becomes the correlation pulse extraction timing due to the delayed wave, and the timing switching signal (115) is output. At this time, the phase of the correlation pulse due to the delayed wave is output. Is independent of the phase of the correlation pulse caused by the preceding wave, so that the signal components are generally not only X (i + 1) and X (i) but also Y (i +
1) Also output to Y (i). The magnitude of the magnitude of the in-phase axis (X) and the magnitude of the orthogonal axis (Y) are determined by the phase of the correlation pulse. However, since the transmission information data is differentially encoded, the phase between two consecutive correlation pulses is determined. If a change is detected, the information can be demodulated. That is, the correlation pulse extracted from the previous frame memories (11604) and (11608) is represented by C (i + 1), and the next frame memories (11603) and (1603)
1607), C (i + 1) and C (i) are represented by complex numbers, and C (i + 1) = X (i + 1) + jY (i + 1) (1) C (i) ) = X (i) + jY (i) (2) This is commonly expressed whether the extracted correlation pulse is due to the preceding wave or to the delayed wave.

In order to calculate the phase difference from the two consecutive extracted correlation pulses and perform differential demodulation, a data determination circuit (31)
In 4), D (i) = C (i + 1) · C ^* (i) = X (i + 1) · X (i) + Y (i + 1)
The operation of Y (i) (3) may be performed. Here, * indicates a complex conjugate. The data is determined based on the sign of D (i).

A (i) = tan ⁻¹ [Y (i + 1) / X (i + 1)] − tan ⁻¹ [Y (i) / X (i)] (4) Should be calculated.

Since the Gaussian noise is added to the correction amount given by Expression (4), smoothing is performed by a loop filter (318) to reduce the effect. However, when the timing switching signal is detected, the constituents of the correlation pulse to be extracted change between the preceding wave and the delayed wave, and the operation tends to be unstable. The band width of the loop filter is widened, and when the switching signal is not detected, a stable operation can be expected. Therefore, the switching is performed so that the band of the loop filter is set narrow. Here, the strict band of the loop filter is to be defined for each system to which the loop filter is applied, and is not particularly limited in the present invention. Finally, the correction amount (319) smoothed by the loop filter controls the VCO, which is a carrier recovery circuit, and realizes phase tracking of the carrier. It should be noted that when the values of the added correlation pulses are substantially the same, the pulse extraction timing may be frequently switched. However, if there is a slight difference, it is better to perform the data determination without performing the switching and to perform the loop by the switching. Since the deterioration may be smaller than the characteristic deterioration due to the influence of the jitter accompanying the band expansion, a priority circuit may be provided in such a case. Further, the clock of the sampler at the time of input to the digital correlator can operate basically if it is at least twice the chip clock, but it largely depends on the system to be applied. The invention is not particularly limited.

〔The invention's effect〕

As described above, according to the first aspect of the invention, a plurality of frame memories are prepared, and a correlation pulse included in the frame memory corresponding to the past and a correlation pulse included in the frame memory corresponding to the future are prepared. Since the extraction timing of the corresponding correlation pulse is determined, it is possible to favorably follow even when the level of the correlation pulse is fluctuated due to fading and to detect the optimum correlation pulse extraction timing. In addition, since an output terminal for detecting timing switching is provided, there is an effect that data determination, carrier wave reproduction, and the like can be used.

According to the second invention, the RZ-encoded DS-SS signal is used to perform waveform shaping according to the RZ-encoded unit pulse duration, and the RZ-encoded DS-SS signal and the received signal are also generated by the correlator. Since the correlation calculation of (1) is performed, it is necessary to improve the spreading gain by RZ coding and to insert a zero output part in the correlation calculation, and to eliminate the effect even for a delay wave of about 0.5 chip duration. Can be.

Further, the demodulation method in the RZ-DS-SS signal receiving apparatus according to the third invention extracts two consecutive in-phase axis correlation pulses and two consecutive quadrature axis correlation pulses from one correlation pulse extraction timing, and determines data. Because it is used for VCO correction amount detection, data demodulation is realized continuously without causing loss of synchronization even when the timing switches.
In addition, there is an effect that it is possible to continuously track the carrier phase.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 (a) is a diagram showing an overall configuration of a synchronization tracking circuit according to an embodiment of the first invention, and FIG. 1 (b) is a diagram showing details of a correlation pulse timing determination system. FIG. 1 (c) is a diagram showing details of a correlation pulse extraction system, FIG. 2 is a diagram showing a configuration of an RZ-DS-SS signal transmitting apparatus according to an embodiment of the second invention, and FIG. FIG. 4 is a diagram showing a configuration of a receiving apparatus for an RZ-DS-SS signal according to an embodiment of the third invention, FIG. 4 is a diagram showing a configuration of a conventional synchronous tracking circuit, and FIG. FIG. 6 shows a configuration of a conventional DS-SS signal receiving apparatus, and FIG. 7 shows a configuration of a conventional DS-SS signal receiving apparatus. FIG. 8, FIG. 8 is a diagram for explaining the effect when the RZ-DS-SS signal according to the present invention is used, and FIG. 9 is a waveform diagram resulting from each correlation pulse. FIG. 3 is a diagram showing a table for performing the following. In the figure, (101) and (102) are input terminals of a sampling sequence of an in-phase axis and a quadrature axis received signal, respectively, (103) and (104) are digital correlators of the in-phase axis and quadrature axis, respectively, and (107) and (107). (1
08) is a squaring circuit, (111) is an adder, (113) is a correlation pulse timing determination system, (1130) to (1136) are frame memories, (11313) is an adder, (11314) is an adder output, (11315) is a maximum value timing determination circuit, (114) is a correlation pulse extraction timing, (115) is a timing switching signal, (116) is a correlation pulse extraction system, (201) is a data input terminal, and (202) is a differential. Encoding circuit, (204) Spread spectrum sequence generation circuit, (206) Duty ratio input terminal, (207) RZ encoding circuit, (209) Spread modulator (multiplier), (213) Local oscillator , (214) is a phase modulator (multiplier), (301) is a received signal input terminal, (30)
2) and (303) are in-phase and quadrature axis detectors (multipliers), (306) and (307) are in-phase and quadrature axis waveform shaping circuits, respectively, (308) is a duty ratio input terminal, Three
11) and (312) are samplers with in-phase and quadrature axes, respectively.
(314) is a data judgment circuit, (315) is a reproduction data output terminal, (316) is a VCO correction amount detection circuit, (318) is a loop filter, (320) is a carrier wave reproduction circuit (VCO), and (322) is π. / 2 phase shifter. In the drawings, the same reference numerals indicate the same or corresponding parts.

Claims (3)

(57) [Claims] An input terminal for applying a sampled sequence of an in-phase received signal, an input terminal for applying a sampled sequence of a quadrature-axis received signal, and an in-phase axis. A digital correlator that correlates the sampled sequence of the received signal with the spread sequence and outputs a correlation pulse of a magnitude corresponding to the degree of correlation, and a correlation between the sampled sequence and the spread sequence of the orthogonal axis received signal and performs correlation. A digital correlator that outputs a correlation pulse of a magnitude corresponding to the degree of the above, a squaring circuit for squaring the in-phase axis correlation pulse, a squaring circuit for squaring the orthogonal axis correlation pulse, An adder for adding the outputs of the two squaring circuits; a plurality of frame memories for storing the time-series data of the output of the adder over a plurality of information symbols in units of one information symbol duration; An adder for continuously adding only the sample value at a specific point in time while moving the specific point in time, and detecting a timing at which the maximum value of the added correlation pulse obtained from the output of the adder is given. A maximum value timing detection circuit that also detects a deviation from the timing of the above, an output terminal that outputs the maximum value timing as a correlation pulse extraction timing, and outputs a timing switching signal when the timing deviation of the correlation pulse extraction timing changes by a specific time or more. And a plurality of frame memories for storing the digital correlator output of the in-phase axis over a plurality of information symbols in units of one information symbol duration. The output of the digital correlator is passed over a plurality of information symbols in one information symbol duration unit. A plurality of frame memories to be stored, and a VCO correction amount detection circuit that captures two consecutive in-phase axis correlation pulses and two consecutive orthogonal axis correlation pulses corresponding to the correlation pulse extraction timing given by the correlation pulse timing determination system; A synchronous tracking circuit for a spread spectrum signal, comprising: a correlation pulse extraction system including a correlation pulse input port for outputting to a data determination circuit. 2. A communication apparatus for a spread spectrum signal, comprising:
A differential encoding circuit that outputs a change between one information data and the next information data from transmission information data applied to a data input terminal, a spread spectrum sequence provided from a spread spectrum sequence generation circuit, and a duty ratio input terminal From the given duty ratio, an RZ encoding circuit that generates a return-zero encoded spreading sequence, and the output of the differential encoding circuit, by the RZ encoded spreading sequence, performs spectrum spreading by direct spreading, and performs RZ encoding. A spread modulator that generates a spread spectrum transmission sequence, and a waveform shaping that adaptively shapes the waveform in a band according to the duration of the RZ encoding unit pulse by the duty ratio given to the spread spectrum transmission sequence and the duty ratio input terminal. Circuit, local oscillator for performing phase modulation, and waveform shaping circuit output multiplied by local oscillation output Communication device of a spread spectrum signal characterized by comprising a modulation circuit for modulating. 3. A communication apparatus for a spread spectrum signal,
A VCO correction amount detection circuit that detects a VCO correction amount by performing a specific operation from an input terminal to which a received signal wave is applied, two in-phase axis correlation pulses and two consecutive orthogonal axis correlation pulses, and timing switching A loop filter for adaptively changing a loop band according to the presence or absence of a signal to smooth the VCO correction amount, a carrier recovery circuit for recovering a received carrier wave according to the correction amount given from the loop filter output, and the carrier recovery Π to generate a quadrature reproduced carrier by shifting the phase of the reproduced carrier obtained by the circuit by π / 2.
/ 2 phase shifter, an in-phase axis synchronous detector that drops the received signal wave to the baseband using the reproduced carrier, and a quadrature axis synchronous detector that drops the received signal wave to the baseband using the orthogonal reproduced carrier. A waveform shaping circuit that adaptively shapes the waveform of the in-phase axis synchronous detection output and the orthogonal axis synchronous detection output in a band corresponding to the duration of the RZ encoding unit pulse according to the duty ratio given from the duty ratio input terminal,
A sampler for sampling the waveform shaping circuit output of the in-phase axis, and the quadrature axis according to a clock supplied from a sample clock input terminal, an RZ-coded spread spectrum transmission sequence, and an output of the in-phase axis and the quadrature axis sampler. A correlation pulse extraction timing is generated by a digital correlator that performs a correlation operation, and two consecutive in-phase axis correlation pulses and two consecutive orthogonal axis correlation pulses are extracted according to the timing, and a data determination circuit and VOC correction amount detection are performed. A synchronous follow-up circuit that outputs the data to a circuit; a data determination that differentially demodulates data by performing a specific operation from two consecutive in-phase axis correlation pulses and two consecutive two orthogonal axis correlation pulses provided from the synchronous follow-up circuit A communication device for a spread spectrum signal, comprising: