JP2710218B2 - Combination structure of semiconductor chip and semiconductor chip socket - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION The present invention relates to a large scale integrated circuit (hereinafter referred to as "L").
The present invention relates to a mounting structure for combining a semiconductor chip represented by SI) and a semiconductor chip socket represented by a large-scale integrated circuit socket (hereinafter, LSI socket).

[0002]

2. Description of the Related Art Japanese Unexamined Patent Publication No. 2-288179 discloses a technique in which an integrated circuit is inserted to prevent the integrated circuit from falling out and can be taken out.

FIG. 4, which is FIG. 2 attached to this publication,
The state where C101 is attached to the IC socket 100 is shown. When the IC pin 102 is pushed downward and inserted from the entrance 103 of the case 104 of the IC socket 100, the A component 106 is pushed down by the tip of the IC pin 102 and moves downward, and the inner protruding portion is the bottom end of the B portion 108. Caught in the department. When the external force pushing the IC pin 102 downward is removed, as shown in FIG.
The A spring 106 pushes up the A component 106 and simultaneously pushes up the B component 108. B part 108
Goes upward while pushing and expanding the F-part 115 left and right. When the F component 115 spreads right and left, the contact 10
9 against IC pin 102, which causes IC1 to
It will be fixed to the C socket 100. At this time,
The component 113 is pulled inward by the C spring 114.

FIG. 4 is a view showing a state in which the IC 1 is pushed down again to remove the IC 1. The A component 106 is pushed by the tip of the IC pin 102 and moves downward again. At the same time, the B part 108 also moves downward,
Since the E component 113 has moved inward, the C component cannot be lowered. For this reason, the A component 106 spreads outward, and is not caught by the B component 108. Thus, the IC 101 is released from the fixed state. IC101
FIG. 7, which is a state in which the external force pushing the button downward has been removed, is shown in FIG. The A component 106 is disengaged from the B component 108 and moves upward by the A spring 107. Thus, the IC 101 is removed from the IC socket 100. When part A moves upward,
The E part 113 is spread right and left, and the C part 1
10 moves downward by the action of the B spring 112.

[0005]

SUMMARY OF THE INVENTION Such a conventional IC
The socket has a complicated structure, and uses a spring and the like. The smaller the LSI or the like, the more difficult it becomes to process, manufacture and assemble.

Further, with the recent high integration of LSI,
The calorific value increases with an increase in power per unit area, and L
The radiation fins are attached to the SI, and the external size and weight of the radiation fins are increasing, and when the LSI with such radiation fins is mounted on the above-described IC socket, the weight and bending moment of the radiation fins may increase. There is a disadvantage that malfunction may occur.

SUMMARY OF THE INVENTION The present invention provides a combination structure for improving reliability in terms of holding and fixing a semiconductor chip such as an LSI and preventing falling of a semiconductor chip such as an LIS.

Another object of the present invention is to provide a combination structure which facilitates processing, manufacturing and assembly.

It is another object of the present invention to provide a combination structure which facilitates fixing of an LSI and an LSI socket.

[0010]

First combination structure of the present invention, in order to solve the problems] includes a semiconductor chip having the input and output pins and locking pin on the lower surface, the semiconductor <br/> material chip wherein the semiconductor chip is mounted on the upper surface said semiconductor said output pins which are inserted through a cover housing having a lock pin guide hole output pin guide hole and the locking pin is inserted is inserted, the input-output pin guide hole of the cover housing a socket contact that sandwich the input and output pins of the chip, so that the lock pin guide through the hole for accommodating a locking pin inserted the semiconductor chip guide hole portion and said lock pin of the cover housing is not pulled upward to include a base housing having a locking groove having a locking portion for locking the lock pins Said the cover housing Besuhau
Slide the input / output pin into the socket by sliding
Contact pin and the lock pin forward.
It is characterized by being engaged with the lock portion.

According to a second combination structure of the present invention, in the first combination structure, when the cover housing slides on the base housing, the input / output pin inserts and clamps the socket contact. Features.

A third combination structure of the present invention is characterized in that, in the first combination structure, the lock groove has a lock wall for locking at least a head of the lock pin.

According to a fourth combination structure of the present invention, in the first combination structure, when the cover housing slides on the base housing, the input / output pin inserts and clamps the socket contact, and Has a lock wall for locking at least the head of the lock pin.

According to a fifth combination structure of the present invention, in the third combination structure, the lock pin includes a neck portion having a length corresponding to a thickness of the cover housing and the lock wall, and a head of the lock pin is provided. The portion has an area that can be inserted into the lock pin guide hole and the guide hole portion of the lock groove.

According to a sixth combination structure of the present invention, in the first combination structure, at least one of the input / output pin and the lock pin is plural.

[0016]

Next, an embodiment of the present invention will be described in detail with reference to the drawings.

Referring to FIG. 1, FIG. 2 and FIG. 3, one embodiment of the present invention has a columnar head 31 having a large diameter and a small thickness at the center of a plurality of input / output pins 2 on the lower surface. The lower surface and the head 3 are smaller in diameter and thicker than the diameter of the head 31.
1 is a semiconductor chip provided with a lock pin 3 having a neck portion 32 at a position connecting the
Cover housing 5 having input / output pin guide holes 6 for inserting a plurality of input / output pins 2 on the lower surface of SI1 and lock pin guide holes 7 for inserting lock pins 3 on the lower surface of LSI 1 from above, and the lower surface of LSI1 Guide hole 9 for accommodating the head 31 of the lock pin 3
1 and a lock groove 9 having a lock portion 92 having a lock wall 93 so that when the cover housing 5 is slid, the lock pin 3 is pulled up and the LSI does not fall off.
And a base housing 8 in which a socket contact 10 for inserting and pinching the input / output pins 2 on the lower surface of the LSI 1 from the lateral direction which is the A direction is embedded.

The LSI 1 is mounted on a ZIF socket 4 of a non-insertion force (hereinafter, ZIF) system.

A plurality of input / output pins 2 provided on the lower surface of the LSI 1 are electrically connected to corresponding socket contacts 10.

The cover housing 5 engages with the base housing 8 and slides in the direction of arrow A together with the LSI 1 to be mounted, thereby guiding the input / output pins 2 of the LSI 1 to the socket contacts 10 and fitting them.

Next, the operation of one embodiment of the present invention will be described in detail with reference to the drawings.

Referring to FIGS. 2A and 2B, L
A state where the cover housing 5 is not driven in a state where the SI 1 is mounted on the ZIF socket 4 is shown.

The lock pin 3 is inserted into the guide hole 9 a of the lock groove 9 of the base housing 8 while being guided by the guide hole 7 of the cover housing 5. In this state, the mounting force of the LSI 1 including the insertion of the input / output pins 6 is zero.

Next, the cover housing 5 is slid in the direction of arrow A.

As a result, as shown in FIG. 3, the input / output pin 2 of the LSI 1 comes into contact with the socket contact 10 and the lock pin 3 comes into contact with the guide hole 91 of the lock groove 9.
To the lock portion 92 to prevent the force of the LSI 1 in the falling direction.

As described above, according to the embodiment of the present invention, the lock pin 3 having the head portion 31 and the neck portion 32 provided at the center of the LSI 1 is easily operated in conjunction with the slide having the structure adopting the no insertion force method. Can be prevented from falling off.

As shown in FIG. 1, the lock pin of the LSI and the lock groove of the socket adopting the non-insertion force method which engages with the lock pin are provided at one place in the center, or evenly at the corners or each side of the LSI. Can be provided, and the LSI can be more firmly held and fixed.

[0028]

According to the present invention, the LS is simultaneously connected to the socket contact by sliding the socket without the insertion force.
There is an effect that the LSI can be easily fixed to the socket by the lock pin provided at I. At the same time, the present invention has the effect of preventing the LSI from falling off due to impact or the like.

[Brief description of the drawings]

FIG. 1 is a diagram showing one embodiment of the present invention.

FIG. 2A shows an example of an LSI 1 according to an embodiment of the present invention.
FIG. 5 is a view showing a state in which the cover housing 5 is not slid with the socket 4 fitted with the cover housing 5. (B) is [Fig. 2]
It is a figure which shows the state seen from CC arrow direction of (A).

FIG. 3A is a diagram showing an example of an LSI 1 according to an embodiment of the present invention.
FIG. 4 is a diagram showing a state in which the cover housing 5 is slid while the cover housing 5 is fitted. (B) is a graph of D- in FIG.
It is a figure which shows the state seen from the arrow D direction.

FIG. 4 is a diagram showing an example of a conventional technique related to the present invention.

FIG. 5 is a diagram showing an example of a related art related to the present invention.

FIG. 6 is a diagram showing an example of a conventional technique related to the present invention.

FIG. 7 is a diagram showing an example of a conventional technique related to the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 LSI 2 I / O pin 3 Lock pin 4 Socket 5 Cover housing 6 I / O pin guide hole 7 Lock pin guide hole 8 Base housing 9 Lock groove 10 Socket contact 31 Head 32 Neck 91 Guide hole part 92 Lock part 93 Lock wall 101 IC 102 IC pin 106 A part 108 B part 109 Contact point 110 C part 113 E part

Claims (3)

(57) [Claims] 1. A semiconductor chip, input-output pin guide hole and the locking pin is the input and output pins of the semiconductor chip is mounted on the upper surface the semiconductor chip is inserted insert having input and output pins and locking pin on the lower surface a cover housing having a lock pin guide hole being a socket contact that sandwich the input and output pins of the input and output pins guide the semiconductor chip hole inserted through the cover housing, wherein the lock pin guide of the cover housing base housing and a lock groove having a lock portion in which the guide hole portion and the lock pin for accommodating a locking pin of the semiconductor chip that is inserted through the hole to lock the locking pin so as not pulled upward And the cover housing is aligned with the base housing. What
Slide the input / output pin to the socket contact
And the lock pin is engaged with the lock portion.
The combination structure of a semiconductor chip and a semiconductor chip socket, characterized in that engaged. 2. The combination structure of a semiconductor chip and a semiconductor chip socket according to claim 1, wherein said lock groove has a lock wall for locking at least a head of said lock pin. 3. The lock pin has a neck portion corresponding to the thickness of the cover housing and the lock wall, and a head of the lock pin is inserted into the lock pin guide hole and the guide hole portion of the lock groove. 3. The combined structure of a semiconductor chip and a semiconductor chip socket according to claim 2, wherein the combined structure has an area that can be obtained.