JP2710118B2 - Image processing device - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to an image processing apparatus for modulating and outputting image information. [Prior Art] In a conventional image processing apparatus for processing a color image signal,
Yellow (Y), magenta (M), and cyan (C)
A full-color print is obtained by performing gradation expression by changing the area of a pseudo halftone dot by pulse width modulation of an image signal using four color materials including color or black (BK). However, when the two-dimensional arrangement period of the pseudo halftone dots on the paper is slightly shifted between the colors due to various scanning irregularities of the printer, irregularities of the paper feeding speed, and expansion and contraction of the paper, high frequency moire of coarse pitch occurs. There is a drawback that color unevenness is conspicuous and image quality is greatly reduced. [Problems to be Solved by the Invention] An object of the present invention is to provide an image processing apparatus which can eliminate the above-mentioned disadvantages and obtain a high-resolution reproduced image with high resolution and good gradation. . Another object of the present invention is to provide an image processing apparatus capable of obtaining a high-resolution color reproduction image with high resolution and good gradation without color unevenness. [Means for Solving the Problems] In order to achieve the above object, an image forming apparatus of the present invention has the following configuration. Input means for inputting a chromatic component signal and an achromatic component signal as a digital image signal for each pixel; converting means for converting the digital image signal into an analog image signal; A pixel has one cycle, a first analog pattern signal having an extreme value at substantially the center of the one cycle, and a cycle shorter than the first analog pattern signal with respect to the achromatic component signal, and substantially one cycle of the cycle. Pattern signal generating means for generating a second analog pattern signal having an extreme value at the center; comparing an analog image signal corresponding to the chromatic color component with the first analog pattern signal; Pulse width modulation signal generating means for comparing a corresponding analog image signal with the second analog pattern signal to generate a pulse width modulation signal; Synchronizing signal generating means for generating a line synchronizing signal synchronized with image recording for each line in accordance with a tone signal, and reference clock generating means for generating a reference clock signal synchronized with the line synchronizing signal; Generates an analog image signal in synchronization with the reference clock signal, and the pattern signal generating means generates the first and second analog pattern signals in synchronization with the reference clock signal. Hereinafter, an embodiment of the present invention will be described in detail with reference to the accompanying drawings. [Explanation of Configuration of Image Processing Apparatus (FIG. 1) (FIG. 2)] FIG. 1 is a block diagram of an image processing apparatus according to an embodiment, wherein 1 is a digital data output apparatus and a CCD (not shown). Image data from a color sensor or a video camera is color-converted and A / D-converted, each pixel data is converted into digital data having density information of a predetermined bit, and each color component is output. This digital data may be stored in a memory, or may be input from an external device through communication or the like. When the color printing unit performs printing operation sequentially for each color,
As shown in the figure, one of the color component signals Y, M, C, and BK is selected by the selector 2 and input to the digital-to-analog converter (D / A converter) 3, where it is converted into an analog amount. . The converted analog pixel signal 15 is sequentially input to one terminal of the comparison circuit 4. On the other hand, the pattern signal generator 5 outputs a triangular wave pattern signal 16 at a rate of once for each predetermined pixel of the digital data output from the digital data output device, and inputs it to the other terminal of the comparison circuit 4. I do. Reference numeral 7 denotes an oscillator for generating a reference clock signal 19. Reference numeral 8 denotes a timing signal generation circuit which counts down a clock signal 19 from the oscillator 7 to, for example, a quarter cycle in synchronism with the horizontal synchronization signal 17 from the horizontal synchronization signal generation circuit 6 to obtain a pixel clock 9.
And a screen clock 10 described later. The pixel clock 9 is used for the transfer clock of the digital data and the latch timing of the D / A converter 3.
Here, the horizontal synchronizing signal 17 may be generated internally or may be externally supplied. In this embodiment, since this apparatus is applied to a laser printer, the horizontal synchronizing signal is a known beam detect (BD) signal generated for each line. The comparison circuit 4 compares the analog-converted pixel signal 15 with the signal level of the pattern signal 16 and outputs pulse-width-modulated binary image data 18. The pulse width-modulated binary image data 18 is input to, for example, a modulation circuit for modulating a laser beam.
It is turned on / off according to the pulse width of the image data, and a halftone image is formed on the recording medium. This is performed for each of the Y, M, C, and BK signals, and by superimposing, a full-color print is obtained. FIG. 2 is a diagram for explaining timings of signals of respective parts of the apparatus of FIG. Here, the pixel clock 9 is a signal obtained by counting down the reference clock signal 19 in a quarter cycle by the timing generation circuit 8, and is output in synchronization with the horizontal synchronizing signal 17. The pixel clock 9 is input to the D / A converter 3 and the digital data output device 1 and used as a transfer clock for pixel data. The screen clock 10 is a signal obtained by counting down the pixel clock 9 obtained by the timing generation circuit 8 and further counting down by the timing generation circuit 8. Here, the screen clock 10 is obtained by counting down the pixel clock 9 to a quarter period. I have. That is, the screen clock 10 is a synchronizing signal for generating a pattern signal 16 (for example, a triangular wave), and is normally input to the pattern signal generator 5 through the selector 13 via the signal line 20 (no delay). As is clear from FIG. 2, the analog pixel signal 15 and the pattern signal 16 are compared by the comparator 4, and if the analog pixel signal 15 is larger, it is set to 1; Is output. As described above, the image processing apparatus according to the present embodiment performs substantially continuous pulse width modulation by converting a digital image signal into an analog image signal once and comparing it with a triangular wave having a predetermined period, thereby improving gradation. A high quality image output is obtained. [Explanation of Timing Generation Circuit (FIG. 3) (FIG. 4)] FIG. 3 shows the configuration of the timing generation circuit 8, which differs for each of the Y, M, C, and BK color signals based on this drawing. A method of outputting a screen with the number of lines will be described. The timing generator 8 is a 1/2 frequency divider 30, a 1/3 frequency divider
31, a 1/4 frequency dividing circuit 32, a 1/5 frequency dividing circuit 33, and a selector 34. The selector 34 retains the pixel clock 9 as it is or the two pixel clocks generated by the frequency dividing circuits 30 to 33,
One clock signal is selected as the screen clock by the color select signal 12 from among the clock signals having the periods of three pixel clocks, four pixel clocks, and five pixel clocks. For example, in the case of a Y signal, a clock signal 38 having a cycle of 5 pixel clocks, in the case of an M signal, a clock signal 37 of 4 pixel clocks, in the case of a C signal, a clock signal 36 of 3 pixel clocks, In the case of a signal, a clock signal 35 having a cycle of two pixel clocks is selected and used as the screen clock 10. The screen clocks 10 having different numbers of lines (periods) selected for the respective color signals are input to the pattern signal generator 5, and the Y signal is output from the pattern signal generator as shown in FIG. Is a triangular wave 38 having a 5-pixel cycle, M
A triangular waveform 37 having a 4-pixel cycle is output for the signal, a triangular wave 36 having a 3-pixel cycle for the C signal, and a triangular wave 35 having a 2-pixel cycle for the BK signal. This is input to one terminal of the comparison circuit 4 and compared with the analog image signal 15 of each color to form a pulse width modulation signal having a different number of lines for each color as shown in FIG. [Explanation of Two-Dimensional Halftone Pixel Array (FIG. 5) (FIG. 6)] Here, the angle of the screen, that is, the direction of the two-dimensional array of pseudo halftone dots, is determined by selecting a delay time for each line of sub-scan. If it is not switched, the angle will be 90 degrees (vertical screen). For example, if it is delayed by one pixel clock per line, it will be -45 degrees. As described above, it is possible to output each color signal with a different number of lines and a different screen angle. Next, a method of changing the two-dimensional array period of the pseudo halftone dots for each of the Y, M, C, and BK color signals, that is, a method of forming a pseudo halftone dot array having a different screen angle for each color will be described. For example, if the screen clock 10 is 1 for 4 pixel clocks
Consider a case in which a screen angle of -45 degrees is formed when having a cycle of times. First, the horizontal synchronizing signal 17 is
Count. In this case, the counter 11 is a quaternary counter that counts the number of lines on the first, second, third, and fourth lines.
The screen clock 10 is selected based on the output of. A delay line 14 is connected to the selector 13. The delay time is determined by which delay line 14 the screen clock passes through, and a screen clock 21 having the same cycle and a different delay time is output to each line. . For example, to form a screen angle of -45 degrees,
The screen clocks on lines 2, 3, and 4 are delayed by one pixel clock, two pixel clocks, and three pixel clocks from the first line screen clock. As described above, when the screen clock 21 having a different delay time of each line in the 4-line cycle is input to the pattern signal generator 5, the pattern signal 16 having a delay time varying in the 4-line cycle as shown in FIG. The signal is output from the pattern signal generator 5 and is input to one terminal of the comparison circuit 4. At this time, when an analog pixel signal 15 of a uniform level is input to the other terminal of the comparison circuit 4 as shown in FIG. Data 18 is 1st line 50, 2nd line 5
As shown in the first and third lines 52 and 53, a screen angle of -45 degrees is formed. The pattern of the screen clock 21 at this time is expressed two-dimensionally as shown in FIG. That is, FIG.
Shows a pattern of a screen angle of -45 degrees when the screen clock 21 has a cycle of one for every four pixel clocks, and the hatched portion indicates where the blackening occurs first. However, in the present embodiment, continuous pulse width modulation is performed on the analog pixel signal 15, and blackening is not performed digitally in units of one pixel. 6 (b), (c),
(D) shows a pattern in which the screen clock 21 has a 4-pixel clock cycle and the screen angles are +45 degrees, ± 26.6 degrees, and 90 degrees, respectively. [Examples of other screen clock patterns (Fig. 7)-
(FIG. 9)] FIGS. 7 (a) to 7 (c) show a case where the screen clock is a two-pixel clock. FIG. 7 (a) shows a screen angle of -45 degrees, and FIG. b) has a screen angle of +45.
FIG. 7 (c) shows a pattern in which the screen angle is 90 degrees. FIGS. 8 (a) to 8 (c) show three screen clocks.
FIG. 8 (a) shows a pattern with a screen angle of -45 degrees, FIG. 8 (b) shows a pattern with +45 degrees, and FIG. 8 (c) shows a pattern with 90 degrees. FIGS. 9A and 9B show screen angles of -45 degrees and +45 degrees.
FIG. 9 (a) shows a pattern other than 90 ° and 90 °.
9 shows a pattern in which the screen angle is -26.6 degrees, and FIG. 9B shows a pattern in which the screen angle is +26.6 degrees. When the screen clock 10 is the pixel clock 9 itself, only a screen angle of 90 degrees (vertical screen) can be taken. The color selection signal 12 allows the selector 34 and the selector 13 to select a screen having different screen ruling and screen angle for each color signal. For example, the 5-pixel clock of FIG. 9 (a) and the screen of −26.6 degrees for the Y signal, the 4-pixel clock and the screen of +45 degrees of FIG. 6 (b) for the M signal are converted to the C signal. On the other hand, the three-pixel clock of FIG.
For the -45 degree screen, the two-pixel clock shown in FIG. 7C and the 90 degree screen can be selected for the BK signal. In general, the larger the screen ruling, that is, the finer the screen resolution, the better the resolution, and the smaller the screen ruling, that is, the coarser the screen, the better the gradation. In this case, the setting is such that the resolving power is emphasized for BK, the resolving power and the gradation are balanced for C and M, and the resolving power for Y is set so that even if the resolving power is slightly lowered, it is not visually noticeable. Even if only the screen ruling is changed for each color, the overlap of the four colors on the paper is one-dimensionally averaged. However, when the screen angle is also changed for each color, the overlap of the four color materials is two-dimensional. And the color unevenness is further reduced. For the number of screen lines, the number of lines can be changed more finely if a signal obtained by directly dividing the reference clock signal is used, and if multiple clock generators with different frequencies are provided, the number of lines can be set. Can be finely adjusted more finely. As described above, according to this embodiment, by outputting each color signal of Y, M, C, and BK on a screen having a different number of lines, the balance between resolution and gradation can be changed for each color, and full color A high-resolution print with high resolution and good gradation can be obtained. Further, by further changing the screen angle for each color signal, when four colors are superimposed on paper, the overlap of the color materials is further averaged. Therefore, there is an effect that color unevenness due to various scanning unevenness of the printer, paper feeding speed unevenness, paper expansion and contraction, etc. is reduced. In addition,
Although high-frequency moire with fine pitch is generated, it is macroscopically averaged and inconspicuous. Further, according to this embodiment, the reference clock 19 having a frequency higher than the frequency of the synchronizing signal for generating the pattern signal (triangular wave).
Is used to form a screen clock synchronized with the horizontal synchronizing signal, so that a desired pattern signal can be generated at an accurate timing for each scanning line. Therefore, high-quality reproduced images can be obtained because the grayscale information is pulse-width-modulated almost steplessly using the pattern signal generated at an accurate timing. [Effects of the Invention] As described above, according to the present invention, there is an effect that a high-quality reproduced image with high resolution and good gradation can be obtained. Further, according to the present invention, there is an effect that a high-quality full-color reproduced image with high resolution and good gradation can be obtained.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram of an image processing apparatus according to one embodiment of the present invention, FIG. 2 is a timing chart of signals of respective parts of the apparatus of the embodiment, and FIG. 3 is a configuration of a timing generation circuit. FIG. 4, FIG. 4 is a waveform diagram of the pattern signal, FIG. 5 is a waveform diagram showing the relationship between the pattern signal and the binarized image data, and FIGS. 6 (a) to 6 (d) show examples of screen clock patterns. FIGS. 7 (a) to 7 (c) show examples of patterns when the screen clock is a two-pixel clock. FIGS. 8 (a) to 8 (c) show patterns when the screen clock is a three-pixel clock. FIGS. 9 (a) and 9 (b) are diagrams showing other examples of screen clock patterns. In the figure, 1 ... Digital data output device, 2,13,34 ... Selector, 3 ... D / A converter, 4 ... Comparator, 5 ... Pattern signal generator, 6 ... Horizontal synchronization signal generation Circuit, 7 ...
Oscillator, 8 timing signal generation circuit, 9 pixel clock, 10, 21 screen clock, 11 counter, 12 color select signal, 14 delay line,
15 ... Analog pixel signal, 16 ... Pattern signal, 17 ...
Horizontal sync signal, 18... Binary image data, 19..., Reference clock signal.

Claims (1)

(57) [Claims] Input means for inputting a chromatic component signal and an achromatic component signal as a digital image signal for each pixel; converting means for converting the digital image signal into an analog image signal; and a plurality of pixels for the chromatic component signal. One cycle, a first analog pattern signal having an extreme value at substantially the center of the one cycle, and a cycle shorter than that of the first analog pattern signal with respect to the achromatic component signal, and substantially at the center of the one cycle. Pattern signal generating means for generating a second analog pattern signal having an extreme value; an analog image signal corresponding to the chromatic color component;
A pulse width modulation signal generating means for generating a pulse width modulation signal by comparing an analog image signal corresponding to the achromatic component with the second analog pattern signal; A synchronizing signal generating unit that generates a line synchronizing signal synchronized with image recording for each line according to the modulation signal; and a reference clock generating unit that generates a reference clock signal synchronized with the line synchronizing signal; An image processing apparatus for generating an analog image signal in synchronization with a reference clock signal, wherein the pattern signal generating means generates the first and second analog pattern signals in synchronization with the reference clock signal .